Method for making semiconductor device with different fin sets
    4.
    发明授权
    Method for making semiconductor device with different fin sets 有权
    制造具有不同翅片组的半导体器件的方法

    公开(公告)号:US09299721B2

    公开(公告)日:2016-03-29

    申请号:US14280998

    申请日:2014-05-19

    IPC分类号: H01L21/30 H01L27/12 H01L29/66

    摘要: A method for making a semiconductor device may include forming, above a substrate, first and second semiconductor regions laterally adjacent one another and each including a first semiconductor material. The first semiconductor region may have a greater vertical thickness than the second semiconductor region and define a sidewall with the second semiconductor region. The method may further include forming a spacer above the second semiconductor region and adjacent the sidewall, and forming a third semiconductor region above the second semiconductor region and adjacent the spacer, with the second semiconductor region including a second semiconductor material different than the first semiconductor material. The method may also include removing the spacer and portions of the first semiconductor material beneath the spacer, forming a first set of fins from the first semiconductor region, and forming a second set of fins from the second and third semiconductor regions.

    摘要翻译: 制造半导体器件的方法可以包括在衬底上方形成彼此横向相邻并且包括第一半导体材料的第一和第二半导体区域。 第一半导体区域可以具有比第二半导体区域更大的垂直厚度并且限定具有第二半导体区域的侧壁。 该方法还可以包括在第二半导体区域的上方形成并邻近侧壁的间隔物,以及在第二半导体区域上方并邻近间隔物形成第三半导体区域,其中第二半导体区域包括与第一半导体材料不同的第二半导体材料 。 该方法还可以包括在间隔物下面移除间隔物和第一半导体材料的部分,从第一半导体区域形成第一组散热片,以及从第二和第三半导体区域形成第二组散热片。

    STEEP-SWITCH VERTICAL FIELD EFFECT TRANSISTOR

    公开(公告)号:US20190109177A1

    公开(公告)日:2019-04-11

    申请号:US15729758

    申请日:2017-10-11

    摘要: Embodiments of the invention are directed to a method and resulting structures for a steep-switch vertical field effect transistor (SS-VFET). In a non-limiting embodiment of the invention, a semiconductor fin is formed vertically extending from a bottom source or drain region of a substrate. A top source or drain region is formed on a surface of the semiconductor fin and a top metallization layer is formed on the top source or drain region. A bi-stable resistive system is formed on the top metallization layer. The bi-stable resistive system includes an insulator-to-metal transition material or a threshold-switching selector. The SS-VFET provides a subthreshold switching slope of less than 60 millivolts per decade.

    METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH DIFFERENT FIN SETS
    9.
    发明申请
    METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH DIFFERENT FIN SETS 有权
    用于制造具有不同熔滴的半导体器件的方法

    公开(公告)号:US20150333086A1

    公开(公告)日:2015-11-19

    申请号:US14280998

    申请日:2014-05-19

    IPC分类号: H01L27/12 H01L29/66

    摘要: A method for making a semiconductor device may include forming, above a substrate, first and second semiconductor regions laterally adjacent one another and each including a first semiconductor material. The first semiconductor region may have a greater vertical thickness than the second semiconductor region and define a sidewall with the second semiconductor region. The method may further include forming a spacer above the second semiconductor region and adjacent the sidewall, and forming a third semiconductor region above the second semiconductor region and adjacent the spacer, with the second semiconductor region including a second semiconductor material different than the first semiconductor material. The method may also include removing the spacer and portions of the first semiconductor material beneath the spacer, forming a first set of fins from the first semiconductor region, and forming a second set of fins from the second and third semiconductor regions.

    摘要翻译: 制造半导体器件的方法可以包括在衬底上方形成彼此横向相邻并且包括第一半导体材料的第一和第二半导体区域。 第一半导体区域可以具有比第二半导体区域更大的垂直厚度并且限定具有第二半导体区域的侧壁。 该方法还可以包括在第二半导体区域的上方形成并邻近侧壁的间隔物,以及在第二半导体区域上方并邻近间隔物形成第三半导体区域,其中第二半导体区域包括与第一半导体材料不同的第二半导体材料 。 该方法还可以包括在间隔物下面移除间隔物和第一半导体材料的部分,从第一半导体区域形成第一组散热片,以及从第二和第三半导体区域形成第二组散热片。