公开(公告)号：US20170373140A1

公开(公告)日：2017-12-28

申请号：US15681454

申请日：2017-08-21

Applicant: Infineon Technologies Austria AG

Inventor： Franz Hirler ,  Stefan Gamerith ,  Joachim Weyers ,  Wolfgang Jantscher ,  Waqas Mumtaz Syed

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/423 ,  H03K17/687 ,  H01L29/739 ,  H01L29/40 ,  H01L29/10

CPC classification number: H01L29/0634 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4238 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H03K17/687

Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.

公开(公告)号：US09773863B2

公开(公告)日：2017-09-26

申请号：US14277169

申请日：2014-05-14

Applicant: Infineon Technologies Austria AG

Inventor： Franz Hirler ,  Stefan Gamerith ,  Joachim Weyers ,  Wolfgang Jantscher ,  Waqas Mumtaz Syed

IPC: H01L29/78 ,  H01L29/06 ,  H03K17/687 ,  H01L29/423 ,  H01L29/739 ,  H01L29/40 ,  H01L29/10

CPC classification number: H01L29/0634 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4238 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H03K17/687

Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.

公开(公告)号：US09640602B2

公开(公告)日：2017-05-02

申请号：US13655630

申请日：2012-10-19

Applicant: Infineon Technologies Austria AG

Inventor： Joachim Weyers ,  Kevni Bueyuektas ,  Franz Hirler ,  Anton Mauder

IPC: H01L49/02 ,  H01L25/00 ,  H01L23/64 ,  H01F17/00

CPC classification number: H01L28/10 ,  H01F17/0033 ,  H01L23/645 ,  H01L25/00 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a first coil that is monolithically integrated in a first portion of a semiconductor body and that includes a first winding wrapping around a first core structure. A second coil is monolithically integrated in a second portion of the semiconductor body and includes a second winding wrapping around the second core structure. The first and second coils are magnetically coupled with each other. An insulator frame in the semiconductor body surrounds the first portion and excludes the second portion. High dielectric strength between the first and the second coils is achieved without patterning a backside metallization for connecting the turns of the windings and without being restricted to thin substrates.

公开(公告)号：US09570607B2

公开(公告)日：2017-02-14

申请号：US14934602

申请日：2015-11-06

Applicant: Infineon Technologies Austria AG

Inventor： Hans-Joachim Schulze ,  Franz-Josef Niedernostheide ,  Anton Mauder ,  Joachim Weyers ,  Franz Hirler ,  Markus Schmitt ,  Armin Willmeroth ,  Björn Fischer ,  Stefan Gamerith

IPC: H01L29/76 ,  H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40

CPC classification number: H01L29/0634 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/66712 ,  H01L29/78 ,  H01L29/7811 ,  H01L29/7823

Abstract: In a field-effect semiconductor device, alternating first n-type and p-type pillar regions are arranged in the active area. The first n-type pillar regions are in Ohmic contact with the drain metallization. The first p-type pillar regions are in Ohmic contact with the source metallization. An integrated dopant concentration of the first n-type pillar regions substantially matches that of the first p-type pillar regions. A second p-type pillar region is in Ohmic contact with the source metallization, arranged in the peripheral area and has an integrated dopant concentration smaller than that of the first p-type pillar regions divided by a number of the first p-type pillar regions. A second n-type pillar region is arranged between the second p-type pillar region and the first p-type pillar regions, and has an integrated dopant concentration smaller than that of the first n-type pillar regions divided by a number of the first n-type pillar regions.

Abstract translation: 在场效应半导体器件中，交替的第一n型和p型柱状区域配置在有源区域中。 第一n型支柱区域与漏极金属化处于欧姆接触。 第一p型柱区域与源极金属化处于欧姆接触。 第一n型柱区域的积分掺杂浓度基本上与第一p型柱区域的掺杂浓度一致。 第二p型柱区域与源极金属化欧姆接触，布置在周边区域中，并且具有比由多个第一p型支柱区域划分的第一p型柱区域的掺杂浓度小的集成掺杂剂浓度 。 第二n型支柱区域配置在第二p型支柱区域和第一p型支柱区域之间，并且具有比第一n型支柱区域的多个第一 n型支柱区域。

公开(公告)号：US20180301553A1

公开(公告)日：2018-10-18

申请号：US15951642

申请日：2018-04-12

Applicant: Infineon Technologies Austria AG

Inventor： Joachim Weyers ,  Franz Hirler

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/866 ,  H01L27/02 ,  H01L27/06

Abstract: A semiconductor device includes a trench structure extending into a semiconductor body from a first surface. The trench structure has a shield electrode, a dielectric structure and a diode structure. The diode structure is arranged at least partly between the first surface and a first part of the dielectric structure. The shield electrode is arranged between the first part of the dielectric structure and a bottom of the trench structure. The shield electrode and the semiconductor body are electrically isolated by the dielectric structure. Corresponding methods of manufacture are also described.

公开(公告)号：US09548400B2

公开(公告)日：2017-01-17

申请号：US14868991

申请日：2015-09-29

Applicant: Infineon Technologies Austria AG

Inventor： Franz Hirler ,  Joachim Weyers

IPC: H01L29/866 ,  H01L29/40 ,  H01L29/66 ,  H01L29/36

CPC classification number: H01L29/866 ,  H01L29/36 ,  H01L29/40 ,  H01L29/407 ,  H01L29/66106 ,  H01L29/66113

Abstract: A diode includes a semiconductor body, a first emitter region of a first conductivity type, a second emitter region of a second conductivity type, a base region arranged between the first and second emitter regions and having a lower doping concentration than the first and second emitter regions, a first emitter electrode electrically coupled to the first emitter region, a second emitter electrode in electrical contact with the second emitter region, a control electrode arrangement comprising a first control electrode section and a first dielectric layer arranged between the first control electrode section and the semiconductor body, and at least one pn junction extending to the first dielectric layer, or arranged distant to the first dielectric layer by less than 250 nm. The breakdown voltage of the diode is adjusted by applying a control potential to the first control electrode section.

Abstract translation: 二极管包括半导体本体，第一导电类型的第一发射极区域，第二导电类型的第二发射极区域，布置在第一和第二发射极区域之间的基极区域，并且具有比第一和第二发射极 电耦合到第一发射极区域的第一发射极电极，与第二发射极区域电接触的第二发射极电极;控制电极装置，包括第一控制电极部分和布置在第一控制电极部分和第二发射极区域之间的第一电介质层; 半导体本体和延伸到第一介电层的至少一个pn结，或者被布置成远离第一电介质层小于250nm。 通过向第一控制电极部施加控制电位来调整二极管的击穿电压。

公开(公告)号：US20150333169A1

公开(公告)日：2015-11-19

申请号：US14277506

申请日：2014-05-14

Applicant: Infineon Technologies Austria AG

Inventor： Armin Willmeroth ,  Franz Hirler ,  Bjoern Fischer ,  Joachim Weyers

IPC: H01L29/78 ,  H01L29/06 ,  H02M1/08

CPC classification number: H01L29/0634 ,  H01L29/0615 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4238 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H02M1/08 ,  H02M3/155 ,  H02M2001/0054

Abstract: A semiconductor device includes a semiconductor body, which includes transistor cells and a drift zone between a drain layer and the transistor cells. The drift zone includes a compensation structure. Above a depletion voltage a first output charge gradient obtained by increasing a drain-to-source voltage from the depletion voltage to a maximum drain-to-source voltage deviates by less than 5% from a second output charge gradient obtained by decreasing the drain-to-source voltage from the maximum drain-to-source voltage to the depletion voltage. At the depletion voltage the first output charge gradient exhibits a maximum curvature.

Abstract translation: 半导体器件包括半导体本体，其包括晶体管单元和漏极层与晶体管单元之间的漂移区。 漂移区包括补偿结构。 在耗尽电压之上，通过将漏极 - 源极电压从耗尽电压增加到最大漏极 - 源极电压获得的第一输​​出电荷梯度从通过减少漏极 - 源极电压获得的第二输出电荷梯度偏离小于5％ 源极电压从最大漏极 - 源极电压到耗尽电压。 在耗尽电压下，第一输出电荷梯度表现出最大曲率。

公开(公告)号：US20150333168A1

公开(公告)日：2015-11-19

申请号：US14277169

申请日：2014-05-14

Applicant: Infineon Technologies Austria AG

Inventor： Franz Hirler ,  Stefan Gamerith ,  Joachim Weyers ,  Wolfgang Jantscher ,  Waqas Mumtaz Syed

IPC: H01L29/78 ,  H03K17/687 ,  H01L29/06

CPC classification number: H01L29/0634 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4238 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H03K17/687

Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.

Abstract translation: 半导体器件包括具有布置在有源区域中的晶体管单元并且在有源区域和侧表面之间的边缘区域中不存在的半导体本体。 场电介质邻接半导体本体的第一表面，并且在边缘区域中分离与半导体本体连接到晶体管单元的栅电极的导电结构。 场电介质包括从第一垂直延伸到第二较大垂直延伸的转变。 该转变是在半导体本体中的不可耗尽的延伸区域的垂直投影中，其中非可消耗延伸区域具有导体类型的晶体管单元的主体/阳极区域，并且电连接至至少一个体 /阳极区。

公开(公告)号：US08958189B1

公开(公告)日：2015-02-17

申请号：US13963383

申请日：2013-08-09

Applicant: Infineon Technologies Austria AG

Inventor： Joachim Weyers ,  Franz Hirler ,  Anton Mauder

IPC: H02H3/20 ,  H02H9/04 ,  H01L27/02

CPC classification number: H01L27/0255 ,  H03K17/102 ,  H03K17/567 ,  H03K17/6871 ,  H03K17/74

Abstract: A high voltage semiconductor switch includes a first field-effect transistor having a source, a drain and a gate, and being adapted for switching a voltage at a rated high-voltage level, the first field-effect transistor being a normally-off enhancement-mode transistor, a second field-effect transistor having a source, a drain and a gate, connected in series to the first field-effect transistor, the second field-effect transistor being a normally-on depletion-mode transistor; and a control unit connected to the drain of the first field-effect transistor and to the gate of the second field-effect transistor and being operable for blocking the second field-effect transistor if a drain-source voltage across the first field-effect transistor exceeds the rated high-voltage level.

Abstract translation: 高电压半导体开关包括具有源极，漏极和栅极的第一场效应晶体管，并且适于切换额定高电压电平的电压，第一场效应晶体管是常关的增强型晶体管， 模式晶体管，具有与第一场效应晶体管串联连接的源极，漏极和栅极的第二场效应晶体管，第二场效应晶体管是正常导通的耗尽型晶体管; 以及控制单元，连接到第一场效应晶体管的漏极和第二场效应晶体管的栅极，并且如果跨越第一场效应晶体管的漏极 - 源极电压，则可操作用于阻挡第二场效应晶体管 超过额定高压电平。

公开(公告)号：US20150042177A1

公开(公告)日：2015-02-12

申请号：US14454299

申请日：2014-08-07

Applicant: Infineon Technologies Austria AG

Inventor： Joachim Weyers ,  Franz Hirler ,  Anton Mauder

IPC: H01L27/06 ,  H01L29/417

CPC classification number: H01L27/0629 ,  H01L29/0623 ,  H01L29/407 ,  H01L29/41725 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7808 ,  H01L29/7809 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8611 ,  H01L29/866 ,  Y10T307/76

Abstract: Disclosed is a semiconductor device, an electronic circuit, and a method. The semiconductor device includes a semiconductor body; at least one transistor cell including a source region, a drift region, a body region separating the source region from the drift region, and a drain region in the semiconductor body, and a gate electrode dielectrically insulated from the body region by a gate dielectric; a source node connected to the source region and the body region; a contact node spaced apart from the body region and the drain region and electrically connected to the drain region; and a rectifier element formed between the contact node and the source node.

Abstract translation: 公开了半导体器件，电子电路和方法。 半导体器件包括半导体本体; 至少一个晶体管单元，包括源极区，漂移区，源极区与漂移区分离的体区，以及半导体本体中的漏极区，以及通过栅极电介质与体区介电绝缘的栅极; 连接到源区域和身体区域的源节点; 接触节点，其与所述体区域和所述漏极区域间隔开并电连接到所述漏极区域; 以及形成在所述接触节点和所述源节点之间的整流元件。