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公开(公告)号：US20240113479A1
公开(公告)日：2024-04-04
申请号：US17957761
申请日：2022-09-30
申请人： Intel Corporation
发明人： Kai Xiao , Phil Geng , Carlos Alberto Lizalde Moreno , Raul Enriquez Shibayama , Steven A. Klein
IPC分类号： H01R13/6597 , H01R12/71 , H01R13/50 , H01R13/6471 , H01R33/74 , H01R43/18 , H01R43/20
CPC分类号： H01R13/6597 , H01R12/714 , H01R13/50 , H01R13/6471 , H01R33/74 , H01R43/18 , H01R43/20 , H01R12/57
摘要： Methods, apparatus, systems, and articles of manufacture are disclosed for socket interconnect structures and related methods. An example socket interconnect apparatus includes a housing defining a plurality of first openings and a plurality of second openings and a ground structure coupled to the housing. The ground structure defines a plurality of third openings. The third openings of the ground structure align with the second openings of the housing when the ground structure is coupled to the housing. A plurality of ground pins are located in respective ones of the second openings and third openings. The ground structure is to electrically couple the ground pins. A plurality of signal pins are located in respective ones of the first openings of the housing. The signal pins are electrically isolated from the ground structure.
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公开(公告)号：US11194751B2
公开(公告)日：2021-12-07
申请号：US16513691
申请日：2019-07-16
申请人： Intel Corporation
发明人： Huimin Chen , Jingbo Li , Kai Xiao , Yong Yang , Chunfei Ye
IPC分类号： G06F13/40 , G06F1/3234 , H04L12/40 , G06F5/06 , H03K5/24
摘要： An apparatus, such as a re-driver, can include a receiver port coupled to a first link partner across a first link; a transmitter port coupled to a second link partner across a second link; and a power management (PM) controller implemented in hardware. The PM controller can detect a PM control signal, determine a PM state for the apparatus based on the PM control signal, and cause the apparatus to enter the PM state. The apparatus can transmit electrical signals to the second link partner based on the PM state. The PM management control signal can include a clock request, an electrical idle, a common mode voltage, or other electrical signal indicative of a PM link state change of a link partner coupled to the re-driver.
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公开(公告)号：US20210294560A1
公开(公告)日：2021-09-23
申请号：US17162864
申请日：2021-01-29
申请人： Intel Corporation
发明人： Deepak S. Vembar , Atsuo Kuwahara , Chandrasekaran Sakthivel , Radhakrishnan Venkataraman , Brent E. Insko , Anupreet S. Kalra , Hugues Labbe , Altug Koker , Michael Apodaca , Kai Xiao , Jeffery S. Boles , Adam T. Lake , David M. Cimini , Balaji Vembu , Elmoustapha Ould-Ahmed-Vall , Jacek Kwiatkowski , Philip R. Laws , Ankur N. Shah , Abhishek R. Appu , Joydeep Ray , Wenyin Fu , Nikos Kaburlasos , Prasoonkumar Surti , Bhushan M. Borole
摘要： An embodiment of a graphics apparatus may include a processor, memory communicatively coupled to the processor, and a collaboration engine communicatively coupled to the processor to identify a shared graphics component between two or more users in an environment, and share the shared graphics components with the two or more users in the environment. Embodiments of the collaboration engine may include one or more of a centralized sharer, a depth sharer, a shared preprocessor, a multi-port graphics subsystem, and a decode sharer. Other embodiments are disclosed and claimed.
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公开(公告)号：US11069123B2
公开(公告)日：2021-07-20
申请号：US16236218
申请日：2018-12-28
申请人： Intel Corporation
发明人： Carson Brownlee , Joshua Barczak , Kai Xiao , Michael Apodaca , Philip Laws , Thomas Raoux , Travis Schluessler
摘要： Cloud-based real time rendering. For example, one embodiment of a system comprises: a first graphics processing node to perform a first set of graphics processing operations to render a graphics scene, the first set of graphics processing operations comprising ray-tracing independent operations; an interconnect or network interface coupling the first graphics processing node to a second graphics processing node; the second graphics processing node to receive an indication of a current view of a user of the first graphics processing node and to receive or construct a view-independent surface generated by view-independent ray traversal and intersection operations; the second graphics processing node to responsively perform a view-dependent translation of the view-independent surface based on the current view of the user to generate a view-dependent surface and to provide the view-dependent surface to the first graphics processing node; and the first graphics processing node to perform a second set of graphics processing operations to complete rendering of the graphics scene using the view-dependent surface.
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公开(公告)号：US10762668B2
公开(公告)日：2020-09-01
申请号：US16235672
申请日：2018-12-28
申请人： Intel Corporation
发明人： Carson Brownlee , Carsten Benthin , Joshua Barczak , Kai Xiao , Michael Apodaca , Prasoonkumar Surti , Thomas Raoux
摘要： Apparatus and method for context-aware compression. For example, one embodiment of an apparatus comprises: ray traversal/intersection circuitry to traverse rays through a hierarchical acceleration data structure to identify intersections between rays and primitives of a graphics scene; matrix compression circuitry/logic to compress hierarchical transformation matrices to generate compressed hierarchical transformation matrices by quantizing N-bit floating point data elements associated with child transforms of the hierarchical transformation matrices to variable-bit floating point numbers or integers comprising offsets from a parent transform of the child transform; and an instance processor to generate a plurality of instances of one or more base geometric objects in accordance with the compressed hierarchical transformation matrices.
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公开(公告)号：US20200097243A1
公开(公告)日：2020-03-26
申请号：US16586043
申请日：2019-09-27
申请人： Intel Corporation
发明人： Deepak S. Vembar , Atsuo Kuwahara , Chandrasekaran Sakthivel , Radhakrishnan Venkataraman , Brent E. Insko , Anupreet S. Kalra , Hugues Labbe , Altug Koker , Michael Apodaca , Kai Xiao , Jeffery S. Boles , Adam T. Lake , David M. Cimini , Balaji Vembu , Elmoustapha Ould-Ahmed-Vall , Jacek Kwiatkowski , Philip R. Laws , Ankur N. Shah , Abhishek R. Appu , Joydeep Ray , Wenyin Fu , Nikos Kaburlasos , Prasoonkumar Surti , Bhushan M. Borole
摘要： An embodiment of a graphics apparatus may include a processor, memory communicatively coupled to the processor, and a collaboration engine communicatively coupled to the processor to identify a shared graphics component between two or more users in an environment, and share the shared graphics components with the two or more users in the environment. Embodiments of the collaboration engine may include one or more of a centralized sharer, a depth sharer, a shared preprocessor, a multi-port graphics subsystem, and a decode sharer. Other embodiments are disclosed and claimed.
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公开(公告)号：US20200045344A1
公开(公告)日：2020-02-06
申请号：US16050509
申请日：2018-07-31
申请人： Intel Corporation
发明人： Jill Boyce , Atsuo Kuwahara , Tzach Ashkenazi , Ilan Beer , Eytan Kats , Prasoonkumar Surti , Kai Xiao , Jeffrey Tripp , Narayan Biswal , Jason Tanner , Nilesh Shah , Yi-Jen Chiu , Mayuresh M. Varerkar , Maria Bortman , Jonathan Distler , Itay Kaufman
摘要： An apparatus to facilitate processing video bit stream data is disclosed. The apparatus includes one or more processors to receive point cloud data included in the video bit stream data to be projected into two or more angles and encode multiple projections for a point cloud point upon a determination that the point cloud point will be included in patches in two or more of the multiple projections.
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公开(公告)号：US20200043121A1
公开(公告)日：2020-02-06
申请号：US16050431
申请日：2018-07-31
申请人： Intel Corporation
发明人： Jill Boyce , Sang-hee Lee , Scott Janus , Stanley Baran , Michael Apodaca , Prasoonkumar Surti , Srikanth Potluri , Atsuo Kuwahara , Kai Xiao , Jason Tanner , Gokcen Cilingir , Archie Sharma , Jeffrey Tripp , Jason Ross , Barnan Das
IPC分类号： G06T1/20 , G06T7/20 , G06T15/00 , G06T5/20 , H04N19/517 , H04N19/523
摘要： An apparatus to facilitate processing video bit stream data is disclosed. The apparatus includes one or more processors to decode occupancy map data and auxiliary patch information and generate a plurality of patch video frames based on patch data decoded from the occupancy map data and auxiliary patch information, and a memory communicatively coupled to the one or more processors.
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公开(公告)号：US20190236758A1
公开(公告)日：2019-08-01
申请号：US15883076
申请日：2018-01-29
申请人： INTEL CORPORATION
发明人： Sungye Kim , Seshupriya Alluru , Filip Strugar , Matthew Goyder , Yazdan Yar Khabiri , Anupreet Kalra , Kai Xiao
CPC分类号： G06T5/002 , G06T7/13 , G06T15/04 , G06T15/405 , G06T2200/12 , G06T2207/20024 , G06T2207/20036 , G06T2207/20182
摘要： Apparatus and method for temporally stable conservative morphological anti-aliasing. For example, one embodiment of a method comprises: rendering a current frame in a graphics processing apparatus, the current frame including color components and depth components; detecting edges within the rendered frame to generate a first set of edge candidates and a second set of edge candidates; performing spatial anti-aliasing using the first set of edge candidates; and performing temporal anti-aliasing using the second set of edge candidates.
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公开(公告)号：US10235735B2
公开(公告)日：2019-03-19
申请号：US15483641
申请日：2017-04-10
申请人： Intel Corporation
发明人： Abhishek Venkatesh , Prasoonkumar Surti , Slawomir Grajewski , Louis Feng , Kai Xiao , Tomasz Janczak , Devan Burke , Travis T. Schluessler
摘要： An embodiment of a graphics apparatus may include a tile candidate identifier to determine if a compute kernel is a tile candidate, and a compute kernel tiler communicatively coupled to the tile candidate identifier to tile the compute kernel if the compute kernel is determined to be a tile candidate. Other embodiments are disclosed and claimed.
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