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公开(公告)号：US20230368516A1
公开(公告)日：2023-11-16
申请号：US18358067
申请日：2023-07-25
Applicant: Intel Corporation
Inventor： Barnan Das , Mayuresh M. Varerkar , Narayan Biswal , Stanley J. Baran , Gokcen Cilingir , Nilesh V. Shah , Archie Sharma , Sherine Abdelhak , Praneetha Kotha , Neelay Pandit , John C. Weast , Mike B. Macpherson , Dukhwan Kim , Linda L. Hurd , Abhishek R. Appu , Altug Koker , Joydeep Ray
IPC: G06V10/82 , G06F16/783 , G06F16/583 , G06V10/94 , G06V40/10 , G06V40/20 , G06F18/2413 , G06V10/764
CPC classification number: G06V10/82 , G06F16/784 , G06F16/5838 , G06V10/955 , G06V40/10 , G06V40/23 , G06V40/103 , G06F18/24143 , G06V10/764
Abstract: A graphics processor can include a processing cluster array including a plurality of processing clusters coupled with the plurality of memory controllers, each processing cluster of the plurality of processing clusters including a plurality of streaming multiprocessors, the processing cluster array configured for partitioning into a plurality of partitions. The plurality of partitions include a first partition including a first plurality of streaming multiprocessors configured to perform operations for a first neural network, The operations for the first neural network are isolated to the first partition. The plurality of partitions also include a second partition including a second plurality of streaming multiprocessors configured to perform operations for a second neural network. The operations for the second neural network are isolated to the second partition and protected from operations performed for the first neural network.
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2.发明申请公开(公告)号：US20210297801A1
公开(公告)日：2021-09-23
申请号：US17135850
申请日：2020-12-28
Applicant: Intel Corporation
Inventor： Joydeep Ray , Travis T. Schluessler , Prasoonkumar Surti , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Abhishek R. Appu , James M. Holland , Jeffery S. Boles , Jonathan Kennedy , Louis Feng , Atsuo Kuwahara , Barnan Das , Narayan Biswal , Stanley J. Baran , Gokcen Cilingir , Nilesh V. Shah , Archie Sharma , Mayuresh M. Varerkar
Abstract: Systems, apparatuses and methods may provide away to render augmented reality (AR) and/or virtual reality (VR) sensory enhancements using ray tracing. More particularly, systems, apparatuses and methods may provide a way to normalize environment information captured by multiple capture devices, and calculate, for an observer, the sound sources or sensed events vector paths. The systems, apparatuses and methods may detect and/or manage one or more capture devices and assign one or more the capture devices based on one or more conditions to provide observer an immersive VR/AR experience.
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3.发明申请公开(公告)号：US20190287290A1
公开(公告)日：2019-09-19
申请号：US16271368
申请日：2019-02-08
Applicant: Intel Corporation
Inventor： Chandrasekaran Sakthivel , Michael Apodaca , Kai Xiao , Altug Koker , Jeffery S. Boles , Adam T. Lake , Nikos Kaburlasos , Joydeep Ray , John H. Feit , Travis T. Schluessler , Jacek Kwiatkowski , James M. Holland , Prasoonkumar Surti , Jonathan Kennedy , Louis Feng , Barnan Das , Narayan Biswal , Stanley J. Baran , Gokcen Cilingir , Nilesh V. Shah , Archie Sharma , Mayuresh M. Varerkar
Abstract: Systems, apparatuses and methods may provide away to render augmented reality and virtual reality (VR/AR) environment information. More particularly, systems, apparatuses and methods may provide a way to selectively suppress and enhance VR/AR renderings of n-dimensional environments. The systems, apparatuses and methods may deepen a user's VR/AR experience by focusing on particular feedback information, while suppressing other feedback information from the environment.
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公开(公告)号：US10303953B2
公开(公告)日：2019-05-28
申请号：US15488555
申请日：2017-04-17
Applicant: Intel Corporation
Inventor： Mayuresh M. Varerkar , Barnan Das , Narayan Biswal , Stanley J. Baran , Gokcen Cilingir , Nilesh V. Shah , Archie Sharma , Sherine Abdelhak , Sachin Godse , Farshad Akhbari , Narayan Srinivasa , Altug Koker , Nadathur Rajagopalan Satish , Dukhwan Kim , Feng Chen , Abhishek R. Appu , Joydeep Ray , Ping T. Tang , Michael S. Strickland , Xiaoming Chen , Anbang Yao , Tatiana Shpeisman , Vasanth Ranganathan , Sanjeev Jahagirdar
Abstract: A mechanism is described for facilitating person tracking and data security in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting, by a camera associated with one or more trackers, a person within a physical vicinity, where detecting includes capturing one or more images the person. The method may further include tracking, by the one or more trackers, the person based on the one or more images of the person, where tracking includes collect tracking data relating to the person. The method may further include selecting a tracker of the one or more trackers as a preferred tracker based on the tracking data.
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公开(公告)号：US20190147175A1
公开(公告)日：2019-05-16
申请号：US16242785
申请日：2019-01-08
Applicant: Intel Corporation
Inventor： Mayuresh Varerkar , Barnan Das , Archie Sharma , Gokcen Cilingir , Narayan Biswal , Melanie Daniels
Abstract: Technology for a device operable for secured user access is described. The technology can comprise one or more processors. The device can be configured to identify an intruder indicator, wherein the intruder indicator can indicate that an intruder has been detected in a proximity of either the local device or a remote device in communication with the local device. The device can be configured to activate one or more privacy filters at the local device. The device can be configured to encode data based on the one or more privacy filters.
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Patent Agency Ranking
公开(公告)号：US10170135B1
公开(公告)日：2019-01-01
申请号：US15858849
申请日：2017-12-29
Applicant: Intel Corporation
Inventor： David Pearce , Adam Kupryjanow , Gokcen Cilingir , Suhel Jaber , Paulo Lopez Meyer
Abstract: Systems, apparatuses and methods for technology to perform gait detection and identification. The system includes a pre-processing pipeline to process audio input data from one or more microphones to combine and strengthen an audio gait signal. The pre-processing pipeline is coupled to a gait detector to detect the sound of one or more footsteps from the audio gait signal. The system also includes a person evaluator (e.g., identifier/verifier) to identify the person associated with the one or more footsteps using a set of trained footstep identification (ID) classifiers. Each trained footstep ID classifier is mapped to the gait of a specific person in the home based on a particular combination of person, footwear, and floor surface within the home.
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公开(公告)号：US20170287489A1
公开(公告)日：2017-10-05
申请号：US15088500
申请日：2016-04-01
Applicant: INTEL CORPORATION
Inventor： Narayan Biswal , Gokcen Cilingir , Barnan Das
Abstract: An apparatus for oversampling audio signals is described herein. The apparatus includes one or more microphones to receive audio signals and an extractor to extract a set of feature points from the audio signals. The apparatus also includes a processing unit to determine a distance between each pair of feature points and an oversampling unit to generate a plurality of new feature points based the distance between each pair of feature points.
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公开(公告)号：US20160182727A1
公开(公告)日：2016-06-23
申请号：US14574501
申请日：2014-12-18
Applicant: Intel Corporation
Inventor： Stanley J. Baran , Gokcen Cilingir
Abstract: A mute detector actively provides an indication to a user when the user is speaking while on mute in an audio conferencing application. The indication may prevent the user from speaking for a period without being heard by other participants. The indication also may prevent a user from believing they were heard by others in an audio conference when they were, in fact, on mute. The techniques may be integrated into the software layer of any audio or video conferencing application, although other implementations will be apparent in light of this disclosure.
Abstract translation: 静音检测器在音频会议应用中静音时用户正在说话时主动地向用户提供指示。 该指示可以防止用户在没有其他参与者听到的情况下发言一段时间。 事实上，这种指示也可能阻止用户在音频会议中听到他们的声音，实际上是静音的。 这些技术可以集成到任何音频或视频会议应用的软件层中，尽管根据本公开，其他实现将是显而易见的。
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公开(公告)号：US11900665B2
公开(公告)日：2024-02-13
申请号：US18358067
申请日：2023-07-25
Applicant: Intel Corporation
Inventor： Barnan Das , Mayuresh M. Varerkar , Narayan Biswal , Stanley J. Baran , Gokcen Cilingir , Nilesh V. Shah , Archie Sharma , Sherine Abdelhak , Praneetha Kotha , Neelay Pandit , John C. Weast , Mike B. Macpherson , Dukhwan Kim , Linda L. Hurd , Abhishek R. Appu , Altug Koker , Joydeep Ray
IPC: G06V10/82 , G06V40/10 , G06V10/94 , G06V10/764 , G06V40/20 , G06F16/783 , G06F16/583 , G06F18/2413 , G06V10/10
CPC classification number: G06V10/82 , G06F16/5838 , G06F16/784 , G06F18/24143 , G06V10/764 , G06V10/955 , G06V40/10 , G06V40/103 , G06V40/23
Abstract: A graphics processor can include a processing cluster array including a plurality of processing clusters coupled with the plurality of memory controllers, each processing cluster of the plurality of processing clusters including a plurality of streaming multiprocessors, the processing cluster array configured for partitioning into a plurality of partitions. The plurality of partitions include a first partition including a first plurality of streaming multiprocessors configured to perform operations for a first neural network, The operations for the first neural network are isolated to the first partition. The plurality of partitions also include a second partition including a second plurality of streaming multiprocessors configured to perform operations for a second neural network. The operations for the second neural network are isolated to the second partition and protected from operations performed for the first neural network.
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公开(公告)号：US11580361B2
公开(公告)日：2023-02-14
申请号：US15494826
申请日：2017-04-24
Applicant: Intel Corporation
Inventor： Gokcen Cilingir , Elmoustapha Ould-Ahmed-Vall , Rajkishore Barik , Kevin Nealis , Xiaoming Chen , Justin E. Gottschlich , Prasoonkumar Surti , Chandrasekaran Sakthivel , Abhishek Appu , John C. Weast , Sara S. Baghsorkhi , Barnan Das , Narayan Biswal , Stanley J. Baran , Nilesh V. Shah , Archie Sharma , Mayuresh M. Varerkar
Abstract: An apparatus to facilitate neural network (NN) training is disclosed. The apparatus includes training logic to receive one or more network constraints and train the NN by automatically determining a best network layout and parameters based on the network constraints.
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