摘要:
In a solidification sensor for measuring a solidification state of a liquid with a high degree of accuracy in real time, and for making the sensor small-sized with a reduced power consumption, the solidification sensor comprises a liquid absorbing portion formed of a liquid absorbable material, a substrate coupled to the liquid absorbing portion and a strain sensor for measuring strain exerted to the substrate due to a volumetric change upon solidification of a liquid absorbed in the liquid absorbing portion.
摘要:
In a solidification sensor for measuring a solidification state of a liquid with a high degree of accuracy in real time, and for making the sensor small-sized with a reduced power consumption, the solidification sensor comprises a liquid absorbing portion formed of a liquid absorbable material, a substrate coupled to the liquid absorbing portion and a strain sensor for measuring strain exerted to the substrate due to a volumetric change upon solidification of a liquid absorbed in the liquid absorbing portion.
摘要:
An IC card has an IC chip and a circuit layer formed between layers of a base material that are adhered together by an adhesive. The IC card has a thickness of 0.25 to 0.76 mm and therefore the thickness of the IC chip needs to be about 0.2 mm, which requires grinding of the IC chip. In use, the IC card is subject to bending forces which apply a bending stress on the chip. In the process of grinding the IC chip, grinding flaws having sharp parts arise that reduce the bending strength of the chip. Also, during the dicing process of the wafer, chipping occurs that results in notches having sharp tip parts being formed in the chip. The grinding flaws that result from the grinding and the notches that result from the chipping are etched to remove their sharpness, which occurs at the tip part of the grinding flaw or the tip part of the notch. By rounding these sharp parts through the etching step, the bending strength of the IC chip increases and the durability of the IC card is ensured.
摘要:
Provided is a semiconductor device which includes a metal oxide semiconductor (MOS) transistor having high driving performance and high withstanding voltage with a thick gate oxide film. In the local oxidation-of-silicon (LOCOS) offset MOS transistor having high withstanding voltage, in order to prevent a gate oxide film (6) formed on a channel formation region (7) from being etched at a time of removing the gate oxide film (6) with a polycrystalline silicon gate electrode (8) being used as a mask to form a second conductivity type high concentration source region (4) and a second conductivity type high concentration drain region (5), a source field oxide film (14) is formed also on a source side of the channel formation region (7), and in addition, a length of a second conductivity type high concentration source field region (13) is optimized. Accordingly, it is possible to obtain a MOS transistor having high driving performance and high withstanding voltage with a thick gate oxide film.
摘要:
Provided is a lateral semiconductor device with a trench structure for improving driving capability. A trench portion is formed in a well to give concave and convex portions in a gate width direction. A gate electrode is formed inside and above the trench portion with an insulating film therebetween. A source region is formed on one side of the gate electrode in a gate length direction, and a drain region is formed on the other side, both formed by impurity diffusion from polycrystalline silicon containing an impurity and filling the inside of the trench portion, deep enough to reach vicinity of the bottom of the gate electrode (vicinity of bottom of trench portion). By thus forming a deep source region and a deep drain region, current flow that would otherwise concentrate on a shallow part in the gate electrode becomes uniform throughout the trench portion and widening of an effective gate width owing to the concave and convex portions formed in the well lowers ON resistance, improving the driving capability.
摘要:
An impurity adsorption layer is formed on a substrate surface and solid-phase thermal diffusion is carried out to form source and drain regions for a metal-insulator-semiconductor field-effect-transistor having lightly doped drain structure or double doped drain structure. The thus formed impurity-doped region is ultrashallow, thereby producing high speed semiconductor devices of small dimensions.
摘要:
A solid phase diffusion process using boron silicide film as diffusion source to improve controllability of diffusion of boron impurity into a silicon substrate in order to achieve a shallow junction. The process includes: cleaning the surface of a Si substrate by removing the native oxide film thereof to expose an active surface; treating the active surface to form thereon a boron silicide film as an impurity source; and introducing boron impurity from the boron silicide film into the Si substrate to form a boron diffusion layer. In this manner, a boron diffusion layer having a high surface concentration and a shallow junction can be formed because the boron silicide film is formed directly on the surface of the Si substrate. Because the boron silicide film is chemically and physically stable, an improved diffusion controllability is obtained. The diffusion controllability is further improved by accurately evaluating the impurity film optically during the fabrication process. A structure composed of a boron diffusion layer and a boron silicide region provides a high speed, highly integrated, and highly reliable semiconductor device, particularly when the boron silicide region is disposed between an impurity region and an electrode metal.
摘要:
A PN junction device is formed by removing an inert film from a surface of an N type semiconductor layer to expose an active face, then applying a source gas containing an P type impurity component to the active face to form an impurity adsorption film, and thereafter carrying out a solid-phase diffusion of the impurity is carried out from a diffusion source composed of the P type impurity adsorption film into the N type semiconductor layer to form therein a P type semiconductor layer to thereby provide a PN junction. Lastly, a pair of electrodes are connected to the respective semiconductor layers to form the an PN junction device.
摘要:
A semiconductor device includes a second semiconductor package, which includes a substrate and at least one semiconductor package. The substrate includes a terminal group formed on a surface thereof. At least one first semiconductor package is stacked on the substrate, and includes a plurality of flexible substrates, each of which includes a wiring group on a surface thereof and each of which is bending-deformable. At least one first semiconductor package includes a plurality of semiconductor elements mounted on a plurality of flexible substrates. Electric conduction through the second semiconductor package is established by connecting the wiring group on each of a plurality of flexible substrates to the terminal group on the substrate. Further, at least one terminal of the terminal group on the substrate is electrically connected to all of the plurality of semiconductor elements on at least one first semiconductor package, and at least one other terminal of the terminal group is electrically connected only to particular semiconductor elements of the plurality of semiconductor elements.
摘要:
There is provided a bipolar transistor integrated circuit device having excellent characteristics by a simple process. A region where an impurity is not introduced is disposed in a part of a buried layer region for separating a collector region from a substrate, so that a bipolar transistor having low collector resistance can be formed. This can be applied also to a BiCMOS where insulated field effect transistors exist on the same substrate. These processes can be realized without adding a number of steps to a conventional process.