公开(公告)号：US4757358A

公开(公告)日：1988-07-12

申请号：US752216

申请日：1985-07-03

申请人： Harold J. Hovel ,  Jerry M. Woodall

发明人： Harold J. Hovel ,  Jerry M. Woodall

IPC分类号： H01L29/43 ,  H01L29/45 ,  H01L29/47 ,  H01L29/80

CPC分类号： H01L29/432 ,  H01L29/452 ,  H01L29/475 ,  H01L29/802

摘要： An FET transistor is provided having a two element semiconductor channel region between metal contacts and epitaxial therewith a graded three element seminconductor, in which two of the three elements are in common with the semiconductor of the channel, positioned between a Schottky barrier gate of the same contact metal and the channel. An FET with a GaAs channel between tin source and drain contacts, a graded 500 to 1000 Angstrom thick GaAlAs region epitaxial with the channel and a Schottky barrier tin metal gate over the GaAlAs region.

摘要翻译： 提供一种FET晶体管，其在金属触点之间具有两个元件半导体沟道区域，并与其外延，分级三元素半导体，其中三个元件中的两个与通道的半导体共同，位于相同的肖特基势垒栅极之间 接触金属和通道。 在锡源极和漏极触点之间具有GaAs沟道的FET，在沟道上外延延伸的500至1000埃厚的GaAlAs区域以及GaAlAs区域上的肖特基势垒锡金属栅极。

公开(公告)号：US4202704A

公开(公告)日：1980-05-13

申请号：US968887

申请日：1978-12-13

申请人： Rodney T. Hodgson ,  Harold J. Hovel ,  Jerry M. Woodall

发明人： Rodney T. Hodgson ,  Harold J. Hovel ,  Jerry M. Woodall

IPC分类号： H01L31/04 ,  H01L31/055

CPC分类号： H01L31/055 ,  Y02E10/52

摘要： Enhanced efficiency can be achieved in the construction of semiconductor optical energy conversion devices such as solar cells by providing a translucent frequency shifting supporting member with appropriate doping such as Al.sub.2 O.sub.3 :Cr.sup.+3 (Ruby) that is capable of shifting the wavelength of incident light energy in the direction of greatest efficiency of the semiconductor device. The efficiency can be further enhanced by providing a crystal perfection accommodation region between the active region of the device and the light frequency shifting substrate.

摘要翻译： 通过提供具有适当掺杂的半透明变频支撑构件，例如能够移动入射光能量的波长的Al 2 O 3 :Cr + 3（红宝石），可以在诸如太阳能电池的半导体光能转换装置的构造中实现增强的效率 在半导体器件效率最高的方向。 通过在器件的有源区域和光变换衬底之间提供晶体完整的容纳区域可以进一步提高效率。

公开(公告)号：US4276137A

公开(公告)日：1981-06-30

申请号：US59855

申请日：1979-07-23

申请人： Harold J. Hovel ,  Jerry M. Woodall

发明人： Harold J. Hovel ,  Jerry M. Woodall

IPC分类号： H01L31/04 ,  H01L31/0216 ,  H01L31/18

CPC分类号： H01L31/02167 ,  H01L31/02168 ,  Y02E10/50

摘要： Surface recombination in solar cells that is produced by band bending at the surface of the semiconductor which is in turn caused by defect states which pin the Fermi level at the surface, may be improved by applying a surface layer which may be a plasma oxide that has been hydrogen annealed and this layer may also be useful as an antireflecting coating.

摘要翻译： 通过在半导体的表面处的带状弯曲而产生的太阳能电池中的表面复合，其又由引导表面的费米能级的缺陷状态引起，可以通过施加表面层来改善，该表面层可以是具有 经过氢退火，该层也可用作抗反射涂层。

公开(公告)号：US4379005A

公开(公告)日：1983-04-05

申请号：US348526

申请日：1982-02-12

申请人： Harold J. Hovel ,  Jerry M. Woodall

发明人： Harold J. Hovel ,  Jerry M. Woodall

IPC分类号： H01L21/285 ,  H01L21/337 ,  H01L29/812 ,  H01L21/24

CPC分类号： H01L29/66924 ,  H01L21/28575 ,  H01L21/28581 ,  H01L21/28587 ,  H01L29/812 ,  Y10S438/916

摘要： Semiconductor devices can be fabricated using as an intermediate manufacturing structure a substrate of one semiconductor with a thin epitaxial surface layer of a different semiconductor with properties such that the semiconductors each have different solubilities with respect to a metal. When a vertical differentiation is used to expose the different materials and the metal is deposited on both and heated, the metal will form a Schottky barrier in one material and an ohmic contact in the other. Where the substrate is gallium arsenide and the epitaxial layer is gallium aluminum arsenide and the metal is tin, a self-aligned gallium arsenide MESFET is formed wherein the tin forms ohmic contacts with the gallium arsenide and a Schottky barrier contact with the gallium aluminum arsenide.

摘要翻译： 可以使用具有不同半导体的薄外延表面层的半导体衬底作为中间制造结构来制造半导体器件，其性能使得半导体对于金属具有不同的溶解度。 当使用垂直分化来暴露不同的材料并且金属沉积在两者上并被加热时，金属将在一种材料中形成肖特基势垒并在另一种材料中形成欧姆接触。 在衬底是砷化镓并且外延层是砷化镓铝并且金属是锡的情况下，形成自对准的砷化镓MESFET，其中锡与砷化镓形成欧姆接触，并与砷化镓砷化物进行肖特基势垒接触。

公开(公告)号：US4178195A

公开(公告)日：1979-12-11

申请号：US918114

申请日：1978-06-22

申请人： Harold J. Hovel ,  Jerry M. Woodall

发明人： Harold J. Hovel ,  Jerry M. Woodall

IPC分类号： H01L21/208 ,  H01L31/0693

CPC分类号： H01L31/0693 ,  H01L21/02395 ,  H01L21/02546 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/02625 ,  H01L21/02658 ,  Y02E10/544 ,  Y10S438/955

摘要： A technique for fabricating a semiconductor heterostructure by growth of a ternary semiconductor on a binary semiconductor substrate from a melt of the ternary semiconductor containing less than saturation of at least one common ingredient of both the binary and ternary semiconductors wherein in a single temperature step the binary semiconductor substrate is etched, a p-n junction with specific device characteristics is produced in the binary semiconductor substrate by diffusion of a dopant from the melt and a region of the ternary semiconductor of precise conductivity type and thickness is grown by virtue of a change in the melt characteristics when the etched binary semiconductor enters the melt.

摘要翻译： 一种用于通过在二元半导体衬底上由三元半导体的熔体生长含有少于二元和三元半导体的至少一种共同成分的饱和度的三元半导体制造半导体异质结构的技术，其中在单一温度步骤中，二元 半导体衬底被蚀刻，在二元半导体衬底中通过从熔体中扩散掺杂剂而产生具有特定器件特性的pn结，并且由于熔体的变化而使精确导电类型和厚度的三元半导体区域生长 当蚀刻的二元半导体进入熔体时的特性。

公开(公告)号：US08878259B2

公开(公告)日：2014-11-04

申请号：US13555383

申请日：2012-07-23

申请人： Harold J. Hovel ,  Qiang Huang ,  Xiaoyan Shao ,  James Vichiconti ,  George F. Walker

发明人： Harold J. Hovel ,  Qiang Huang ,  Xiaoyan Shao ,  James Vichiconti ,  George F. Walker

IPC分类号： H01L29/94 ,  H01L29/76 ,  H01L31/119 ,  H01L31/113 ,  H01L31/062 ,  H01L31/18 ,  B82Y10/00 ,  B82Y30/00 ,  C30B29/02 ,  C30B29/06 ,  C30B29/40 ,  C30B29/52 ,  C30B29/60 ,  C30B33/10 ,  H01L21/306 ,  H01L29/06 ,  H01L29/12 ,  H01L31/0352 ,  H01L33/20

CPC分类号： H01L31/18 ,  B82Y10/00 ,  B82Y30/00 ,  C30B29/02 ,  C30B29/06 ,  C30B29/40 ,  C30B29/52 ,  C30B29/60 ,  C30B29/605 ,  C30B33/10 ,  H01L21/30604 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/125 ,  H01L31/0352 ,  H01L33/20

摘要： Segmented semiconductor nanowires are manufactured by removal of material from a layered structure of two or more semiconductor materials in the absence of a template. The removal takes place at some locations on the surface of the layered structure and continues preferentially along the direction of a crystallographic axis, such that nanowires with a segmented structure remain at locations where little or no removal occurs. The interface between different segments can be perpendicular to or at angle with the longitudinal direction of the nanowire.

摘要翻译： 在没有模板的情况下通过从两种或更多种半导体材料的层状结构中去除材料来制造分段半导体纳​​米线。 去除在层状结构的表面上的某些位置处发生，并且优选地沿着结晶轴的方向延伸，使得具有分段结构的纳米线保持在很少或不发生去除的位置。 不同片段之间的界面可以垂直于纳米线的纵向方向或与之相垂直。

公开(公告)号：US08665575B2

公开(公告)日：2014-03-04

申请号：US13166842

申请日：2011-06-23

申请人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Krause ,  Zhengwen Li ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin Prettyman ,  Carl J. Radens ,  Brian C. Sapp

发明人： Lawrence A. Clevenger ,  Harold J. Hovel ,  Rainer Krause ,  Zhengwen Li ,  Kevin S. Petrarca ,  Gerd Pfeiffer ,  Kevin Prettyman ,  Carl J. Radens ,  Brian C. Sapp

IPC分类号： H02H5/04

CPC分类号： H02H7/20 ,  H01L31/02021 ,  H02H5/047 ,  Y02E10/50

摘要： A photovoltaic module (10) with a plurality of solar cells (20) interconnected in serial and/or parallel arrangement within the module (10) is equipped with an overheat protection system (30) for suppressing damages of the photovoltaic module (10) due to defects of the solar cells (20). The overheat protection system (30) comprises a heat sensor (32) which is thermally coupled to a solar cell (20). The heat sensor (32) is physically integrated into an electrical switch (34, 36, 38) which is electrically connected to said solar cell (20).

摘要翻译： 具有在模块（10）内以串联和/或并联布置互连的多个太阳能电池（20）的光伏模块（10）装备有过热保护系统（30），用于抑制光伏模块（10）的损坏 涉及太阳能电池的缺陷（20）。 过热保护系统（30）包括热耦合到太阳能电池（20）的热传感器（32）。 热传感器（32）物理地集成在电连接到所述太阳能电池（20）的电开关（34,36,38）中。

公开(公告)号：US08653360B2

公开(公告)日：2014-02-18

申请号：US12849966

申请日：2010-08-04

申请人： Stephen W. Bedell ,  Harold J. Hovel ,  Daniel A. Inns ,  Jee H. Kim ,  Alexander Reznicek ,  Devendra K. Sadana

发明人： Stephen W. Bedell ,  Harold J. Hovel ,  Daniel A. Inns ,  Jee H. Kim ,  Alexander Reznicek ,  Devendra K. Sadana

IPC分类号： H01L31/00 ,  H01L21/00

CPC分类号： H01L31/065 ,  H01L31/03765 ,  H01L31/075 ,  H01L31/18 ,  Y02E10/548

摘要： A photovoltaic device includes a composition modulated semiconductor structure including a p-doped first semiconductor material layer, a first intrinsic compositionally-graded semiconductor material layer, an intrinsic semiconductor material layer, a second intrinsic compositionally-graded semiconductor layer, and an n-doped first semiconductor material layer. The first and second intrinsic compositionally-graded semiconductor material layers include an alloy of a first semiconductor material having a greater band gap width and a second semiconductor material having a smaller band gap with, and the concentration of the second semiconductor material increases toward the intrinsic semiconductor material layer in the first and second compositionally-graded semiconductor material layers. The photovoltaic device provides an open circuit voltage comparable to that of the first semiconductor material, and a short circuit current comparable to that of the second semiconductor material, thereby increasing the efficiency of the photovoltaic device.

摘要翻译： 光伏器件包括组成调制的半导体结构，其包括p掺杂的第一半导体材料层，第一本征成分梯度半导体材料层，本征半导体材料层，第二本征组分梯度半导体层和n掺杂的第一半导体层 半导体材料层。 第一和第二本征成分梯度半导体材料层包括具有较大带隙宽度的第一半导体材料和具有较小带隙的第二半导体材料的合金，并且第二半导体材料的浓度朝向本征半导体 第一和第二组成梯度半导体材料层中的材料层。 光电器件提供与第一半导体材料相当的开路电压，以及与第二半导体材料相当的短路电流，从而提高光伏器件的效率。

公开(公告)号：US08569803B2

公开(公告)日：2013-10-29

申请号：US13572742

申请日：2012-08-13

申请人： Christy S. Tyberg ,  Katherine L. Saenger ,  Jack O. Chu ,  Harold J. Hovel ,  Robert L. Wisnieff ,  Kerry Bernstein ,  Stephen W. Bedell

发明人： Christy S. Tyberg ,  Katherine L. Saenger ,  Jack O. Chu ,  Harold J. Hovel ,  Robert L. Wisnieff ,  Kerry Bernstein ,  Stephen W. Bedell

IPC分类号： H01L29/76

CPC分类号： H01L23/5226 ,  H01L23/53271 ,  H01L27/124 ,  H01L27/1248 ,  H01L2924/0002 ,  H01L2924/00

摘要： This invention provides structures and a fabrication process for incorporating thin film transistors in back end of the line (BEOL) interconnect structures. The structures and fabrication processes described are compatible with processing requirements for the BEOL interconnect structures. The structures and fabrication processes utilize existing processing steps and materials already incorporated in interconnect wiring levels in order to reduce added cost associated with incorporating thin film transistors in the these levels. The structures enable vertical (3D) integration of multiple levels with improved manufacturability and reliability as compared to prior art methods of 3D integration.

摘要翻译： 本发明提供了用于在线路后端（BEOL）互连结构中并入薄膜晶体管的结构和制造工艺。 所描述的结构和制造工艺与BEOL互连结构的处理要求相兼容。 结构和制造工艺利用已经并入到互连布线层中的现有处理步骤和材料，以便降低与在这些层级中引入薄膜晶体管相关联的附加成本。 与现有技术的3D集成方法相比，该结构能够实现多层次的垂直（3D）集成，具有改进的可制造性和可靠性。

公开(公告)号：US08426236B2

公开(公告)日：2013-04-23

申请号：US12775939

申请日：2010-05-07

申请人： Cyril Cabral, Jr. ,  Harold J. Hovel ,  Xiaoyan Shao

发明人： Cyril Cabral, Jr. ,  Harold J. Hovel ,  Xiaoyan Shao

IPC分类号： H01L21/00

CPC分类号： H01L31/18 ,  H01L31/022425 ,  Y02E10/50

摘要： A grid stack structure of a solar cell, which includes a silicon substrate, wherein a front side of the silicon is doped with phosphorus to form a n-emitter and a back side of the silicon is screen printed with aluminum (Al) metallization; a dielectric layer, which acts as an antireflection coating (ARC), applied on the silicon; a mask layer applied on the front side to define a grid opening of the dielectric layer, wherein an etching method is applied to open an unmasked grid area; a light-induced plated nickel or cobalt layer applied to the front side with electrical contact to the back side Al metallization; a silicide layer formed by rapid thermal annealing of the plated nickel (Ni) or cobalt (Co); an optional barrier layer electrodeposited on the silicide; a copper (Cu) layer electrodeposited on the silicide/barrier film layer; and a thin protective layer is chemically applied or electrodeposited on top of the Cu layer.

摘要翻译： 包括硅衬底的太阳能电池的栅格堆叠结构，其中硅的正面被磷掺杂以形成n发射极，硅的背面用铝（Al）金属化丝网印刷; 作为抗反射涂层（ARC）的介电层，施加在硅上; 施加在前侧的掩模层以限定电介质层的栅格开口，其中施加蚀刻方法以打开未屏蔽的栅格区域; 施加到前侧的光诱导的镀镍或钴层与后侧Al金属化电接触; 通过镀镍（Ni）或钴（Co）的快速热退火形成的硅化物层; 电沉积在硅化物上的可选阻挡层; 电沉积在硅化物/阻挡膜层上的铜（Cu）层; 并且将薄的保护层化学施加或电沉积在Cu层的顶部上。