公开(公告)号：US08243503B2

公开(公告)日：2012-08-14

申请号：US12958106

申请日：2010-12-01

申请人： Kaizhong Gao ,  Haiwen Xi ,  Yiming Shi ,  Song S. Xue ,  Sining Mao

发明人： Kaizhong Gao ,  Haiwen Xi ,  Yiming Shi ,  Song S. Xue ,  Sining Mao

IPC分类号： G11C11/00

CPC分类号： G11C11/1675 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673

摘要： The present invention relates to a memory cell including a first reference layer having a first magnetization with a first magnetization direction and a second reference layer having a second magnetization with a second magnetization direction substantially perpendicular to the first magnetization direction. A storage layer is disposed between the first reference layer and second reference layer and has a third magnetization direction about 45° from the first magnetization direction and about 135° from the second magnetization direction when the memory cell is in a first data state, and a fourth magnetization direction opposite the third magnetization direction when the memory cell is in a second data state.

摘要翻译： 本发明涉及包括具有第一磁化方向的第一磁化的第一参考层和具有基本上垂直于第一磁化方向的第二磁化方向的第二磁化的第二参考层的存储单元。 存储层设置在第一参考层和第二参考层之间，并且当存储单元处于第一数据状态时，具有从第一磁化方向大约45°的第三磁化方向和从第二磁化方向开始的大约135°的存储层， 当存储单元处于第二数据状态时与第三磁化方向相反的第四磁化方向。

公开(公告)号：US08059450B2

公开(公告)日：2011-11-15

申请号：US12899646

申请日：2010-10-07

申请人： Haiwen Xi ,  Song S. Xue

发明人： Haiwen Xi ,  Song S. Xue

IPC分类号： G11C11/00

CPC分类号： G11C13/0069 ,  G11C11/5664 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0014 ,  G11C13/0016 ,  G11C13/0064 ,  G11C2013/0073 ,  G11C2211/5621 ,  G11C2213/31 ,  G11C2213/32

摘要： Write verify methods for resistance random access memory (RRAM) are provided. The methods include applying a reset operation voltage pulse across a RRAM cell to change a resistance of the RRAM cell from a low resistance state to a high resistance state. Then the method includes applying a forward resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance value less than a selected lower resistance limit value. This step is repeated until the high resistance state resistance value is greater than the lower resistance limit value. The method also includes applying a reverse resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance values is greater than a selected upper resistance limit value. The reverse resetting voltage pulse has a second polarity being opposite the first polarity. This step is repeated until all the high resistance state resistance value is less than the upper resistance limit value.

摘要翻译： 提供了电阻随机存取存储器（RRAM）的写验证方法。 所述方法包括在RRAM单元之间施加复位操作电压脉冲，以将RRAM单元的电阻从低电阻状态改变为高电阻状态。 然后，该方法包括如果RRAM单元具有小于所选择的较低电阻极限值的高电阻状态电阻值，则在RRAM单元之间施加正向复位电压脉冲。 重复该步骤直到高电阻状态电阻值大于下限电阻值。 该方法还包括如果RRAM单元具有大于所选上限电阻值的高电阻状态电阻值，则跨越RRAM单元施加反向复位电压脉冲。 反向复位电压脉冲具有与第一极性相反的第二极性。 重复该步骤，直到所有高电阻状态电阻值小于上限电阻值。

公开(公告)号：US20110121418A1

公开(公告)日：2011-05-26

申请号：US13015320

申请日：2011-01-27

申请人： Haiwen Xi ,  Kaizhong Gao ,  Dimitar V. Dimitrov ,  Song S. Xue

发明人： Haiwen Xi ,  Kaizhong Gao ,  Dimitar V. Dimitrov ,  Song S. Xue

IPC分类号： H01L29/82 ,  H01L21/02

CPC分类号： H01L43/08 ,  G11C11/16 ,  G11C11/1675 ,  Y10T428/1114 ,  Y10T428/1121

摘要： A free ferromagnetic data storage layer of an MRAM cell is coupled to a free ferromagnetic stabilization layer, which stabilization layer is directly electrically coupled to a contact electrode, on one side, and is separated from the free ferromagnetic data storage layer, on an opposite side, by a spacer layer. The spacer layer provides for the coupling between the two free layers, which coupling is one of: a ferromagnetic coupling and an antiferromagnetic coupling.

摘要翻译： MRAM单元的自由铁磁数据存储层耦合到自由铁磁稳定层，该稳定层在一侧直接电耦合到接触电极，并在相对侧与自由铁磁数据存储层分离 ，通过间隔层。 间隔层提供两个自由层之间的耦合，该耦合是以下之一：铁磁耦合和反铁磁耦合。

公开(公告)号：US20110069537A1

公开(公告)日：2011-03-24

申请号：US12958106

申请日：2010-12-01

申请人： Kaizhong Gao ,  Haiwen Xi ,  Yiming Shi ,  Song S. Xue ,  Sining Mao

发明人： Kaizhong Gao ,  Haiwen Xi ,  Yiming Shi ,  Song S. Xue ,  Sining Mao

IPC分类号： G11C11/16 ,  G11C11/15

CPC分类号： G11C11/1675 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673

摘要： The present invention relates to a memory cell including a first reference layer having a first magnetization with a first magnetization direction and a second reference layer having a second magnetization with a second magnetization direction substantially perpendicular to the first magnetization direction. A storage layer is disposed between the first reference layer and second reference layer and has a third magnetization direction about 45° from the first magnetization direction and about 135° from the second magnetization direction when the memory cell is in a first data state, and a fourth magnetization direction opposite the third magnetization direction when the memory cell is in a second data state.

摘要翻译： 本发明涉及包括具有第一磁化方向的第一磁化的第一参考层和具有基本上垂直于第一磁化方向的第二磁化方向的第二磁化的第二参考层的存储单元。 存储层设置在第一参考层和第二参考层之间，并且当存储单元处于第一数据状态时，具有从第一磁化方向大约45°的第三磁化方向和从第二磁化方向开始的大约135°的存储层， 当存储单元处于第二数据状态时与第三磁化方向相反的第四磁化方向。

公开(公告)号：US07880209B2

公开(公告)日：2011-02-01

申请号：US12248257

申请日：2008-10-09

申请人： Haiwen Xi ,  Kaizhong Gao ,  Dimitar V. Dimitrov ,  Song S. Xue

发明人： Haiwen Xi ,  Kaizhong Gao ,  Dimitar V. Dimitrov ,  Song S. Xue

IPC分类号： H01L29/82

CPC分类号： H01L43/08 ,  G11C11/16 ,  G11C11/1675 ,  Y10T428/1114 ,  Y10T428/1121

摘要： A free ferromagnetic data storage layer of an MRAM cell is coupled to a free ferromagnetic stabilization layer, which stabilization layer is directly electrically coupled to a contact electrode, on one side, and is separated from the free ferromagnetic data storage layer, on an opposite side, by a spacer layer. The spacer layer provides for the coupling between the two free layers, which coupling is one of: a ferromagnetic coupling and an antiferromagnetic coupling.

摘要翻译： MRAM单元的自由铁磁数据存储层耦合到自由铁磁稳定层，该稳定层在一侧直接电耦合到接触电极，并在相对侧与自由铁磁数据存储层分离 ，通过间隔层。 间隔层提供两个自由层之间的耦合，该耦合是以下之一：铁磁耦合和反铁磁耦合。

公开(公告)号：US07859069B2

公开(公告)日：2010-12-28

申请号：US11724740

申请日：2007-03-16

申请人： Kaizhong Gao ,  Haiwen Xi ,  Yiming Shi ,  Song S. Xue ,  Sining Mao

发明人： Kaizhong Gao ,  Haiwen Xi ,  Yiming Shi ,  Song S. Xue ,  Sining Mao

IPC分类号： G11C11/15

CPC分类号： G11C11/1675 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673

摘要： The present invention relates to a memory cell including a first reference layer having a first magnetization with a first magnetization direction and a second reference layer having a second magnetization with a second magnetization direction substantially perpendicular to the first magnetization direction. A storage layer is disposed between the first reference layer and second reference layer and has a third magnetization direction about 45° from the first magnetization direction and about 135° from the second magnetization direction when the memory cell is in a first data state, and a fourth magnetization direction opposite the third magnetization direction when the memory cell is in a second data state.

摘要翻译： 本发明涉及包括具有第一磁化方向的第一磁化的第一参考层和具有基本上垂直于第一磁化方向的第二磁化方向的第二磁化的第二参考层的存储单元。 存储层设置在第一参考层和第二参考层之间，并且当存储单元处于第一数据状态时，具有从第一磁化方向大约45°的第三磁化方向和从第二磁化方向开始的大约135°的存储层， 当存储单元处于第二数据状态时与第三磁化方向相反的第四磁化方向。

公开(公告)号：US07826248B2

公开(公告)日：2010-11-02

申请号：US12123647

申请日：2008-05-20

申请人： Haiwen Xi ,  Song S. Xue

发明人： Haiwen Xi ,  Song S. Xue

IPC分类号： G11C11/00

CPC分类号： G11C13/0069 ,  G11C11/5664 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0014 ,  G11C13/0016 ,  G11C13/0064 ,  G11C2013/0073 ,  G11C2211/5621 ,  G11C2213/31 ,  G11C2213/32

摘要： Write verify methods for resistance random access memory (RRAM) are provided. The methods include applying a reset operation voltage pulse across a RRAM cell to change a resistance of the RRAM cell from a low resistance state to a high resistance state and setting a counter to zero. Then the method includes applying a forward resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance value less than a selected lower resistance limit value and adding one to the counter. This step is repeated until either the counter reaches a predetermined number or until the high resistance state resistance value is greater than the lower resistance limit value. The method also includes applying a reverse resetting voltage pulse across the RRAM cell if the RRAM cell has a high resistance state resistance values is greater than a selected upper resistance limit value and adding one to the counter. The reverse resetting voltage pulse has a second polarity being opposite the first polarity. This step is repeated until either the counter reaches a predetermined number or until all the high resistance state resistance value is less than the upper resistance limit value.

摘要翻译： 提供了电阻随机存取存储器（RRAM）的写验证方法。 所述方法包括在RRAM单元之间施加复位操作电压脉冲，以将RRAM单元的电阻从低电阻状态改变为高电阻状态，并将计数器设置为零。 然后，该方法包括如果RRAM单元具有小于所选择的较低电阻极限值的高电阻状态电阻值并且将一个加到计数器上，则在RRAM单元之间施加正向复位电压脉冲。 重复该步骤直到计数器达到预定数量，或者直到高电阻状态电阻值大于下限电阻值。 该方法还包括如果RRAM单元具有高电阻状态电阻值大于所选上限电阻值并将一个加到计数器上，则在RRAM单元之间施加反向复位电压脉冲。 反向复位电压脉冲具有与第一极性相反的第二极性。 重复该步骤直到计数器达到预定数量，或者直到所有高电阻状态电阻值都小于上限电阻值。

公开(公告)号：US20100053822A1

公开(公告)日：2010-03-04

申请号：US12200034

申请日：2008-08-28

申请人： Haiwen Xi ,  Paul Anderson ,  Zheng Gao ,  Xiaobin Wang ,  Dimitar V. Dimitrov ,  Song S. Xue

发明人： Haiwen Xi ,  Paul Anderson ,  Zheng Gao ,  Xiaobin Wang ,  Dimitar V. Dimitrov ,  Song S. Xue

IPC分类号： G11B5/127

CPC分类号： G01R33/093 ,  B82Y25/00 ,  G11C11/155 ,  G11C11/161 ,  G11C11/1675

摘要： A magnetic tunnel junction cell that has a ferromagnetic pinned layer, a ferromagnetic free layer, and a non-magnetic barrier layer therebetween. The free layer has a larger area than the pinned layer, in some embodiments at least twice the size of the pinned layer, in some embodiments at least three times the size of the pinned layer, and in yet other embodiments at least four times the size of the pinned layer. The pinned layer is offset from the center of the free layer. The free layer has a changeable vortex magnetization, changeable between clockwise and counterclockwise directions.

摘要翻译： 磁性隧道结电池，其具有铁磁性钉扎层，铁磁性自由层和它们之间的非磁性阻挡层。 自由层具有比被钉扎层更大的面积，在一些实施例中为钉扎层的尺寸的至少两倍，在一些实施例中为被钉扎层的尺寸的至少三倍，并且在其它实施例中为至少四倍的尺寸 被钉扎层。 固定层从自由层的中心偏移。 自由层具有可变的涡流磁化，可在顺时针和逆时针方向之间改变。

公开(公告)号：US20090262638A1

公开(公告)日：2009-10-22

申请号：US12106382

申请日：2008-04-21

申请人： Haiwen Xi ,  Dexin Wang ,  Dimitar V. Dimitrov ,  Paul E. Anderson ,  Song S. Xue

发明人： Haiwen Xi ,  Dexin Wang ,  Dimitar V. Dimitrov ,  Paul E. Anderson ,  Song S. Xue

IPC分类号： G11B9/00

CPC分类号： G11C11/16 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/1284 ,  G06T11/001 ,  G11C11/161 ,  G11C11/1675

摘要： Spin torque magnetic memory elements that have a pinned layer, two free layers, and a current-blocking insulating layer proximate to at least one of the free layers. The resistive state (e.g., low resistance or high resistance) of the memory elements is altered by passing electric current through the element in one direction. In other words, to change from a low resistance to a high resistance, the direction of electric current is the same as to change from a high resistance to a low resistance. The elements have a unidirectional write scheme.

摘要翻译： 具有钉扎层，两个自由层和靠近至少一个自由层的电流阻挡绝缘层的自旋扭矩磁存储元件。 存储元件的电阻状态（例如，低电阻或高电阻）通过在一个方向上通过元件的电流来改变。 换句话说，为了从低电阻变为高电阻，电流的方向与从高电阻变为低电阻相同。 这些元素具有单向写入方案。

公开(公告)号：US20090262467A1

公开(公告)日：2009-10-22

申请号：US12106363

申请日：2008-04-21

申请人： Haiwen Xi ,  Song S. Xue

发明人： Haiwen Xi ,  Song S. Xue

IPC分类号： G11B5/33

CPC分类号： G11C11/1675 ,  G11C11/161 ,  G11C11/1673

摘要： A magnetic junction memory array and methods of using the same are described. The magnetic junction memory array includes a plurality of electrically conductive word lines extending in a first direction, a plurality of electrically conductive bit lines extending in a second direction and forming a cross-point array with the plurality of electrically conductive word lines, and a memory cell proximate to, at least selected, cross-points forming a magnetic junction memory array. Each memory cell includes a magnetic pinned layer electrically between a magnetic bit and an isolation transistor. The isolation transistor has a current source and a gate. The current source is electrically coupled to the cross-point bit line and the gate is electrically coupled to the cross-point word line. An electrically conductive cover layer is disposed on and in electrical communication with the magnetic bits.

摘要翻译： 描述了磁结存储器阵列及其使用方法。 磁结存储器阵列包括沿第一方向延伸的多个导电字线，沿第二方向延伸的多个导电位线，并与多个导电字线形成交叉点阵列，以及存储器 靠近，至少选择的形成磁结存储器阵列的交叉点的单元。 每个存储单元包括在磁性位和隔离晶体管之间电气的磁性固定层。 隔离晶体管具有电流源和栅极。 电流源电耦合到交叉点位线，并且栅极电耦合到交叉点字线。 导电覆盖层设置在与磁头电气连接的位置上。