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    System and Method Providing Run-Time Parallelization of Computer Software Using Data Associated Tokens
    5.
    发明申请
    System and Method Providing Run-Time Parallelization of Computer Software Using Data Associated Tokens 有权
    使用数据关联令牌提供计算机软件的运行时并行化的系统和方法

    公开(公告)号：US20120066690A1

    公开(公告)日：2012-03-15

    申请号：US12882892

    申请日：2010-09-15

    Applicant: Gagan Gupta ,  Gurindar S. Sohi ,  Srinath Sridharan

    Inventor： Gagan Gupta ,  Gurindar S. Sohi ,  Srinath Sridharan

    IPC: G06F9/46

    CPC classification number: G06F9/526 ,  G06F8/45 ,  G06F9/46 ,  G06F9/50

    Abstract: A system and method of parallelizing programs assigns write tokens and read tokens to data objects accessed by computational operations. During run time, the write sets and read sets for computational operations are resolved and the computational operations executed only after they have obtained the necessary tokens for data objects corresponding to the resolved write and read sets. A data object may have unlimited read tokens but only a single write token and the write token may be released only if no read tokens are outstanding. Data objects provide a wait list which serves as an ordered queue for computational operations waiting for tokens.

    Abstract translation: 并行化程序的系统和方法将写入令牌和读取令牌分配给通过计算操作访问的数据对象。 在运行时间期间，用于计算操作的写入集合和读取集合被解析，并且只有在已经获得与分辨的写入和读取集合对应的数据对象的必要的令牌之后才执行计算操作。 数据对象可以具有无限制的读取令牌，但是只有单个写入令牌，并且只有在没有读取令牌未完成时才可以释放写入令牌。 数据对象提供等待列表，作为等待令牌的计算操作的有序队列。

    System and Method Providing Run-Time Parallelization of Computer Software Accommodating Data Dependencies
    6.
    发明申请
    System and Method Providing Run-Time Parallelization of Computer Software Accommodating Data Dependencies 有权
    提供计算机软件运行时并行化的系统和方法，适应数据依赖

    公开(公告)号：US20120047353A1

    公开(公告)日：2012-02-23

    申请号：US12858907

    申请日：2010-08-18

    Applicant: Gagan Gupta ,  Gurindar S. Schi ,  Srinath Sridharan

    Inventor： Gagan Gupta ,  Gurindar S. Schi ,  Srinath Sridharan

    IPC: G06F9/38

    CPC classification number: G06F9/3838 ,  G06F8/314 ,  G06F8/456 ,  G06F8/458 ,  G06F9/4881 ,  G06F9/5033 ,  G06F9/5038

    Abstract: A system and method of parallelizing programs employs runtime instructions to identify data accessed by program portions and to assign those program portions to particular processors based on potential overlap between the access data. Data dependence between different program portions may be identified and used to look for pending “predicate” program portions that could create data dependencies and to postpone program portions that may be dependent while permitting parallel execution of other program portions.

    Abstract translation: 并行程序的系统和方法采用运行时指令来识别由程序部分访问的数据，并且基于访问数据之间的潜在重叠将这些程序部分分配给特定的处理器。 可以识别不同程序部分之间的数据依赖性，并用于查找可能创建数据依赖性的待定“预定”程序部分，并推迟可能依赖于同时允许其他程序部分的并行执行的程序部分。

    Multi-Standard Transceiver Architecture with Common Balun and Mixer
    7.
    发明申请
    Multi-Standard Transceiver Architecture with Common Balun and Mixer 有权
    多标准收发器架构，采用普通平衡 - 调压器

    公开(公告)号：US20130116005A1

    公开(公告)日：2013-05-09

    申请号：US13464070

    申请日：2012-05-04

    Applicant: Ramkishore Ganti ,  Sanjeev Ranganathan ,  Srinath Sridharan

    Inventor： Ramkishore Ganti ,  Sanjeev Ranganathan ,  Srinath Sridharan

    IPC: H04W88/06

    CPC classification number: H04W88/06 ,  H04B1/0053 ,  H04B1/0458 ,  H04B1/0483 ,  H04B1/406

    Abstract: A multi-standard transceiver comprises a common balun, a controller, at least one first switch, and at least one second switch. The common balun comprises a primary coil and a secondary coil. The at least one first switch connects the primary coil of the balun to a first signal path associated with a first communication standard, or to a second signal path associated with a second communication standard responsive to a control signal provided by the controller. The at least one second switch connects the secondary coil of the balun to a first amplification path associated with the first communication standard, or to a second amplification path associated with the second communication standard responsive to a control signal provided by the controller. A common mixer is configured to provide upconverted signals to one of the signal paths depending on which communication standard has been selected.

    Abstract translation: 多标准收发器包括公共平衡 - 不平衡变压器，控制器，至少一个第一开关和至少一个第二开关。 普通的不平衡变压器包括初级线圈和次级线圈。 所述至少一个第一开关响应于由控制器提供的控制信号将平衡 - 不平衡变换器的初级线圈连接到与第一通信标准相关联的第一信号路径或者与第二通信标准相关联的第二信号路径。 响应于由控制器提供的控制信号，至少一个第二开关将平衡 - 不平衡变换器的次级线圈连接到与第一通信标准相关联的第一放大路径，或者连接到与第二通信标准相关联的第二放大路径。 公共混频器被配置为根据选择了哪个通信标准来向一个信号路径提供上变频信号。

    Digital variable gain mixer
    8.
    发明申请
    Digital variable gain mixer 有权
    数字可变增益混频器

    公开(公告)号：US20070072558A1

    公开(公告)日：2007-03-29

    申请号：US11394249

    申请日：2006-03-30

    Applicant: Srinath Sridharan ,  Ahmed Emira ,  Aria Eshraghi ,  David Welland

    Inventor： Srinath Sridharan ,  Ahmed Emira ,  Aria Eshraghi ,  David Welland

    IPC: H01Q11/12 ,  H04B1/04

    CPC classification number: H04B1/0475

    Abstract: A method includes controlling a mixer gain to provide a range of selected power output levels from the mixer using a first control scheme for a low portion of the range and using a second control scheme for a high portion of the range. Using the selected mixer gain, incoming baseband signals may be upconverted in the mixer to a transmission frequency and output from the mixer at the selected power output level.

    Abstract translation: 一种方法包括：控制混频器增益，以使用第一控制方案从该混频器提供所选择的功率输出电平的范围，并对该范围的高部分使用第二控制方案。 使用所选择的混频器增益，输入基带信号可以在混频器中上变频到传输频率，并在所选功率输出电平下从混频器输出。

    Multi-standard transceiver architecture with common balun and mixer
    9.
    发明授权
    Multi-standard transceiver architecture with common balun and mixer 有权
    具有普通平衡 - 不平衡转换器和混频器的多标准收发器架构

    公开(公告)号：US08892159B2

    公开(公告)日：2014-11-18

    申请号：US13464070

    申请日：2012-05-04

    Applicant: Ramkishore Ganti ,  Sanjeev Ranganathan ,  Srinath Sridharan

    Inventor： Ramkishore Ganti ,  Sanjeev Ranganathan ,  Srinath Sridharan

    IPC: H04W88/06 ,  H04B1/00 ,  H04B1/04 ,  H04B1/40

    CPC classification number: H04W88/06 ,  H04B1/0053 ,  H04B1/0458 ,  H04B1/0483 ,  H04B1/406

    Abstract: A multi-standard transceiver comprises a common balun, a controller, at least one first switch, and at least one second switch. The common balun comprises a primary coil and a secondary coil. The at least one first switch connects the primary coil of the balun to a first signal path associated with a first communication standard, or to a second signal path associated with a second communication standard responsive to a control signal provided by the controller. The at least one second switch connects the secondary coil of the balun to a first amplification path associated with the first communication standard, or to a second amplification path associated with the second communication standard responsive to a control signal provided by the controller. A common mixer is configured to provide upconverted signals to one of the signal paths depending on which communication standard has been selected.

    Abstract translation: 多标准收发器包括公共平衡 - 不平衡变压器，控制器，至少一个第一开关和至少一个第二开关。 普通的不平衡变压器包括初级线圈和次级线圈。 所述至少一个第一开关响应于由控制器提供的控制信号将平衡 - 不平衡变换器的初级线圈连接到与第一通信标准相关联的第一信号路径或者与第二通信标准相关联的第二信号路径。 响应于由控制器提供的控制信号，至少一个第二开关将平衡 - 不平衡变换器的次级线圈连接到与第一通信标准相关联的第一放大路径，或者连接到与第二通信标准相关联的第二放大路径。 公共混频器被配置为根据选择了哪个通信标准来向一个信号路径提供上变频信号。

    Coupling of speakers with integrated circuit
    10.
    发明授权
    Coupling of speakers with integrated circuit 有权
    扬声器与集成电路耦合

    公开(公告)号：US08787588B2

    公开(公告)日：2014-07-22

    申请号：US12713083

    申请日：2010-02-25

    Applicant: Sanjeev Ranganathan ,  Shyam Somayajula ,  Srinath Sridharan ,  Arnold D'Souza ,  Ramkishore Ganti ,  Lionel Cimaz

    Inventor： Sanjeev Ranganathan ,  Shyam Somayajula ,  Srinath Sridharan ,  Arnold D'Souza ,  Ramkishore Ganti ,  Lionel Cimaz

    IPC: H04R1/10 ,  H04R5/033

    CPC classification number: H04R5/033 ,  H04R5/04

    Abstract: Systems and methods for a low pin architecture to couple speakers with integrated circuits are disclosed herein. In an implementation, the low pin architecture facilitates in reducing the required pin interfaces to couple a low power speaker, a high power speaker, and earphone speakers with integrated circuits (ICs). For this, the high power speaker can be cross-coupled between the pin interfaces that are coupled to the low power speaker and the earphone speakers. These pin interfaces are driven by corresponding driver circuits. In said implementation, some of the driver circuits can be shared to drive multiple pin interfaces. These shared driver circuits include a combined cascode circuit having a first cascode circuit integrated with a second cascode circuit to reliably and selectively drive one or more of the pin interfaces.

    Abstract translation: 本文公开了用于将扬声器耦合到集成电路的低引脚架构的系统和方法。 在一个实现中，低引脚架构有助于减少所需的引脚接口以将低功率扬声器，大功率扬声器和具有集成电路（IC）的耳机扬声器耦合。 为此，大功率扬声器可以在耦合到低功率扬声器的引脚接口和耳机扬声器之间交叉耦合。 这些引脚接口由相应的驱动电路驱动。 在所述实现中，可以共享一些驱动器电路以驱动多个引脚接口。 这些共享驱动器电路包括组合共源共栅电路，其具有与第二共源共栅电路集成的第一共源共栅电路，以可靠且选择性地驱动一个或多个引脚接口。

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