公开(公告)号：US10444450B2

公开(公告)日：2019-10-15

申请号：US15985767

申请日：2018-05-22

Applicant: FUJITSU LIMITED

Inventor： Takayoshi Matsumura ,  Naoaki Nakamura ,  Kenji Fukuzono ,  Norio Kainuma ,  Takashi Kubota ,  Takumi Masuyama ,  Yuki Hoshino ,  Hidehiko Kira

IPC: G02B6/42 ,  H04B10/50

Abstract: An optical module includes a substrate, a silicon photonics chip disposed in an opening of the substrate, a control chip disposed across the substrate and the silicon photonics chip, a plurality of laser diodes disposed over the silicon photonics chip, and a metallic bar in contact with each of terminals of the plurality of laser diodes and electrically coupling each of the terminals with the silicon photonics chip or the substrate.

公开(公告)号：US09536857B1

公开(公告)日：2017-01-03

申请号：US15209846

申请日：2016-07-14

Applicant: FUJITSU LIMITED

Inventor： Hidehiko Kira ,  Takumi Masuyama ,  Norio Kainuma

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/75 ,  H01L24/81 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75252 ,  H01L2224/75304 ,  H01L2224/75312 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/83191 ,  H01L2924/3511 ,  H01L2924/014

Abstract: A heating header of a semiconductor mounting apparatus includes: a first material; and a second material, the second material being bonded to the first material and coming into contact with a first semiconductor chip when the first semiconductor chip is compressed, wherein a contact surface of the second material with the first semiconductor chip is a curved surface that is convex toward the first semiconductor chip side, and the contact surface of the second material with the first semiconductor chip becomes a planar surface when each temperature of the first material and the second material reaches a melting temperature of a solder that is formed between a first terminal of the first semiconductor chip and a second terminal of a second semiconductor chip.

Abstract translation: 半导体安装装置的加热集管包括：第一材料; 以及第二材料，当所述第一半导体芯片被压缩时，所述第二材料被接合到所述第一材料并与第一半导体芯片接触，其中所述第二材料与所述第一半导体芯片的接触表面是曲面， 朝向第一半导体芯片侧凸起，并且当第一材料和第二材料的每个温度达到形成在第一半导体芯片侧的第一端子之间的焊料的熔化温度时，第二材料与第一半导体芯片的接触表面变为平坦表面 的第一半导体芯片和第二半导体芯片的第二端子。

公开(公告)号：US09793221B2

公开(公告)日：2017-10-17

申请号：US15009969

申请日：2016-01-29

Applicant: FUJITSU LIMITED

Inventor： Hidehiko Kira ,  Norio Kainuma ,  Takashi Kubota ,  Takumi Masuyama

IPC: H01L23/00 ,  H01L23/544 ,  H01L23/31

CPC classification number: H01L23/544 ,  H01L23/3157 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/27632 ,  H01L2224/2783 ,  H01L2224/279 ,  H01L2224/29011 ,  H01L2224/29018 ,  H01L2224/29019 ,  H01L2224/29076 ,  H01L2224/29082 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/3201 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75301 ,  H01L2224/75745 ,  H01L2224/75753 ,  H01L2224/8113 ,  H01L2224/81132 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81207 ,  H01L2224/81815 ,  H01L2224/81895 ,  H01L2224/8313 ,  H01L2224/83132 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/273 ,  H01L21/78

Abstract: A first insulating film is applied onto a joining face of a semiconductor device including a connection terminal on a joining face, and the connection terminal is embedded inside the first insulating film. The second insulating film is formed on a joining target face of a joining target, which includes a connection target terminal on the joining target face, and the connection target terminal is embedded inside the second insulating film. The semiconductor device and the joining target are joined together by applying pressure and causing the semiconductor device and the joining target to make contact with each other.

公开(公告)号：US20170186721A1

公开(公告)日：2017-06-29

申请号：US15365192

申请日：2016-11-30

Applicant: FUJITSU LIMITED

Inventor： Hidehiko Kira ,  Takumi Masuyama

IPC: H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/75 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/75301 ,  H01L2224/75745 ,  H01L2224/81203 ,  H01L2225/06513 ,  H01L2225/06558

Abstract: A semiconductor mounting apparatus includes a storing unit that stores a liquid or a gas, a contact unit that comes into contact with a semiconductor chip when the storing unit is filled with the liquid or the gas, and a sucking unit that sucks up the semiconductor chip to bring the semiconductor chip into close contact with the contact unit.

公开(公告)号：US09053262B2

公开(公告)日：2015-06-09

申请号：US13648335

申请日：2012-10-10

Applicant: FUJITSU LIMITED

Inventor： Hiroshi Kobayashi ,  Satoshi Emoto ,  Toru Okada ,  Masayuki Kitajima ,  Takumi Masuyama

IPC: G06F17/50 ,  H01L23/00 ,  H05K3/00 ,  H05K1/02

CPC classification number: G06F17/5009 ,  G06F17/5086 ,  H01L24/10 ,  H05K1/0271 ,  H05K3/0005

Abstract: A method of determining a reinforcement position of a circuit board includes: setting a numerical model of a circuit board in which an electronic component is mounted in a front surface by bumps, and a reinforcing member is attached to a position corresponding to a bump located in a corner part of the electrical component in a back surface; incorporating information about a stud that is located in a periphery of the electronic component and fixes the circuit board to a chassis of the electronic device; performing a simulation for obtaining values of stresses generated in bumps of corner parts when a force is applied to the electronic component from a back side of the circuit board; and determining an arrangement of the reinforcing member in accordance with a position of the stud based on the values of stresses obtained by the simulation.

Abstract translation: 确定电路板的加强位置的方法包括：通过凸块设置其中电子部件安装在前表面中的电路板的数值模型，并且加强构件附接到对应于位于 背面的电气部件的角部; 结合关于位于电子部件的周边中的螺柱的信息，并将电路板固定到电子设备的底盘; 执行模拟，用于当从电路板的背面向力量施加到电子部件时，获得在角部的凸起中产生的应力的值; 并且基于通过模拟获得的应力值，根据螺柱的位置确定加强构件的布置。

公开(公告)号：US10586770B2

公开(公告)日：2020-03-10

申请号：US16180084

申请日：2018-11-05

Applicant: FUJITSU LIMITED

Inventor： Takayoshi Matsumura ,  Naoaki Nakamura ,  Norio Kainuma ,  Takashi Kubota ,  Kenji Fukuzono ,  Takumi Masuyama ,  Yuki Hoshino ,  Hidehiko Kira

IPC: H01L21/00 ,  H01L23/538 ,  H01S5/02 ,  H01L23/367 ,  H01L25/075 ,  H01S5/022 ,  H01L23/00 ,  G02B6/42

Abstract: An optical module includes: a substrate including a through hole, a first chip including a first heating member and disposed in the through hole, a second chip including a second heating member and bonded to a first upper surface of the substrate and a second upper surface of the first chip via bumps, and a first heat sink adhered to a lower surface of the substrate with a first adhesive and adhered to a lower surface of the first chip with a second adhesive, wherein the substrate includes a slit which is provided on a side of a first portion, to which the second chip is bonded, of the substrate with respect to the through hole, and communicates with the through hole.

公开(公告)号：US20190157207A1

公开(公告)日：2019-05-23

申请号：US16180084

申请日：2018-11-05

Applicant: FUJITSU LIMITED

Inventor： Takayoshi Matsumura ,  Naoaki Nakamura ,  NORIO KAINUMA ,  TAKASHI KUBOTA ,  KENJI FUKUZONO ,  Takumi Masuyama ,  Yuki Hoshino ,  Hidehiko Kira

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/367 ,  H01L25/075 ,  H01S5/022 ,  H01S5/02

Abstract: An optical module includes: a substrate including a through hole, a first chip including a first heating member and disposed in the through hole, a second chip including a second heating member and bonded to a first upper surface of the substrate and a second upper surface of the first chip via bumps, and a first heat sink adhered to a lower surface of the substrate with a first adhesive and adhered to a lower surface of the first chip with a second adhesive, wherein the substrate includes a slit which is provided on a side of a first portion, to which the second chip is bonded, of the substrate with respect to the through hole, and communicates with the through hole.

公开(公告)号：US20180341075A1

公开(公告)日：2018-11-29

申请号：US15985767

申请日：2018-05-22

Applicant: FUJITSU LIMITED

Inventor： Takayoshi Matsumura ,  Naoaki Nakamura ,  KENJI FUKUZONO ,  NORIO KAINUMA ,  TAKASHI KUBOTA ,  Takumi Masuyama ,  Yuki Hoshino ,  Hidehiko Kira

IPC: G02B6/42 ,  H04B10/50

CPC classification number: G02B6/4268 ,  G02B6/4245 ,  G02B6/4274 ,  H04B10/505

Abstract: An optical module includes a substrate, a silicon photonics chip disposed in an opening of the substrate, a control chip disposed across the substrate and the silicon photonics chip, a plurality of laser diodes disposed over the silicon photonics chip, and a metallic bar in contact with each of terminals of the plurality of laser diodes and electrically coupling each of the terminals with the silicon photonics chip or the substrate.

公开(公告)号：US20180217343A1

公开(公告)日：2018-08-02

申请号：US15874927

申请日：2018-01-19

Applicant: FUJITSU LIMITED

Inventor： Takayoshi Matsumura ,  Naoaki Nakamura ,  NORIO KAINUMA ,  KENJI FUKUZONO ,  Yuki Hoshino ,  TAKASHI KUBOTA ,  Takumi Masuyama ,  Hidehiko Kira

IPC: G02B6/42 ,  H01S5/022 ,  H01S5/024

CPC classification number: G02B6/4269 ,  G02B6/4257 ,  G02B6/428 ,  H01L23/13 ,  H01L23/367 ,  H01L23/3675 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2924/12042 ,  H01S5/02208 ,  H01S5/02248 ,  H01S5/0226 ,  H01S5/02276 ,  H01S5/02438 ,  H01S5/02469 ,  H01L2924/00014

Abstract: An optical module includes a housing; a substrate configured to have a through hole; a first chip configured to have a first heating member and be disposed inside the through hole; a second chip configured to have a second heating member, the second chip being placed on the substrate and the first chip with a bump interposed; a first heat conduction member configured to be sandwiched between a lower wall of the housing and the first chip and transfer heat generated by the first heating member to the lower wall of the housing; and a second heat conduction member configured to be sandwiched between an upper wall of the housing and the second chip and transfer heat generated by the second heating member to the upper wall of the housing.

公开(公告)号：US09905528B2

公开(公告)日：2018-02-27

申请号：US15365192

申请日：2016-11-30

Applicant: FUJITSU LIMITED

Inventor： Hidehiko Kira ,  Takumi Masuyama

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L24/75 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/75301 ,  H01L2224/75745 ,  H01L2224/81203 ,  H01L2225/06513 ,  H01L2225/06558

Abstract: A semiconductor mounting apparatus includes a storing unit that stores a liquid or a gas, a contact unit that comes into contact with a semiconductor chip when the storing unit is filled with the liquid or the gas, and a sucking unit that sucks up the semiconductor chip to bring the semiconductor chip into close contact with the contact unit.