公开(公告)号：US11901406B2

公开(公告)日：2024-02-13

申请号：US17374721

申请日：2021-07-13

申请人： Analog Power Conversion LLC

发明人： Amaury Gendron-Hansen ,  Dumitru Gheorge Sdrulla

IPC分类号： H01L29/06 ,  H01L21/765 ,  H01L21/761 ,  H01L29/40

CPC分类号： H01L29/0623 ,  H01L21/761 ,  H01L21/765 ,  H01L29/402

摘要： A semiconductor device comprises a substrate, a semiconductor layer formed on the substrate; and a high-voltage termination. The high-voltage termination includes a plurality of floating field rings, a deep trench and a dielectric material is disposed within the deep trench. The plurality of floating field rings are formed in the semiconductor layer and respectively disposed around a region of the semiconductor layer. The deep trench is formed in the semiconductor layer and concentrically disposed around an outermost floating field ring of the plurality of floating field rings. The high-voltage termination may also include a field plate disposed over the floating field rings, the deep trench, or both.

公开(公告)号：US20230022394A1

公开(公告)日：2023-01-26

申请号：US17385866

申请日：2021-07-26

申请人： Analog Power Conversion LLC

发明人： Dumitru Gheorge Sdrulla ,  Amaury Gendron-Hansen

IPC分类号： H01L29/78 ,  H01L29/423 ,  H01L29/16 ,  H01L29/66

摘要： A Field Effect Transistor (FET) may include a semiconductor substrate having a first conductivity type, a semiconductor layer of the first conductivity type formed over the substrate, and a pair of doped bodies of a second conductivity type opposite the first conductivity type formed in the semiconductor layer. A trench filled with a trench dielectric is formed within a region between the doped bodies. The FET may be a Vertical Metal-Oxide-Semiconductor FET (VMOSFET) including a gate dielectric disposed over the region between the doped bodies and the trench, and a gate electrode disposed over the gate dielectric, wherein the trench operates to prevent breakdown of the gate dielectric, or the FET may be a Junction FET. The FET may be designed to operate at radio frequencies or under heavy-ion bombardment. The semiconductor substrate and the semiconductor layer may comprise a wide band-gap semiconductor such as silicon carbide.

公开(公告)号：US12074226B2

公开(公告)日：2024-08-27

申请号：US17475255

申请日：2021-09-14

申请人： Analog Power Conversion LLC ,  Kyosan Electric Manufacturing Co., Ltd.

发明人： Amaury Gendron-Hansen ,  Dumitru Gheorge Sdrulla ,  Leslie Louis Szepesi ,  Tetsuya Takata ,  Itsuo Yuzurihara ,  Tomohiro Yoneyama ,  Yu Hosoyamada

IPC分类号： H01L29/872 ,  H01L27/06 ,  H01L29/16 ,  H01L29/78

CPC分类号： H01L29/872 ,  H01L27/0629 ,  H01L29/1608 ,  H01L29/7827

摘要： A semiconductor device comprises a semiconductor die having a first region and a second region, wherein an operating temperature of the second region is lower than an operating temperature of the first region. A plurality of first tubs are respectively disposed in the first region, the second region, or both. The semiconductor device further comprises a power device comprising a plurality of power device cells, and a diode having a plurality of diode cells. The power devices cells are disposed within tubs or portions of tubs that are in the first region, and the diode cells are disposed within tubs or portions of tubs that are in the second region. The power device may comprise a vertical metal oxide semiconductor field effect transistor (MOSFET), and the diode may comprise a vertical Schottky barrier diode (SBD).

公开(公告)号：US12074198B2

公开(公告)日：2024-08-27

申请号：US17453300

申请日：2021-11-02

申请人： Analog Power Conversion LLC

发明人： Amaury Gendron-Hansen ,  Dumitru Gheorge Sdrulla ,  Leslie Louis Szepesi

IPC分类号： H01L29/06 ,  G06F30/39 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  G06F119/08 ,  H01L29/16

CPC分类号： H01L29/0696 ,  G06F30/39 ,  H01L29/0856 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66068 ,  H01L29/7802 ,  G06F2119/08 ,  H01L29/1608

摘要： A tub of a semiconductor device includes a cool zone with a first projected operating temperature and a hot zone with a second projected operating temperature greater than the first projected operating temperature. A design parameter has a first value in the cool zone and a second value different from the first value in the hot zone. The difference configures the tub to dissipate less heat in the hot zone during operation of the semiconductor device than would be dissipated if the first and second values were equal. The design parameter may be, for example, a tub width, a source structure width, a JFET region width, a channel length, a channel width, a length of a gate, a displacement of a center of the gate relative to a center of a JFET region, a dopant concentration, or a combination thereof.

公开(公告)号：US11830943B2

公开(公告)日：2023-11-28

申请号：US17385866

申请日：2021-07-26

申请人： Analog Power Conversion LLC

发明人： Dumitru Gheorge Sdrulla ,  Amaury Gendron-Hansen

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/16 ,  H01L29/423

CPC分类号： H01L29/7813 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/66734

摘要： A Field Effect Transistor (FET) may include a semiconductor substrate having a first conductivity type, a semiconductor layer of the first conductivity type formed over the substrate, and a pair of doped bodies of a second conductivity type opposite the first conductivity type formed in the semiconductor layer. A trench filled with a trench dielectric is formed within a region between the doped bodies. The FET may be a Vertical Metal-Oxide-Semiconductor FET (VMOSFET) including a gate dielectric disposed over the region between the doped bodies and the trench, and a gate electrode disposed over the gate dielectric, wherein the trench operates to prevent breakdown of the gate dielectric, or the FET may be a Junction FET. The FET may be designed to operate at radio frequencies or under heavy-ion bombardment. The semiconductor substrate and the semiconductor layer may comprise a wide band-gap semiconductor such as silicon carbide.