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公开(公告)号:US12074226B2
公开(公告)日:2024-08-27
申请号:US17475255
申请日:2021-09-14
发明人: Amaury Gendron-Hansen , Dumitru Gheorge Sdrulla , Leslie Louis Szepesi , Tetsuya Takata , Itsuo Yuzurihara , Tomohiro Yoneyama , Yu Hosoyamada
IPC分类号: H01L29/872 , H01L27/06 , H01L29/16 , H01L29/78
CPC分类号: H01L29/872 , H01L27/0629 , H01L29/1608 , H01L29/7827
摘要: A semiconductor device comprises a semiconductor die having a first region and a second region, wherein an operating temperature of the second region is lower than an operating temperature of the first region. A plurality of first tubs are respectively disposed in the first region, the second region, or both. The semiconductor device further comprises a power device comprising a plurality of power device cells, and a diode having a plurality of diode cells. The power devices cells are disposed within tubs or portions of tubs that are in the first region, and the diode cells are disposed within tubs or portions of tubs that are in the second region. The power device may comprise a vertical metal oxide semiconductor field effect transistor (MOSFET), and the diode may comprise a vertical Schottky barrier diode (SBD).
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公开(公告)号:US12074198B2
公开(公告)日:2024-08-27
申请号:US17453300
申请日:2021-11-02
IPC分类号: H01L29/06 , G06F30/39 , H01L29/08 , H01L29/10 , H01L29/423 , H01L29/66 , H01L29/78 , G06F119/08 , H01L29/16
CPC分类号: H01L29/0696 , G06F30/39 , H01L29/0856 , H01L29/1045 , H01L29/105 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/66068 , H01L29/7802 , G06F2119/08 , H01L29/1608
摘要: A tub of a semiconductor device includes a cool zone with a first projected operating temperature and a hot zone with a second projected operating temperature greater than the first projected operating temperature. A design parameter has a first value in the cool zone and a second value different from the first value in the hot zone. The difference configures the tub to dissipate less heat in the hot zone during operation of the semiconductor device than would be dissipated if the first and second values were equal. The design parameter may be, for example, a tub width, a source structure width, a JFET region width, a channel length, a channel width, a length of a gate, a displacement of a center of the gate relative to a center of a JFET region, a dopant concentration, or a combination thereof.
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