Edge Termination for Semiconductor Devices
    1.
    发明申请
    Edge Termination for Semiconductor Devices 有权
    半导体器件的边沿终端

    公开(公告)号:US20090294892A1

    公开(公告)日:2009-12-03

    申请号:US12418808

    申请日:2009-04-06

    IPC分类号: H01L29/06 H01L29/861

    摘要: A high-voltage termination structure includes a peripheral voltage-spreading network. One or more trench structures are connected at least partly in series between first and second power supply voltages. The trench structures include first and second current-limiting structures connected in series with a semiconductor material, and also includes permanent charge in a trench-wall dielectric. The current-limiting structures in the trench structures are jointly connected in a series-parallel ladder configuration. The current-limiting structures, in combination with the semiconductor material, provide a voltage distribution between the core portion and the edge portion.

    摘要翻译: 高压端接结构包括外围电压分布网络。 一个或多个沟槽结构至少部分地串联连接在第一和第二电源电压之间。 沟槽结构包括与半导体材料串联连接的第一和第二限流结构,并且还包括在沟槽壁电介质中的永久电荷。 沟槽结构中的电流限制结构以串联 - 并联梯形结构共同连接。 与半导体材料组合的限流结构在芯部分和边缘部分之间提供电压分布。

    Edge termination for semiconductor devices
    2.
    发明授权
    Edge termination for semiconductor devices 有权
    半导体器件的边缘端接

    公开(公告)号:US07911021B2

    公开(公告)日:2011-03-22

    申请号:US12418808

    申请日:2009-04-06

    IPC分类号: H01L29/02

    摘要: A high-voltage termination structure includes a peripheral voltage-spreading network. One or more trench structures are connected at least partly in series between first and second power supply voltages. The trench structures include first and second current-limiting structures connected in series with a semiconductor material, and also includes permanent charge in a trench-wall dielectric. The current-limiting structures in the trench structures are jointly connected in a series-parallel ladder configuration. The current-limiting structures, in combination with the semiconductor material, provide a voltage distribution between the core portion and the edge portion.

    摘要翻译: 高压端接结构包括外围电压分布网络。 一个或多个沟槽结构至少部分地串联连接在第一和第二电源电压之间。 沟槽结构包括与半导体材料串联连接的第一和第二限流结构,并且还包括在沟槽壁电介质中的永久电荷。 沟槽结构中的电流限制结构以串联 - 并联梯形结构共同连接。 与半导体材料组合的限流结构提供了芯部分和边缘部分之间的电压分布。