公开(公告)号：US20210317580A1

公开(公告)日：2021-10-14

申请号：US16848784

申请日：2020-04-14

Applicant: APPLIED MATERIALS, INC.

Inventor： Shi YOU ,  He REN ,  Naomi YOSHIDA ,  Nikolaos BEKIARIS ,  Mehul NAIK ,  Martin Jay SEAMONS ,  Jingmei LIANG ,  Mei-Yee SHEK

IPC: C23C16/56 ,  H01L21/768

Abstract: Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids. Embodiments include methods and apparatus for making a semiconductor device including: etching a metal layer disposed atop a substrate to form one or more metal lines having a top surface, a first side, and a second side; depositing a passivation layer atop the top surface, the first side, and the second side under conditions sufficient to reduce or eliminate oxygen contact with the one or more metal lines; depositing a flowable layer of low-k dielectric material atop the passivation layer in a thickness sufficient to cover the one or more metal lines; and contacting the flowable layer of low-k dielectric material with oxygen under conditions sufficient to anneal and increase a density of the low-k dielectric material

公开(公告)号：US20150221596A1

公开(公告)日：2015-08-06

申请号：US14173807

申请日：2014-02-05

Applicant: APPLIED MATERIALS, INC.

Inventor： He REN ,  Mehul B. NAIK ,  Yong CAO ,  Mei-Yee SHEK ,  Yana Cheng ,  Sree Rangasai V. Kesapragada

IPC: H01L23/532 ,  H01L21/02 ,  H01L21/768

CPC classification number: H01L23/53238 ,  H01L21/02178 ,  H01L21/02266 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/7685 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber. The substrate has an exposed copper surface and an exposed low-k dielectric surface. A metal layer is formed over the copper surface but not over the low-k dielectric surface. A metal-based dielectric layer is formed over the metal layer and the low-k dielectric layer.

Abstract translation: 描述了用于半导体器件的互连结构及其制造方法。 该方法包括将基板定位在真空处理室中。 衬底具有暴露的铜表面和暴露的低k电介质表面。 在铜表面上形成金属层，但不在低k电介质表面上。 在金属层和低k电介质层上形成金属基介电层。

公开(公告)号：US20210193461A1

公开(公告)日：2021-06-24

申请号：US17192882

申请日：2021-03-04

Applicant: Applied Materials, Inc.

Inventor： Bhargav S. CITLA ,  Mei-Yee SHEK ,  Srinivas D. NEMANI

IPC: H01L21/02 ,  C23C14/02 ,  C23C14/06 ,  H01L21/033 ,  C23C14/35

Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.

公开(公告)号：US20190311896A1

公开(公告)日：2019-10-10

申请号：US16354654

申请日：2019-03-15

Applicant: Applied Materials, Inc.

Inventor： Mihaela BALSEANU ,  Srinivas D. NEMANI ,  Mei-Yee SHEK ,  Ellie Y. YIEH

IPC: H01L21/02 ,  H01L29/66 ,  C23C16/455 ,  C23C16/46 ,  C23C16/34 ,  C23C16/36

Abstract: A method for forming a thermally stable spacer layer is disclosed. The method includes first disposing a substrate in an internal volume of a processing chamber. The substrate has a film formed thereon, the film including silicon, carbon, nitrogen, and hydrogen. Next, high pressure steam is introduced into the processing chamber. The film is exposed to the high pressure steam to convert the film to reacted film, the reacted film including silicon, carbon, oxygen, and hydrogen.

公开(公告)号：US20240379420A1

公开(公告)日：2024-11-14

申请号：US18781633

申请日：2024-07-23

Applicant: APPLIED MATERIALS, INC.

Inventor： Shi YOU ,  He REN ,  Naomi YOSHIDA ,  Nikolaos BEKIARIS ,  Mehul NAIK ,  Martin Jay SEAMONS ,  Jingmei LIANG ,  Mei-Yee SHEK

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/67

Abstract: Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids. Embodiments include methods and apparatus for making a semiconductor device including: etching a metal layer disposed atop a substrate to form one or more metal lines having a top surface, a first side, and a second side; depositing a passivation layer atop the top surface, the first side, and the second side under conditions sufficient to reduce or eliminate oxygen contact with the one or more metal lines; depositing a flowable layer of low-k dielectric material atop the passivation layer in a thickness sufficient to cover the one or more metal lines; and contacting the flowable layer of low-k dielectric material with oxygen under conditions sufficient to anneal and increase a density of the low-k dielectric material

公开(公告)号：US20230187276A1

公开(公告)日：2023-06-15

申请号：US18108338

申请日：2023-02-10

Applicant: APPLIED MATERIALS, INC.

Inventor： Shi YOU ,  He REN ,  Naomi YOSHIDA ,  Nikolaos BEKIARIS ,  Mehul NAIK ,  Jay Martin SEAMONS ,  Jingmei LIANG ,  Mei-Yee SHEK

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/67

CPC classification number: H01L21/76837 ,  H01L21/76828 ,  H01L21/76826 ,  H01L21/02337 ,  H01L21/76825 ,  H01L21/02323 ,  H01L21/76834 ,  H01L21/67103 ,  H01L21/02326

Abstract: Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids. Embodiments include methods and apparatus for making a semiconductor device including: etching a metal layer disposed atop a substrate to form one or more metal lines having a top surface, a first side, and a second side; depositing a passivation layer atop the top surface, the first side, and the second side under conditions sufficient to reduce or eliminate oxygen contact with the one or more metal lines; depositing a flowable layer of low-k dielectric material atop the passivation layer in a thickness sufficient to cover the one or more metal lines; and contacting the flowable layer of low-k dielectric material with oxygen under conditions sufficient to anneal and increase a density of the low-k dielectric material

公开(公告)号：US20210257221A1

公开(公告)日：2021-08-19

申请号：US17307737

申请日：2021-05-04

Applicant: Applied Materials, Inc.

Inventor： Kaushal K. SINGH ,  Mei-Yee SHEK ,  Srinivas D. NEMANI ,  Ellie Y. YIEH

IPC: H01L21/383 ,  C23C14/58 ,  C23C14/48 ,  H01L21/44

Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.

公开(公告)号：US20150255329A1

公开(公告)日：2015-09-10

申请号：US14201728

申请日：2014-03-07

Applicant: Applied Materials, Inc.

Inventor： He Ren ,  Mehul B. NAIK ,  Yong CAO ,  Sree Rangasai V. KESAPRAGADA ,  Mei-Yee SHEK ,  Yana CHENG

IPC: H01L21/768 ,  H01L21/02

CPC classification number: H01L21/76841 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02266 ,  H01L21/321 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76849

Abstract: Methods for forming a passivation protection structure on a metal line layer formed in an insulating material in an interconnection structure are provided. In one embodiment, a method for forming passivation protection on a metal line in an interconnection structure for semiconductor devices includes selectively forming a metal capping layer on a metal line bounded by a dielectric bulk insulating layer in an interconnection structure formed on a substrate in a processing chamber incorporated in a multi-chamber processing system, in-situ forming a barrier layer on the substrate in the processing chamber; wherein the barrier layer is a metal dielectric layer, and forming a dielectric capping layer on the barrier layer in the multi-chamber processing system.

Abstract translation: 提供了在形成在互连结构中的绝缘材料中的金属线层上形成钝化保护结构的方法。 在一个实施例中，用于在半导体器件的互连结构中的金属线上形成钝化保护的方法包括在处理中形成在基板上的互连结构中的介电体绝缘层界定的金属线上选择性地形成金属覆盖层 结合在多腔室处理系统中，在处理室中的基底上原位形成阻挡层; 其中所述阻挡层是金属介电层，并且在所述多室处理系统中的阻挡层上形成电介质覆盖层。

公开(公告)号：US20190311908A1

公开(公告)日：2019-10-10

申请号：US16366539

申请日：2019-03-27

Applicant: Applied Materials, Inc.

Inventor： He REN ,  Maximillian CLEMONS ,  Mei-Yee SHEK ,  Minrui YU ,  Bencherki MEBARKI ,  Mehul B. NAIK ,  Chentsau YING ,  Srinivas D. NEMANI

IPC: H01L21/285 ,  H01L29/45

Abstract: Methods for forming low resistivity metal silicide interconnects using one or a combination of a physical vapor deposition (PVD) process and an anneal process are described herein. In one embodiment, a method of forming a plurality of wire interconnects includes flowing a sputtering gas into a processing volume of a processing chamber, applying a power to a target disposed in the processing volume, forming a plasma in a region proximate to the sputtering surface of the target, and depositing the metal and silicon layer on the surface of the substrate. Herein, the first target comprises a metal silicon alloy and a sputtering surface thereof is angled with respect to a surface of the substrate at between about 10° and about 50°.

公开(公告)号：US20190279879A1

公开(公告)日：2019-09-12

申请号：US16262094

申请日：2019-01-30

Applicant: Applied Materials, Inc.

Inventor： Kaushal K. SINGH ,  Mei-Yee SHEK ,  Srinivas D. NEMANI ,  Ellie Y. YIEH

IPC: H01L21/383 ,  H01L21/44 ,  C23C14/48 ,  C23C14/58

Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.