公开(公告)号：US20200227258A1

公开(公告)日：2020-07-16

申请号：US16597466

申请日：2019-10-09

Applicant: Applied Materials, Inc.

Inventor： Zhijun JIANG ,  Ganesh BALASUBRAMANIAN ,  Arkajit ROY BARMAN ,  Hidehiro KOJIRI ,  Xinhai HAN ,  Deenesh PADHI ,  Chuan Ying WANG ,  Yue CHEN ,  Daemian Raj BENJAMIN RAJ ,  Nikhil Sudhindrarao JORAPUR ,  Vu Ngoc Tran NGUYEN ,  Miguel S. FUNG ,  Jose Angelo OLAVE ,  Thian Choi LIM

IPC: H01L21/02 ,  H01L21/67

Abstract: A method of forming a film stack with reduced defects is provided and includes positioning a substrate on a substrate support within a processing chamber and sequentially depositing polysilicon layers and silicon oxide layers to produce the film stack on the substrate. The method also includes supplying a current of greater than 5 ampere (A) to a plasma profile modulator while generating a deposition plasma within the processing chamber, exposing the substrate to the deposition plasma while depositing the polysilicon layers and the silicon oxide layers, and maintaining the processing chamber at a pressure of greater than 2 Torr to about 100 Torr while depositing the polysilicon layers and the silicon oxide layers.

公开(公告)号：US20190153592A1

公开(公告)日：2019-05-23

申请号：US16259011

申请日：2019-01-28

Applicant: Applied Materials, Inc.

Inventor： Dale Du BOIS ,  Mohamad A. AYOUB ,  Robert KIM ,  Amit Kumar BANSAL ,  Mark FODOR ,  Binh NGUYEN ,  Siu F. CHENG ,  Hang YU ,  Chiu CHAN ,  Ganesh BALASUBRAMANIAN ,  Deenesh PADHI ,  Juan Carlos ROCHA

IPC: C23C16/04 ,  C23C16/458 ,  C23C16/455 ,  C23C16/44 ,  H01J37/32 ,  C23C14/04 ,  H01L21/687 ,  C30B25/12 ,  H01J37/34

Abstract: Embodiments of the invention contemplate a shadow ring that provides increased or decreased and more uniform deposition on the edge of a wafer. By removing material from the top and/or bottom surfaces of the shadow ring, increased edge deposition and bevel coverage can be realized. In one embodiment, the material on the bottom surface is reduced by providing a recessed slot on the bottom surface. By increasing the amount of material of the shadow ring, the edge deposition and bevel coverage is reduced. Another approach to adjusting the deposition at the edge of the wafer includes increasing or decreasing the inner diameter of the shadow ring. The material forming the shadow ring may also be varied to change the amount of deposition at the edge of the wafer.

公开(公告)号：US20160365248A1

公开(公告)日：2016-12-15

申请号：US15137486

申请日：2016-04-25

Applicant: Applied Materials, Inc.

Inventor： Bencherki MEBARKI ,  Pramit MANNA ,  Li Yan MIAO ,  Deenesh PADHI ,  Bok Hoen KIM ,  Christopher Dennis BENCHER

IPC: H01L21/033 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/027 ,  H01L21/02

CPC classification number: H01L21/0337 ,  H01L21/02115 ,  H01L21/02118 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/0273 ,  H01L21/31058 ,  H01L21/31138 ,  H01L2221/00

Abstract: Embodiments of the disclosure relate to deposition of a conformal organic material over a feature formed in a photoresist or a hardmask, to decrease the critical dimensions and line edge roughness. In various embodiments, an ultra-conformal carbon-based material is deposited over features formed in a high-resolution photoresist. The conformal organic layer formed over the photoresist thus reduces both the critical dimensions and the line edge roughness of the features.

Abstract translation: 本公开的实施例涉及在光致抗蚀剂或硬掩模中形成的特征上沉积保形有机材料，以减少临界尺寸和线边缘粗糙度。 在各种实施例中，将超适形碳基材料沉积在形成于高分辨率光致抗蚀剂中的特征上。 在光致抗蚀剂上形成的共形有机层因此降低了特征的临界尺寸和线边缘粗糙度。

公开(公告)号：US20160005596A1

公开(公告)日：2016-01-07

申请号：US14770412

申请日：2014-02-14

Applicant: APPLIED MATERIALS, INC.

Inventor： Swayambhu P. BEHERA ,  Shahid SHAIKH ,  Pramit MANNA ,  Mandar B. PANDIT ,  Tersem SUMMAN ,  Patrick REILLY ,  Deenesh PADHI ,  Bok Hoen KIM ,  Heung Lak PARK ,  Derek R. WITTY

IPC: H01L21/02 ,  H01L21/033 ,  H01L21/311

CPC classification number: H01L21/02115 ,  C23C16/26 ,  C23C16/50 ,  H01L21/02274 ,  H01L21/0337 ,  H01L21/31116

Abstract: Embodiments of the invention relate to deposition of a conformal carbon-based material. In one embodiment, the method comprises depositing a sacrificial dielectric layer with a predetermined thickness over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, introducing a hydrocarbon source, a plasma-initiating gas, and a dilution gas into the processing chamber, wherein a volumetric flow rate of hydrocarbon source: plasma-initiating gas: dilution gas is in a ratio of 1:0.5:20, generating a plasma at a deposition temperature of about 300 C to about 500 C to deposit a conformal amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate, and removing the patterned features.

Abstract translation: 本发明的实施方案涉及保形碳基材料的沉积。 在一个实施例中，该方法包括在衬底上沉积具有预定厚度的牺牲电介质层，通过去除牺牲电介质层的部分以暴露衬底的上表面，引入烃源，等离子体 - 引发气体和稀释气体进入处理室，其中烃源的体积流量：等离子体起始气体：稀释气体的比例为1:0.5:20，在约300℃的沉积温度下产生等离子体 C至约500℃以在图案化特征和暴露的基底的上表面上沉积共形无定形碳层，从图案化特征的上表面和基底的上表面选择性地除去无定形碳层， 图案特征。

公开(公告)号：US20240304437A1

公开(公告)日：2024-09-12

申请号：US18650014

申请日：2024-04-29

Applicant: Applied Materials, Inc.

Inventor： Chuanxi YANG ,  Hang YU ,  Sanjay KAMATH ,  Deenesh PADHI ,  Honggun KIM ,  Euhngi LEE ,  Zubin HUANG ,  Diwakar N. KEDLAYA ,  Rui CHENG ,  Karthik JANAKIRAMAN

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/34 ,  C23C16/513

CPC classification number: H01L21/0217 ,  C23C16/0209 ,  C23C16/345 ,  C23C16/513 ,  H01L21/02274

Abstract: Capacitor devices containing silicon boron nitride with high boron concentration are provided. In one or more examples, a capacitor device is provided and contains a stopper layer containing silicon boron nitride and disposed on a substrate, a dielectric layer disposed on the stopper layer, vias formed within the dielectric layer and the stopper layer, metal contacts disposed on bottoms of the vias, a nitride barrier layer containing a metal nitride material and disposed on walls of the vias and disposed on the metal contacts, and an oxide layer disposed within the vias on the nitride barrier layer, wherein the oxide layer contains one or more holes or voids formed therein. The silicon boron nitride contains about 18 atomic percent (at %) to about 50 at % of boron.

公开(公告)号：US20200299834A1

公开(公告)日：2020-09-24

申请号：US16795431

申请日：2020-02-19

Applicant: Applied Materials, Inc.

Inventor： Rajeev BAJAJ ,  Mei CHANG ,  Deenesh PADHI

IPC: C23C16/30 ,  C23C16/44

Abstract: A method of depositing a coating and a layered structure is provided. A coating is deposited on a substrate to make a layered structure, such that an interface between the coating and the substrate is formed. The coating includes silicon, oxygen, and carbon, where the carbon doping in the coating increases between the interface and the top surface of the coating. The top surface of the coating is inherently hydrophobic and icephobic, and reduces the wetting of water or ice film on the layered structure, without requiring reapplication of the coating.

公开(公告)号：US20190074176A1

公开(公告)日：2019-03-07

申请号：US16120867

申请日：2018-09-04

Applicant: Applied Materials, Inc.

Inventor： Lei GUO ,  Praket P. JHA ,  Milind GADRE ,  Deenesh PADHI ,  Tza-Jing GUNG

IPC: H01L21/02 ,  C23C16/40 ,  C23C16/50

Abstract: Aspects disclosed herein relate to methods of depositing pure silicon oxide on a substrate using Octamethylcyclotetrasiloxane (OMCTS) precursor. In one aspect, the method generally includes positioning a substrate in a processing chamber, introducing an oxygen-containing gas into the processing chamber, introducing OMCTS precursor into the processing chamber, and reacting the oxygen-containing gas and the OMCTS precursor to remove carbon and deposit pure silicon oxide on the substrate.

公开(公告)号：US20180233356A1

公开(公告)日：2018-08-16

申请号：US15889744

申请日：2018-02-06

Applicant: Applied Materials, Inc.

Inventor： Xinhai HAN ,  Deenesh PADHI ,  Masaki OGATA ,  Yinan ZHANG ,  Shaunak MUKHERJEE

IPC: H01L21/02 ,  H01L27/115 ,  H01J37/32

Abstract: In one implementation, a method comprising depositing one or more silicon oxide/silicon nitride containing stacks on a substrate positioned in a processing chamber is provided. Depositing the one or more silicon oxide/silicon nitride containing stacks comprises (a) energizing a first process gas into a first plasma, (b) depositing a first film layer over the substrate from the first plasma, (c) energizing a second process gas into a second plasma, wherein the second process gas comprises a compound having at least one silicon-nitrogen bond and (d) depositing a second film layer on the first film layer from the second plasma. The method further comprises repeating (a), (b), (c), and (d) until a predetermined number of first film layers and second film layers have been deposited on the substrate. The first film layer is a silicon oxide layer and the second film layer is a silicon nitride layer.

公开(公告)号：US20170301537A1

公开(公告)日：2017-10-19

申请号：US15636239

申请日：2017-06-28

Applicant: Applied Materials, Inc.

Inventor： Swayambhu P. BEHERA ,  Shahid SHAIKH ,  Pramit MANNA ,  Mandar B. PANDIT ,  Tersem SUMMAN ,  Patrick REILLY ,  Deenesh PADHI ,  Bok Hoen KIM ,  Heung Lak PARK ,  Derek R. WITTY

IPC: H01L21/02 ,  C23C16/26 ,  C23C16/50 ,  H01L21/311 ,  H01L21/033

CPC classification number: H01L21/02115 ,  C23C16/26 ,  C23C16/50 ,  H01L21/02274 ,  H01L21/0337 ,  H01L21/31116

Abstract: Embodiments of the disclosure relate to deposition of a conformal carbon-based material. In one embodiment, the method comprises depositing a sacrificial dielectric layer over a substrate, forming patterned features on the substrate by removing portions of the sacrificial dielectric layer to expose an upper surface of the substrate, introducing a hydrocarbon source, a plasma-initiating gas, and a dilution gas into the processing chamber, generating a plasma in the processing chamber at a deposition temperature of about 80° C. to about 550° C. to deposit a conformal amorphous carbon layer on the patterned features and the exposed upper surface of the substrate, selectively removing the amorphous carbon layer from an upper surface of the patterned features and the upper surface of the substrate using an anisotropic etching process to provide the patterned features filled within sidewall spacers, and removing the patterned features formed from the sacrificial dielectric layer.

公开(公告)号：US20160049305A1

公开(公告)日：2016-02-18

申请号：US14799374

申请日：2015-07-14

Applicant: Applied Materials, Inc.

Inventor： Bencherki MEBARKI ,  Bok Hoen KIM ,  Deenesh PADHI ,  Li Yan MIAO ,  Pramit MANNA ,  Christopher Dennis BENCHER ,  Mehul B. NAIK ,  Huixiong DAI ,  Christopher S. NGAI ,  Daniel Lee DIEHL

IPC: H01L21/308 ,  H01L21/02 ,  H01L21/027 ,  H01L21/311

CPC classification number: H01L21/3088 ,  H01L21/02115 ,  H01L21/02266 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31144

Abstract: Embodiments of the disclosure generally provide a method of forming a reduced dimension pattern in a hardmask that is optically matched to an overlying photoresist layer. The method generally comprises of application of a dimension shrinking conformal carbon layer over the field region, sidewalls, and bottom portion of the patterned photoresist and the underlying hardmask at temperatures below the decomposition temperature of the photoresist. The methods and embodiments herein further involve removal of the conformal carbon layer from the bottom portion of the patterned photoresist and the hardmask by an etch process to expose the hardmask, etching the exposed hardmask substrate at the bottom portion, followed by the simultaneous removal of the conformal carbon layer, the photoresist, and other carbonaceous components. A hardmask with reduced dimension features for further pattern transfer is thus yielded.

Abstract translation: 本公开的实施例通常提供在与上覆光致抗蚀剂层光学匹配的硬掩模中形成减小尺寸图案的方法。 该方法通常包括在低于光致抗蚀剂的分解温度的温度下，在图案化的光致抗蚀剂和下面的硬掩模的场区域，侧壁和底部上施加尺寸收缩的保形碳层。 本文的方法和实施例还涉及通过蚀刻工艺从图案化的光致抗蚀剂和硬掩模的底部部分去除保形碳层，以暴露硬掩模，在底部蚀刻暴露的硬掩模基板，随后同时去除 保形碳层，光致抗蚀剂等碳质成分。 因此产生了用于进一步模式转移的尺寸减小特征的硬掩模。