公开(公告)号：US08629795B2

公开(公告)日：2014-01-14

申请号：US12856993

申请日：2010-08-16

Applicant: Yung-Chow Peng ,  Wen-Hung Huang ,  Yu-Wei Lin

Inventor： Yung-Chow Peng ,  Wen-Hung Huang ,  Yu-Wei Lin

IPC: H03M1/12

CPC classification number: H03M1/002 ,  B81B7/008 ,  H03M1/0626 ,  H03M1/12 ,  H03M3/30

Abstract: A micro-electro-mechanical system (MEMS) includes a micro-mechanical structure that is capable of generating a first electrical signal. An analog-to-digital converter (ADC) is coupled with the micro-mechanical structure. The MEMS is free from including any amplifier between the micro-mechanical structure and the ADC.

Abstract translation: 微电子机械系统（MEMS）包括能够产生第一电信号的微机械结构。 模数转换器（ADC）与微机械结构耦合。 MEMS不包括微机械结构和ADC之间的任何放大器。

公开(公告)号：US20130109326A1

公开(公告)日：2013-05-02

申请号：US13329298

申请日：2011-12-18

Applicant: Utku Seckin ,  Yu-Wei Lin ,  Chungyeol Paul Lee

Inventor： Utku Seckin ,  Yu-Wei Lin ,  Chungyeol Paul Lee

IPC: H04B1/38

CPC classification number: H04B1/0475 ,  H03F1/3223 ,  H03F3/24 ,  H04B2001/0441

Abstract: A radio frequency (RF) transceiver includes an RF receiver having an RF receiver path that processes a received signal to generate inbound data, the receiver path having an RF front-end. A power amplifier calibration module generates power amplifier calibration signals in a calibration mode of operation, and generates power amplifier pre-distortion parameters in response to a calibration feedback signal. An RF transmitter processes output data to generate a transmit signal based on the power amplifier pre-distortion parameters in a transmit mode of operation and processes the power amplifier calibration signals to generate an amplified calibration output in the calibration mode of operation. A power amplifier calibration feedback path generates the calibration feedback signal, separate from the RF front-end, in response to the amplified calibration output.

Abstract translation: 射频（RF）收发器包括具有RF接收机路径的RF接收机，RF接收机路径处理接收到的信号以产生入站数据，该接收器路径具有RF前端。 功率放大器校准模块在校准操作模式下产生功率放大器校准信号，并响应校准反馈信号产生功率放大器预失真参数。 RF发射机处理输出数据以基于发射操作模式中的功率放大器预失真参数来产生发射信号，并处理功率放大器校准信号以在校准操作模式下产生放大的校准输出。 功率放大器校准反馈路径响应于放大的校准输出产生与RF前端分离的校准反馈信号。

公开(公告)号：US20120126897A1

公开(公告)日：2012-05-24

申请号：US13364043

申请日：2012-02-01

Applicant: Yu-Wei LIN ,  Yung-Chow PENG

Inventor： Yu-Wei LIN ,  Yung-Chow PENG

IPC: H03F3/45

CPC classification number: H03F3/45183 ,  H03F3/45475 ,  H03F3/45632 ,  H03F3/45928 ,  H03F2203/45512 ,  H03F2203/45588

Abstract: A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level.

Abstract translation: 电路提供对应于差分输入Inn和Inp的第一电流，以及对应于共模输入Vcm的第二电流。 电路然后将差分电流和共模电流反射到第三电流和第四电流。 基于镜像差分电流和镜像共模电流之间的差异，电路拉起或拉下这些电流，以平衡差分输入和共模输入之间的相应差值。 实际上，该电路将输入共模电压调整到期望的电平，而不给它提供上升到不需要的电平的机会。

公开(公告)号：US20090051773A1

公开(公告)日：2009-02-26

申请号：US12142049

申请日：2008-06-19

Applicant: Yu-Wei Lin

Inventor： Yu-Wei Lin

IPC: H04N5/225

CPC classification number: H04N5/2251

Abstract: A video capture device with attention attractive feature comprising: a video capture device; an attention attractive device, connecting to the video capture device; wherein the attention attractive device is used to attract the sight of eyes for video capture device to capture a better image.

Abstract translation: 一种具有引人注意的特征的视频捕获装置，包括：视频捕获装置; 引人注目的设备，连接到视频采集设备; 其中使用注意力装置来吸引视频捕获装置的眼睛以捕获更好的图像。

公开(公告)号：US07314820B2

公开(公告)日：2008-01-01

申请号：US11042939

申请日：2005-01-24

Applicant: Yu-Wei Lin ,  Fu-Di Tang ,  Chun-Yuan Li ,  Terry Tsai ,  Yu-Ting Ho

Inventor： Yu-Wei Lin ,  Fu-Di Tang ,  Chun-Yuan Li ,  Terry Tsai ,  Yu-Ting Ho

IPC: H01L21/44 ,  H01L21/50 ,  H01L21/48 ,  H01L23/52 ,  H01L23/48 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L21/568 ,  H01L23/3107 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/85001 ,  H01L2224/8592 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A carrier-free semiconductor package and a fabrication method thereof are provided. The fabrication method includes the steps of: providing a carrier having a plurality of electrical contacts formed thereon; mounting at least one chip on the carrier; electrically connecting the chip to the electrical contacts via a plurality of bonding wires; forming a coating layer on each of the electrical contacts to encapsulate a bonded end of each of the bonding wires on the electrical contacts; performing a molding process to form an encapsulant for encapsulating the chip, the bonding wires and the electrical contacts; and removing the carrier, such that bottom surfaces of the electrical contacts are exposed from the encapsulant. This obtains a semiconductor package not having a carrier, and the coating layers can enhance adhesion between the electrical contacts and the encapsulant.

Abstract translation: 提供了一种无载体半导体封装及其制造方法。 该制造方法包括以下步骤：提供其上形成有多个电触头的载体; 在载体上安装至少一个芯片; 通过多个接合线将芯片电连接到电触点; 在每个所述电触点上形成涂层，以将每个所述接合线的接合端封装在所述电触点上; 进行成型工艺以形成用于封装芯片，接合线和电触头的密封剂; 并移除载体，使得电触点的底表面从密封剂暴露出来。 这获得不具有载体的半导体封装，并且涂层可以增强电触点和密封剂之间的粘附。

公开(公告)号：US20060282764A1

公开(公告)日：2006-12-14

申请号：US11147723

申请日：2005-06-08

Applicant: Chen-Yi Lee ,  Yu-Wei Lin

Inventor： Chen-Yi Lee ,  Yu-Wei Lin

IPC: G06F15/00

CPC classification number: G06F17/142

Abstract: The invention proposes a pipelined FFT processor for UWB system, comprising a first module for implementing radix-2 FFT algorithm; a second module is to realize radix-8 FFT algorithm; a third module is to realize radix-8 FFT algorithm; a plurality of conjugate blocks; a division block; and a plurality of multiplexers. The proposed pipelined FFT architecture called Mixed-Radix Multi-Path Delay Feedback (MRMDF) can provide higher throughput rate by using the multi-data-path scheme. The high-radix FFT algorithm is also realized in our processor to reduce the number of complex multiplications.

Abstract translation: 本发明提出了一种用于UWB系统的流水线FFT处理器，包括用于实现基2 FFT算法的第一模块; 第二个模块是实现基数8 FFT算法; 第三个模块是实现基数8 FFT算法; 多个共轭嵌段; 分区块 和多个多路复用器。 所提出的流水线FFT架构称为混合多径延迟反馈（MRMDF）可以通过使用多数据路径方案提供更高的吞吐率。 在我们的处理器中也实现了高基FFT算法，以减少复数乘法。

公开(公告)号：US06463013B1

公开(公告)日：2002-10-08

申请号：US09631293

申请日：2000-08-02

Applicant: Kuo-Ping Liu ,  Jiin Lai ,  Jyh-fong Lin ,  Yu-Wei Lin

Inventor： Kuo-Ping Liu ,  Jiin Lai ,  Jyh-fong Lin ,  Yu-Wei Lin

IPC: G04F500

CPC classification number: H03L7/199 ,  G06F1/06 ,  H03L7/07 ,  H03L7/23

Abstract: A clock generating apparatus and method for generating clock signals of different frequency. The clock generating apparatus and method receives and divides a main clock signal to obtain a reference clock signal. Then, the reference clock signal and the first feedback clock signal are phase-locked to obtain the first clock signal. Moreover, the reference clock signal and the second feedback clock signal are phase-locked to obtain the second clock signal. The reset signal and the first clock signal are received by a divider. The divider then outputs the first feedback clock signal. Another divider receives the reset signal and the second clock signal and then outputs the second feedback clock signal.

Abstract translation: 一种用于产生不同频率的时钟信号的时钟产生装置和方法。 时钟发生装置和方法接收和分割主时钟信号以获得参考时钟信号。 然后，参考时钟信号和第一反馈时钟信号被锁相以获得第一时钟信号。 此外，参考时钟信号和第二反馈时钟信号被锁相以获得第二时钟信号。 复位信号和第一时钟信号由分频器接收。 然后分频器输出第一反馈时钟信号。 另一分频器接收复位信号和第二时钟信号，然后输出第二反馈时钟信号。

公开(公告)号：US08741448B2

公开(公告)日：2014-06-03

申请号：US13206249

申请日：2011-08-09

Applicant: Chih-Ping Chen ,  Yeu-Ding Chen ,  Shih-Ching Chuang ,  Yu-Wei Lin ,  Fu-Wei Chan

Inventor： Chih-Ping Chen ,  Yeu-Ding Chen ,  Shih-Ching Chuang ,  Yu-Wei Lin ,  Fu-Wei Chan

IPC: H01L51/50 ,  H01L29/786 ,  H01L33/36 ,  C07D409/14 ,  C07D409/10

CPC classification number: H01L51/0047 ,  B82Y10/00 ,  C07D409/10 ,  C07D409/14 ,  C09K11/06 ,  C09K2211/1416 ,  C09K2211/1458 ,  H01L51/0036 ,  H01L51/4253 ,  H05B33/14 ,  Y02E10/549

Abstract: Disclosed is a fullerene derivative having a formula of F-Cy, wherein F is an open-cage fullerene, and Cy is a chalcogenyl group. The fullerene derivative can be applied to hydrogen storage material and an optoelectronic device such as an organic light emitting diode (OLED), a solar cell, or an organic thin film transistor (TFT).

Abstract translation: 公开了具有式F-Cy的富勒烯衍生物，其中F是开放式笼式富勒烯，Cy是硫族基。 富勒烯衍生物可以应用于储氢材料和诸如有机发光二极管（OLED），太阳能电池或有机薄膜晶体管（TFT）的光电子器件。

公开(公告)号：US20130321241A1

公开(公告)日：2013-12-05

申请号：US13486905

申请日：2012-06-01

Applicant: Yu-Wei LIN

Inventor： Yu-Wei LIN

IPC: H01Q1/50

CPC classification number: H01Q1/2275

Abstract: In an interface card and antenna fixture structure of a communication module, an interface card includes a printed circuit board, a circuit module, a plurality of pins, and an antenna connector, and the antenna is conductively coupled to the antenna connector, and the pressing component is disposed on the printed circuit board and installed at a corresponding connecting position of the antenna and the antenna connector, and the locking component is passed through the pressing component and the printed circuit board and coupled to the motherboard, such that the pressing component presses the antenna and the antenna connector.

Abstract translation: 在通信模块的接口卡和天线固定结构中，接口卡包括印刷电路板，电路模块，多个引脚和天线连接器，并且天线导电地耦合到天线连接器，并且按压 组件设置在印刷电路板上并安装在天线和天线连接器的对应连接位置，并且锁定部件通过按压部件和印刷电路板并耦合到母板，使得按压部件按压 天线和天线连接器。

公开(公告)号：US08242842B2

公开(公告)日：2012-08-14

申请号：US13364043

申请日：2012-02-01

Applicant: Yu-Wei Lin ,  Yung-Chow Peng

Inventor： Yu-Wei Lin ,  Yung-Chow Peng

IPC: H03F3/45

CPC classification number: H03F3/45183 ,  H03F3/45475 ,  H03F3/45632 ,  H03F3/45928 ,  H03F2203/45512 ,  H03F2203/45588

Abstract: A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level.