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    Phase change memory devices including phase change layer formed by selective growth methods and methods of manufacturing the same
    1.
    发明授权
    Phase change memory devices including phase change layer formed by selective growth methods and methods of manufacturing the same 有权
    相变存储器件包括通过选择性生长方法形成的相变层及其制造方法

    公开(公告)号：US08445318B2

    公开(公告)日：2013-05-21

    申请号：US13064410

    申请日：2011-03-23

    Applicant: Woong-chul Shin

    Inventor： Woong-chul Shin

    IPC: H01L21/06

    CPC classification number: H01L45/1233 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1616 ,  H01L45/1666 ,  H01L45/1683

    Abstract: A phase change memory device including a phase change layer includes a storage node and a switching device. The switching device is connected to the storage node. The storage node includes a phase change layer selectively grown directly on a lower electrode. In a method of manufacturing a phase change memory device, an insulating interlayer is formed on a semiconductor substrate to cover a switching device. A lower electrode connected to the switching device is formed, and a phase change layer is selectively grown directly on the lower electrode.

    Abstract translation: 包括相变层的相变存储器件包括存储节点和开关器件。 交换设备连接到存储节点。 存储节点包括直接在下电极上生长的相变层。 在制造相变存储器件的方法中，在半导体衬底上形成绝缘中间层以覆盖开关器件。 形成连接到开关器件的下电极，并且在下电极上选择性地生长相变层。

    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers
    2.
    发明授权
    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers 失效
    非易失性存储器件及其编程方法，包括通过电荷陷阱层之间的衬垫氧化物层移动电子

    公开(公告)号：US07668016B2

    公开(公告)日：2010-02-23

    申请号：US12078141

    申请日：2008-03-27

    Applicant: Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    Inventor： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    IPC: G11C16/04

    CPC classification number: G11C16/0475 ,  G11C16/10 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/7923

    Abstract: Non-volatile memory devices and methods of programming a non-volatile memory device in which electrons are moved between charge trap layers through a pad oxide layer are provided. The non-volatile memory devices include a charge trap layer on a semiconductor substrate and storing electrons, a pad oxide layer on the first charge trap layer, and a second trap layer on the pad oxide layer and storing electrons. In a programming mode in which data is written, the stored electrons are moved between a first position of the first charge trap layer and a first position of the second charge trap layer through the pad oxide layer or between a second position of the first charge trap layer and a second position of the second charge trap layer through the pad oxide layer.

    Abstract translation: 提供非易失性存储器件以及通过衬垫氧化物层对电子在电荷陷阱层之间移动的非易失性存储器件进行编程的方法。 非易失性存储器件包括半导体衬底上的电荷陷阱层，并且存储电子，在第一电荷陷阱层上形成焊盘氧化物层，并且在焊盘氧化物层上存储第二陷阱层并存储电子。 在写入数据的编程模式中，所存储的电子在第一电荷陷阱层的第一位置和第二电荷陷阱层的第一位置之间通过焊盘氧化物层或第一电荷陷阱的第二位置之间移动 层和第二电荷陷阱层的第二位置穿过衬垫氧化物层。

    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers
    3.
    发明申请
    Non-volatile memory devices and programming methods thereof including moving electrons through pad oxide layers between charge trap layers 失效
    非易失性存储器件及其编程方法，包括通过电荷陷阱层之间的衬垫氧化物层移动电子

    公开(公告)号：US20090034341A1

    公开(公告)日：2009-02-05

    申请号：US12078141

    申请日：2008-03-27

    Applicant: Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    Inventor： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    IPC: G11C16/04 ,  H01L29/792

    CPC classification number: G11C16/0475 ,  G11C16/10 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/7923

    Abstract: Non-volatile memory devices and methods of programming a non-volatile memory device in which electrons are moved between charge trap layers through a pad oxide layer are provided. The non-volatile memory devices include a charge trap layer on a semiconductor substrate and storing electrons, a pad oxide layer on the first charge trap layer, and a second trap layer on the pad oxide layer and storing electrons. In a programming mode in which data is written, the stored electrons are moved between a first position of the first charge trap layer and a first position of the second charge trap layer through the pad oxide layer or between a second position of the first charge trap layer and a second position of the second charge trap layer through the pad oxide layer.

    Abstract translation: 提供非易失性存储器件以及通过衬垫氧化物层对电子在电荷陷阱层之间移动的非易失性存储器件进行编程的方法。 非易失性存储器件包括半导体衬底上的电荷陷阱层，并且存储电子，在第一电荷陷阱层上形成焊盘氧化物层，并且在焊盘氧化物层上存储第二陷阱层并存储电子。 在写入数据的编程模式中，所存储的电子在第一电荷陷阱层的第一位置和第二电荷陷阱层的第一位置之间通过焊盘氧化物层或第一电荷陷阱的第二位置之间移动 层和第二电荷陷阱层的第二位置穿过衬垫氧化物层。

    Method of forming phase change layer using a germanium precursor and method of manufacturing phase change memory device using the same
    4.
    发明申请
    Method of forming phase change layer using a germanium precursor and method of manufacturing phase change memory device using the same 失效
    使用锗前体形成相变层的方法和使用其制造相变存储器件的方法

    公开(公告)号：US20080118636A1

    公开(公告)日：2008-05-22

    申请号：US11979778

    申请日：2007-11-08

    Applicant: Woong-chul Shin ,  Jae-ho Lee ,  Youn-seon Kang

    Inventor： Woong-chul Shin ,  Jae-ho Lee ,  Youn-seon Kang

    IPC: B05D5/12 ,  B32B15/04

    CPC classification number: G11C11/5678 ,  C23C16/305 ,  C23C16/45531 ,  C23C16/45553 ,  G11C13/0004 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1616 ,  H01L45/1683 ,  Y10T428/31678

    Abstract: A method of forming a phase change layer using a Ge compound and a method of manufacturing a phase change memory device using the same are provided. The method of manufacturing a phase change memory device included supplying a first precursor on a lower layer on which the phase change layer is to be formed, wherein the first precursor is a bivalent precursor including germanium (Ge) and having a cyclic structure. The first precursor may be a cyclic germylenes Ge-based compound or a macrocyclic germylenes Ge-based, having a Ge—N bond. The phase change layer may be formed using a MOCVD method, cyclic-CVD method or an ALD method. The composition of the phase change layer may be controlled by a deposition pressure in a range of 0.001 torr-10 torr, a deposition temperature in a range of 150° C. to 350° C. and/or a flow rate of a reaction gas in the range of 0-1 slm.

    Abstract translation: 提供了使用Ge化合物形成相变层的方法以及使用该化合物的相变存储器件的制造方法。 制造相变存储器件的方法包括在其上形成相变层的下层上提供第一前体，其中第一前体是包含锗（Ge）并具有环状结构的二价前体。 第一前体可以是具有Ge-N键的环状锗烷Ge基化合物或大环锗基Ge。 相变层可以使用MOCVD法，循环CVD法或ALD法形成。 相变层的组成可以通过在0.001托-10托的范围内的沉积压力，150℃至350℃的沉积温度和/或反应气体的流量来控制 在0-1 slm的范围内。

    Multibit phase change memory device and method of driving the same
    6.
    发明授权
    Multibit phase change memory device and method of driving the same 有权
    多位相变存储器件及其驱动方法

    公开(公告)号：US07233017B2

    公开(公告)日：2007-06-19

    申请号：US11082054

    申请日：2005-03-15

    Applicant: Sung Min Yoon ,  Sangouk Ryu ,  Woong Chul Shin ,  Nam Yeal Lee ,  Byoung Gon Yu

    Inventor： Sung Min Yoon ,  Sangouk Ryu ,  Woong Chul Shin ,  Nam Yeal Lee ,  Byoung Gon Yu

    IPC: H01L47/00

    CPC classification number: G11C11/5692 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2213/71 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

    Abstract: A multibit phase change memory device structured such that a plurality of individual phase change memory devices are aligned in a plan area or vertically, and a method of driving the same are provided. The multibit phase change memory device includes a phase change material layer having a plurality of contact portions being in contact with a heating electrode, and having a plurality of active regions, each active region forming a unit phase change memory device. The phase change material layer may be composed of one material layer in which the plurality of active regions are aligned in plural arrays. Alternatively, the phase change material layer may be composed of a plurality of phase change material layers in which one or plural active regions are respectively aligned in one array. The plurality of phase change material layers may be disposed in a same level of a plan area, or the plurality of phase change material layers may be respectively disposed on different plan areas in a same vertical line.

    Abstract translation: 一种多位相变存储器件，其被构造为使得多个单个相变存储器件在平面区域或垂直方向上对准，并且提供其驱动方法。 多位相变存储器件包括：相变材料层，具有与加热电极接触的多个接触部分，并且具有多个有源区域，每个有源区域形成单位相变存储器件。 相变材料层可以由多个有源区域以多个阵列排列的一个材料层构成。 或者，相变材料层可以由多个相变材料层构成，其中一个或多个有源区域分别对齐在一个阵列中。 多个相变材料层可以设置在平面区域的相同水平面上，或者多个相变材料层可以分别设置在相同垂直线上的不同平面区域上。

    BONDING WIRE FOR SEMICONDUCTOR PACKAGE
    7.
    发明公开
    BONDING WIRE FOR SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20240096516A1

    公开(公告)日：2024-03-21

    申请号：US18273497

    申请日：2022-01-21

    Applicant: Woong Chul SHIN ,  Min BAEK

    Inventor： Woong Chul SHIN ,  Min BAEK

    IPC: H01B1/02 ,  H01B3/10

    CPC classification number: H01B1/02 ,  H01B3/10 ,  H01L23/49811

    Abstract: Provided is a bonding wire for a semiconductor package, which includes an insulating layer formed on the outer surface of a core portion by a thin layer deposition method, so that the occurrence of a short-circuit during wire bonding is fundamentally prevented and bondability is improved. The bonding wire for a semiconductor package comprises: a core portion formed of a conductive metal; and an insulating layer formed on the outer surface of the core portion by a thin layer deposition method.

    Method of forming a phase change layer and method of manufacturing a storage node having the phase change layer
    8.
    发明授权
    Method of forming a phase change layer and method of manufacturing a storage node having the phase change layer 失效
    形成相变层的方法和制造具有相变层的存储节点的方法

    公开(公告)号：US07902048B2

    公开(公告)日：2011-03-08

    申请号：US11976130

    申请日：2007-10-22

    Applicant: Woong-chul Shin ,  Jae-ho Lee ,  Youn-seon Kang

    Inventor： Woong-chul Shin ,  Jae-ho Lee ,  Youn-seon Kang

    IPC: H01L21/20

    CPC classification number: C23C16/305 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1616 ,  H01L45/1683

    Abstract: A method of forming a phase change layer may include providing a bivalent first precursor having germanium (Ge), a second precursor having antimony (Sb), and a third precursor having tellurium (Te) onto a surface on which the phase change layer is to be formed. The phase change layer may be formed by CVD (e.g., MOCVD, cyclic-CVD) or ALD. The composition of the phase change layer may be varied by modifying the deposition pressure, deposition temperature, and/or supply rate of reaction gas. The deposition pressure may range from about 0.001-10 torr, the deposition temperature may range from about 150-350° C., and the supply rate of the reaction gas may range from about 0-1 slm. Additionally, the above phase change layer may be provided in a via hole and bounded by top and bottom electrodes to form a storage node.

    Abstract translation: 形成相变层的方法可以包括将具有锗（Ge）的二价第一前体，具有锑（Sb）的第二前体和具有碲（Te）的第三前体提供到相变层上的表面上 形成。 相变层可以通过CVD（例如MOCVD，循环CVD）或ALD形成。 可以通过改变沉积压力，沉积温度和/或反应气体的供应速率来改变相变层的组成。 沉积压力可以在约0.001-10托的范围内，沉积温度可以在约150-350℃的范围内，并且反应气体的供应速率可以在约0-1slm的范围内。 此外，上述相变层可以设置在通孔中并且由顶部和底部电极限定以形成存储节点。

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