公开(公告)号：US08810018B2

公开(公告)日：2014-08-19

申请号：US11307382

申请日：2006-02-03

Applicant: Jong-Woo Ha ,  Sang-Ho Lee ,  Soo-San Park

Inventor： Jong-Woo Ha ,  Sang-Ho Lee ,  Soo-San Park

IPC: H01L23/02

CPC classification number: H01L24/48 ,  H01L23/3128 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85399 ,  H01L2224/85986 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/85186 ,  H01L2224/78 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/4554

Abstract: A stacked integrated circuit package system is provided forming a first molded chip comprises attaching a conductor on a wafer, applying an encapsulant around the conductor, and exposing a surface of the conductor in the encapsulant, attaching a first electrical interconnect on the conductor of the first molded chip and stacking an integrated circuit device on the first molded chip with an electrical connector of the integrated circuit device connected to the conductor of the first molded chip with the first electrical interconnect.

Abstract translation: 提供了一种堆叠的集成电路封装系统，其形成第一模制芯片，包括将导体附着在晶片上，在导体周围施加密封剂，以及将导体的表面暴露在密封剂中，将第一电互连件附接到第一 将第一模制芯片上的集成电路器件堆叠在一起，其中集成电路器件的电连接器通过第一电互连连接到第一模制芯片的导体上。

公开(公告)号：US08692365B2

公开(公告)日：2014-04-08

申请号：US13163611

申请日：2011-06-17

Applicant: DongSoo Moon ,  Taewoo Lee ,  Soo-San Park ,  SooMoon Park ,  Sang-Ho Lee

Inventor： DongSoo Moon ,  Taewoo Lee ,  Soo-San Park ,  SooMoon Park ,  Sang-Ho Lee

IPC: H01L23/02

CPC classification number: H01L23/3128 ,  H01L23/36 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; attaching a package stack assembly, having a contact pad, on the base substrate; applying an encapsulation having a cavity with a tapered side directly over the package stack assembly, the contact pad exposed in the cavity; attaching a recessed circuitry unit in the cavity and on the contact pad, a chamber of the cavity formed by the recessed circuitry unit and the tapered side of the cavity; and mounting a thermal structure over the recessed circuitry unit, the cavity, and the encapsulation.

Abstract translation: 一种制造集成电路封装系统的方法，包括：提供基底; 将具有接触垫的包装堆叠组件附接在所述基底基板上; 将具有锥形侧的空腔的封装直接施加在封装堆叠组件上方，该接触垫暴露在空腔中; 将凹陷的电路单元附接在所述空腔和所述接触垫上，所述凹腔由所述凹陷电路单元和所述空腔的锥形侧形成; 并将热结构安装在凹进的电路单元，空腔和封装之上。

公开(公告)号：US08390110B2

公开(公告)日：2013-03-05

申请号：US12582582

申请日：2009-10-20

Applicant: Sang-Ho Lee ,  Taewoo Lee ,  Soo-San Park

Inventor： Sang-Ho Lee ,  Taewoo Lee ,  Soo-San Park

IPC: H01L23/48

CPC classification number: H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/85 ,  H01L25/03 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/85001 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting a substrate-less integrated circuit package, having a terminal having characteristics of an intermetallic compound, over a substrate; connecting the substrate and the substrate-less integrated circuit package; and forming a base encapsulation over the substrate-less integrated circuit package with the terminal exposed.

Abstract translation: 一种集成电路封装系统的制造方法，包括：在衬底上安装具有金属间化合物特性的端子的无基板集成电路封装; 连接基板和无基板集成电路封装; 以及在所述无衬底的集成电路封装上形成基底封装，所述端子暴露。

公开(公告)号：US08383458B2

公开(公告)日：2013-02-26

申请号：US12974265

申请日：2010-12-21

Applicant: DaeSik Choi ,  BumJoon Hong ,  Sang-Ho Lee ,  Jong-Woo Ha ,  Soo-San Park

Inventor： DaeSik Choi ,  BumJoon Hong ,  Sang-Ho Lee ,  Jong-Woo Ha ,  Soo-San Park

IPC: H01L21/00 ,  H01L23/02

CPC classification number: H01L24/81 ,  H01L23/552 ,  H01L24/14 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81194 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/8592 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2924/00

Abstract: A method for manufacturing an integrated circuit package system includes: providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect.

Abstract translation: 一种用于制造集成电路封装系统的方法，包括：通过在一侧形成的电互连，提供包括耦合到基底基板的第一集成电路的基底封装; 以及将偏移封装安装在所述基底封装上，所述偏移封装通过系统互连电耦合到所述基底衬底。

公开(公告)号：US20120228767A1

公开(公告)日：2012-09-13

申请号：US13477630

申请日：2012-05-22

Applicant: Sang-Ho Lee ,  Soo-San Park ,  DaeSik Choi

Inventor： Sang-Ho Lee ,  Soo-San Park ,  DaeSik Choi

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L23/3128 ,  H01L23/3135 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/91 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04073 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/13099 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48475 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/85951 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: An integrated circuit package system includes: providing a package substrate; mounting an interposer chip containing active circuitry over the package substrate; attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; connecting a stack connector to the interposer chip and the package substrate; and applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.

Abstract translation: 集成电路封装系统包括：提供封装衬底; 将包含有源电路的插入器芯片安装在所述封装衬底上; 附接具有基底凸起端和柱形凸起端的导电凸块，所述基座凸起端在所述插入片上; 将堆叠连接器连接到插入器芯片和封装衬底; 以及将封装密封剂施加在所述插入器芯片，所述堆叠连接器以及所述导电凸块堆叠上，其中所述导电凸块的所述凸块的端部基本暴露。

公开(公告)号：US08115293B2

公开(公告)日：2012-02-14

申请号：US12633789

申请日：2009-12-08

Applicant: DongSoo Moon ,  Taewoo Lee ,  Soo-San Park ,  SooMoon Park ,  Sang-Ho Lee

Inventor： DongSoo Moon ,  Taewoo Lee ,  Soo-San Park ,  SooMoon Park ,  Sang-Ho Lee

IPC: H01L21/60

CPC classification number: H01L25/50 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a first substrate; mounting a component over the first substrate; mounting a stack substrate over the component, the stack substrate having an inner pad and an outer pad connected to the first substrate; mounting a first exposed interconnect on the outer pad; forming a first encapsulation over the stack substrate, the first exposed interconnect partially exposed and the inner pad partially exposed in a recess of the first encapsulation; and mounting a second exposed interconnect on the inner pad.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供第一基板; 将部件安装在所述第一基板上; 将堆叠衬底安装在所述部件上，所述堆叠衬底具有内衬垫和连接到所述第一衬底的外衬垫; 将第一暴露的互连件安装在所述外垫上; 在所述堆叠衬底上形成第一封装，所述第一暴露的互连部分暴露，并且所述内衬垫部分地暴露在所述第一封装的凹部中; 以及将第二暴露的互连件安装在所述内垫上。

公开(公告)号：US20110186994A1

公开(公告)日：2011-08-04

申请号：US13085475

申请日：2011-04-12

Applicant: Chan Hoon Ko ,  Soo-San Park ,  YoungChul Kim

Inventor： Chan Hoon Ko ,  Soo-San Park ,  YoungChul Kim

IPC: H01L23/50 ,  H01L21/56

CPC classification number: H01L23/49833 ,  H01L23/481 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive support over the substrate with the conductive support adjacent to the integrated circuit; providing a pre-formed interposer, having an interposer through via and a pre-attached interconnect, with the pre-attached interconnect attached to the interposer through via; mounting the pre-formed interposer over the integrated circuit and the conductive support with the pre-attached interconnect over the device through via; and forming an encapsulation over the substrate covering the integrated circuit, the conductive support, and partially covering the pre-formed interposer.

Abstract translation: 一种制造集成电路封装系统的方法，包括：通过穿过集成电路和通过通孔连接到设备的器件互连，通过穿过集成电路和器件互连的装置，在衬底上安装具有穿过通孔和器件互连的器件的集成电路; 将所述导电支撑件附接在所述基板上，所述导电支撑件与所述集成电路相邻; 提供预先形成的插入器，其具有通过通孔和预连接互连件的插入件，预连接的互连件通过通孔连接到插入器; 将预先形成的插入件安装在集成电路和导电支撑件上，预先连接的互连件通过通孔穿过器件; 以及在覆盖所述集成电路的所述衬底，所述导电支撑件上形成封装，并且部分地覆盖所述预先形成的所述插入件。

公开(公告)号：US07968995B2

公开(公告)日：2011-06-28

申请号：US12483087

申请日：2009-06-11

Applicant: Chan Hoon Ko ,  Soo-San Park ,  HeeJo Chi

Inventor： Chan Hoon Ko ,  Soo-San Park ,  HeeJo Chi

IPC: H01L23/02

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/83191 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture an integrated circuit packaging system includes: providing a base substrate; mounting a first base integrated circuit over the base substrate; mounting a second base integrated circuit over the first base integrated circuit; attaching a stacking interconnect to the base substrate and adjacent to the first base integrated circuit; and forming a base encapsulation, having a recess portion from a corner of the base encapsulation and a step portion adjacent to the recess portion, with the step portion over the second base integrated circuit and the recess portion exposing the stacking interconnect.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供基底; 在基底基板上安装第一基底集成电路; 在第一基础集成电路上安装第二基础集成电路; 将堆叠互连附接到所述基底基板并且邻近所述第一基底集成电路; 以及形成基底封装，所述基底封装具有从所述基底封装的拐角处的凹陷部分和与所述凹部相邻的台阶部分，所述台阶部分在所述第二基底集成电路上方，所述凹部暴露所述堆叠互连。

公开(公告)号：US20100244221A1

公开(公告)日：2010-09-30

申请号：US12413302

申请日：2009-03-27

Applicant: Chan Hoon Ko ,  Soo-San Park ,  YoungChul Kim

Inventor： Chan Hoon Ko ,  Soo-San Park ,  YoungChul Kim

IPC: H01L23/488 ,  H01L21/02

CPC classification number: H01L23/49833 ,  H01L23/481 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive support over the substrate with the conductive support adjacent to the integrated circuit; providing a pre-formed interposer, having an interposer through via and a pre-attached interconnect, with the pre-attached interconnect attached to the interposer through via; mounting the pre-formed interposer over the integrated circuit and the conductive support with the pre-attached interconnect over the device through via; and forming an encapsulation over the substrate covering the integrated circuit, the conductive support, and partially covering the pre-formed interposer.

Abstract translation: 一种制造集成电路封装系统的方法，包括：通过穿过集成电路和通过通孔连接到设备的器件互连，通过穿过集成电路和器件互连的装置，在衬底上安装具有穿过通孔和器件互连的器件的集成电路; 将所述导电支撑件附接在所述基板上，所述导电支撑件与所述集成电路相邻; 提供预先形成的插入器，其具有通过通孔和预连接互连件的插入件，预连接的互连件通过通孔连接到插入器; 将预先形成的插入件安装在集成电路和导电支撑件上，预先连接的互连件通过通孔穿过器件; 以及在覆盖所述集成电路的所述衬底，所述导电支撑件上形成封装，并且部分地覆盖所述预先形成的所述插入件。

公开(公告)号：US20100046183A1

公开(公告)日：2010-02-25

申请号：US12194506

申请日：2008-08-19

Applicant: HyungSang Park ,  In Sang Yoon ,  DeokKyung Yang ,  Soo-San Park

Inventor： HyungSang Park ,  In Sang Yoon ,  DeokKyung Yang ,  Soo-San Park

IPC: H05K7/10 ,  H01L21/00

CPC classification number: H01L23/4334 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An integrated circuit package system includes: connecting a carrier and an integrated circuit mounted thereover; mounting an interposer, having an opening, over the integrated circuit; connecting an interconnect between the interposer and the carrier through the opening; and forming an encapsulation planar with a carrier vertical side of the carrier and an interposer vertical side of the interposer.

Abstract translation: 集成电路封装系统包括：连接载体和安装在其上的集成电路; 在集成电路上安装具有开口的插入器; 通过开口连接插入器和载体之间的互连; 并且形成与载体的载体垂直侧和插入器的插入器垂直侧的平坦的封装。