公开(公告)号：US08860031B2

公开(公告)日：2014-10-14

申请号：US13423955

申请日：2012-03-19

Applicant: Shinji Mori

Inventor： Shinji Mori

IPC: H01L27/105 ,  H01L21/20 ,  H01L29/78 ,  H01L29/66 ,  H01L27/115 ,  H01L29/792 ,  H01L21/02

CPC classification number: H01L29/7926 ,  H01L21/02532 ,  H01L21/0262 ,  H01L27/11582 ,  H01L29/66833

Abstract: A non-volatile semiconductor memory device according to an embodiment includes a semiconductor substrate and a transistor provided on the semiconductor substrate. The transistor includes a conductive layer, a gate insulating layer, a semiconductor layer, and an oxidation layer. The conductive layer functions as a gate of the transistor. The gate insulating layer contacts with a side surface of the conductive layer. The semiconductor layer has a side surface sandwiching the gate insulating layer with the conductive layer, extends a direction perpendicular to the semiconductor substrate, and functions as a body of the transistor. The oxidation layer contacts with the other side surface of the semiconductor layer. The semiconductor layer is made of silicon germanium. The oxidation layer is made of a silicon oxide.

Abstract translation: 根据实施例的非易失性半导体存储器件包括半导体衬底和设置在半导体衬底上的晶体管。 晶体管包括导电层，栅极绝缘层，半导体层和氧化层。 导电层用作晶体管的栅极。 栅绝缘层与导电层的侧表面接触。 半导体层具有将导电层夹在栅极绝缘层上的侧表面，并且垂直于半导体衬底的方向延伸，并用作晶体管本体。 氧化层与半导体层的另一侧表面接触。 半导体层由硅锗制成。 氧化层由氧化硅制成。

公开(公告)号：US08763943B2

公开(公告)日：2014-07-01

申请号：US13018752

申请日：2011-02-01

Applicant: Takahiro Osaki ,  Shinji Mori

Inventor： Takahiro Osaki ,  Shinji Mori

IPC: B65H75/48

CPC classification number: B60R22/44

Abstract: A webbing take-up device which can improve the workability of the assembly work of a tension reducer is obtained. In this webbing take-up device, a take-up spring unit is arranged closer to the opening side of a case than a reduction spring unit within a case. For this reason, when a clutch is arranged inside the reduction balance spring and the inner end of the reduction balance spring in a spiral direction is locked to a spring case of the clutch, the clutch and the reduction balance spring can be easily and visually recognized from the opening side of the case. Thus, the other end of the reduction balance spring can be easily locked to the spring case.

Abstract translation: 可以获得能够提高张力减小器的组装作业的加工性的织带卷取装置。 在这种织带卷取装置中，卷取弹簧单元布置成比壳体内的还原弹簧单元更靠近壳体的开口侧。 因此，当离合器配置在减速平衡弹簧内部并且减速平衡弹簧的螺旋方向的内端被锁定到离合器的弹簧壳体时，离合器和减速平衡弹簧可以容易地和视觉上识别 从外壳的开口侧。 因此，减速平衡弹簧的另一端可以容易地锁定到弹簧箱。

公开(公告)号：US08551871B2

公开(公告)日：2013-10-08

申请号：US13240662

申请日：2011-09-22

Applicant: Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

Inventor： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

IPC: H01L21/20 ,  H01L21/36

CPC classification number: H01L21/02636 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

Abstract translation: 根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由 的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中， 从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

公开(公告)号：US20130069118A1

公开(公告)日：2013-03-21

申请号：US13423955

申请日：2012-03-19

Applicant: Shinji MORI

Inventor： Shinji MORI

IPC: H01L27/105 ,  H01L21/20 ,  H01L29/78

CPC classification number: H01L29/7926 ,  H01L21/02532 ,  H01L21/0262 ,  H01L27/11582 ,  H01L29/66833

Abstract: A non-volatile semiconductor memory device according to an embodiment includes a semiconductor substrate and a transistor provided on the semiconductor substrate. The transistor includes a conductive layer, a gate insulating layer, a semiconductor layer, and an oxidation layer. The conductive layer functions as a gate of the transistor. The gate insulating layer contacts with a side surface of the conductive layer. The semiconductor layer has a side surface sandwiching the gate insulating layer with the conductive layer, extends a direction perpendicular to the semiconductor substrate, and functions as a body of the transistor. The oxidation layer contacts with the other side surface of the semiconductor layer. The semiconductor layer is made of silicon germanium. The oxidation layer is made of a silicon oxide.

Abstract translation: 根据实施例的非易失性半导体存储器件包括半导体衬底和设置在半导体衬底上的晶体管。 晶体管包括导电层，栅极绝缘层，半导体层和氧化层。 导电层用作晶体管的栅极。 栅绝缘层与导电层的侧表面接触。 半导体层具有将导电层夹在栅极绝缘层上的侧表面，并且垂直于半导体衬底的方向延伸，并用作晶体管本体。 氧化层与半导体层的另一侧表面接触。 半导体层由硅锗制成。 氧化层由氧化硅制成。

公开(公告)号：US20120090535A1

公开(公告)日：2012-04-19

申请号：US13240662

申请日：2011-09-22

Applicant: Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

Inventor： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

IPC: C30B25/02

CPC classification number: H01L21/02636 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

Abstract translation: 根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由 的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中， 从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

公开(公告)号：US20110260025A1

公开(公告)日：2011-10-27

申请号：US13093253

申请日：2011-04-25

Applicant: Yuuki AOSHIMA ,  Toyoka IDE ,  Shinji MORI

Inventor： Yuuki AOSHIMA ,  Toyoka IDE ,  Shinji MORI

IPC: F16B2/26 ,  F16B2/20

CPC classification number: H02G3/32 ,  B60R16/0215 ,  F16L3/13 ,  F16L3/223

Abstract: The tang portion of a clamp member of the carpet clamp deforms elastically, and thus the portion which holds a wire harness can be moved. Further, the tang portion is pressed (deformed) in the direction of a bottom wall by a groove portion. Thus the tang portion fits to the wire harnesses having different diameters. Further, in the case where the wire harness has a small diameter, the tang portion of the clamp member deforms elastically, and thus the portion which holds the wire harness is moved, and thus the outside dimension of the carpet clamp becomes substantially small in accordance with the wire harness having a small diameter. The carpet clamp has a height which is smaller by a dimension than in the case where the wire harness has a large diameter.

Abstract translation: 地毯夹具的夹紧构件的柄部会弹性地变形，因此可以移动保持线束的部分。 此外，柄部通过槽部在底壁的方向上被挤压（变形）。 因此，脚部适合于具有不同直径的线束。 此外，在线束具有小直径的情况下，夹持构件的脚部部分弹性变形，因此保持线束的部分移动，因此地毯夹具的外部尺寸根据 线束具有小的直径。 地毯夹具的高度比线束具有大直径的情况下的尺寸小。

公开(公告)号：US08043945B2

公开(公告)日：2011-10-25

申请号：US12401453

申请日：2009-03-10

Applicant: Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

Inventor： Ichiro Mizushima ,  Shinji Mori ,  Masahiko Murano ,  Tsutomu Sato ,  Takashi Nakao ,  Hiroshi Itokawa

IPC: H01L21/20 ,  H01L21/36

CPC classification number: H01L21/02636 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.

Abstract translation: 根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由 的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中， 从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

公开(公告)号：US20110237052A1

公开(公告)日：2011-09-29

申请号：US13047136

申请日：2011-03-14

Applicant: Ichiro MIZUSHIMA ,  Shinji Mori

Inventor： Ichiro MIZUSHIMA ,  Shinji Mori

IPC: H01L21/20

CPC classification number: H01L21/02532 ,  H01L21/02535 ,  H01L21/02601 ,  H01L21/02667

Abstract: According to an embodiment of the present invention, a method for manufacturing a semiconductor device includes: forming an epitaxial crystal from a seed crystal exposed between first and second structures; heating the epitaxial crystal at a temperature equal to or less than a melting point of the epitaxial crystal to migrate the epitaxial crystal; and migrating the epitaxial crystal to form plural aggregates between the first and second structures.

Abstract translation: 根据本发明的实施例，一种用于制造半导体器件的方法包括：从在第一和第二结构之间暴露的晶种形成外延晶体; 在等于或小于外延晶体的熔点的温度下加热外延晶体以迁移外延晶体; 并且迁移所述外延晶体以在所述第一和第二结构之间形成多个聚集体。

公开(公告)号：US08012858B2

公开(公告)日：2011-09-06

申请号：US12560265

申请日：2009-09-15

Applicant: Masahiko Murano ,  Ichiro Mizushima ,  Tsutomu Sato ,  Shinji Mori ,  Shuji Katsui ,  Hiroshi Itokawa

Inventor： Masahiko Murano ,  Ichiro Mizushima ,  Tsutomu Sato ,  Shinji Mori ,  Shuji Katsui ,  Hiroshi Itokawa

IPC: H01L21/20

CPC classification number: H01L21/02381 ,  H01L21/02378 ,  H01L21/02532 ,  H01L21/02661 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L29/66795 ,  H01L29/7848

Abstract: A method of fabricating a semiconductor device according to one embodiment includes: removing a native oxide film and adhering silicon nitrides on an area of a Si based substrate in hydrogen gas atmosphere under a condition in which a pressure is a first pressure and a temperature is a first temperature, a silicon nitride-containing member being formed on the Si based substrate, the area being a area not covered by the member; lowering the temperature to a second temperature from the first temperature while maintaining the pressure at the first pressure in hydrogen gas atmosphere; lowering the pressure to a second pressure from the first pressure while maintaining the temperature at the second temperature in hydrogen gas atmosphere; and epitaxially growing a crystal on the area of the Si based substrate in a precursor gas atmosphere after the pressure is lowered to the second pressure, the crystal including at least one of Si and Ge, the precursor gas atmosphere including at least one of hydrogen, Si and Ge.

Abstract translation: 根据一个实施例的制造半导体器件的方法包括：在氢气气氛中，在压力为第一压力和温度为的条件下，除去天然氧化物膜并将硅氮化物粘附在Si基衬底的区域上 第一温度，在所述Si基衬底上形成含氮化硅的构件，所述区域是未被构件覆盖的区域; 将温度从第一温度降低到第二温度，同时保持在氢气气氛中的第一压力下的压力; 将压力从第一压力降低到第二压力，同时将温度保持在第二温度在氢气气氛中; 并且在所述压力降低到所述第二压力之后，在前驱体气体气氛中，在所述Si基基板的区域上外延生长晶体，所述晶体包括Si和Ge中的至少一种，所述前体气体气体包括氢， Si和Ge。

公开(公告)号：US20110186676A1

公开(公告)日：2011-08-04

申请号：US13018752

申请日：2011-02-01

Applicant: Takahiro OSAKI ,  Shinji MORI

Inventor： Takahiro OSAKI ,  Shinji MORI

IPC: B60R22/44

CPC classification number: B60R22/44

Abstract: A webbing take-up device which can improve the workability of the assembly work of a tension reducer is obtained. In this webbing take-up device, a take-up spring unit is arranged closer to the opening side of a case than a reduction spring unit within a case. For this reason, when a clutch is arranged inside the reduction balance spring and the inner end of the reduction balance spring in a spiral direction is locked to a spring case of the clutch, the clutch and the reduction balance spring can be easily and visually recognized from the opening side of the case. Thus, the other end of the reduction balance spring can be easily locked to the spring case.

Abstract translation: 可以获得能够提高张力减小器的组装作业的加工性的织带卷取装置。 在这种织带卷取装置中，卷取弹簧单元布置成比壳体内的还原弹簧单元更靠近壳体的开口侧。 因此，当离合器配置在减速平衡弹簧内部并且减速平衡弹簧的螺旋方向的内端被锁定到离合器的弹簧壳体时，离合器和减速平衡弹簧可以容易地和视觉上识别 从外壳的开口侧。 因此，减速平衡弹簧的另一端可以容易地锁定到弹簧箱。