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    Heterojunction bipolar transistor and manufacturing method thereof
    2.
    发明授权
    Heterojunction bipolar transistor and manufacturing method thereof 失效
    异质结双极晶体管及其制造方法

    公开(公告)号：US6127716A

    公开(公告)日：2000-10-03

    申请号：US414839

    申请日：1999-10-08

    申请人： Kouhei Morizuka ,  Masayuki Sugiura

    发明人： Kouhei Morizuka ,  Masayuki Sugiura

    IPC分类号： H01L29/737 ,  H01L27/082 ,  H01L27/102

    CPC分类号： H01L29/7371

    摘要： On an n-type semiconductor substrate 41 doped in high density, a p-type semiconductor layer 2, an n-type semiconductor layer 4 doped in high density, which is a collector, a p-type semiconductor layer 6 doped in high density, which is a base, and the n-type semiconductor layer 7, which is an emitter, are sequentially stacked. To the collector layer, a collector electrode 12 is electrically connected, and to the base layer, a base electrode 11 is electrically connected, and to the emitter layer, an emitter electrode 9 is electrically connected, and thus a bipolar transistor is structured. On the bipolar transistor, an insulated isolation area 55 is formed with an opening therein, whose depth reaches the surface of the substrate, and a substrate electrode 48 is formed thereon. On the bipolar transistor and the insulated isolation area 55, an inter-layer dielectric layer 54 is formed having contact holes formed to upper parts of the emitter electrode 49 and to the substrate electrode 48. The emitter electrode 49 and the substrate electrode 48 are connected to each other by ground wiring.

    摘要翻译： 在以高密度掺杂的n型半导体衬底41上，以高密度掺杂的p型半导体层6，p型半导体层2，以高密度掺杂的n型半导体层4，其为集电极，p型半导体层6， 其为基极，并且作为发射极的n型半导体层7依次层叠。 集电极电极12与集电极电连接，并且与基极层电连接基极11，并且与发射极层电连接发射电极9，从而构成双极型晶体管。 在双极晶体管上，在其中形成有开口的绝缘隔离区域55，其深度到达基板的表面，并且在其上形成基板电极48。 在双极晶体管和绝缘隔离区域55上，形成了具有形成于发射电极49的上部和基板电极48的接触孔的层间电介质层54.发射电极49和基板电极48被连接 互相接地。

    Semiconductor bipolar device with phosphorus doping
    3.
    发明授权
    Semiconductor bipolar device with phosphorus doping 失效
    具有磷光体的半导体双极器件

    公开(公告)号：US5053846A

    公开(公告)日：1991-10-01

    申请号：US559410

    申请日：1990-07-26

    申请人： Kouhei Morizuka

    发明人： Kouhei Morizuka

    IPC分类号： H01L21/265 ,  H01L21/324 ,  H01L29/737

    CPC分类号： H01L21/2656 ,  H01L21/3245 ,  H01L29/7371

    摘要： A method of manufacturing semiconductor devices by ion implantation, comprising the steps of, i) implanting P ions and ions selected from Si or Group II elements to the same region of GaAs or AlGaAs material, ii) performing a heat treatment to said ion implanted region for activation. Also disclosed are semiconductor devices manufactured according to this method.

    摘要翻译： 一种通过离子注入制造半导体器件的方法，包括以下步骤：i）将选自Si或II族元素的P离子和离子注入GaAs或AlGaAs材料的相同区域; ii）对所述离子注入区进行热处理 用于激活。 还公开了根据该方法制造的半导体器件。

    Nitride semiconductor device
    4.
    发明授权
    Nitride semiconductor device 失效
    氮化物半导体器件

    公开(公告)号：US07329909B2

    公开(公告)日：2008-02-12

    申请号：US11149208

    申请日：2005-06-10

    申请人： Wataru Saito ,  Ichiro Omura ,  Kouhei Morizuka

    发明人： Wataru Saito ,  Ichiro Omura ,  Kouhei Morizuka

    IPC分类号： H01L31/00

    CPC分类号： H01L29/7787 ,  H01L29/0649 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/402 ,  H01L29/4175 ,  H01L29/66462

    摘要： A multi-layered structure in which a p-3C-SiC layer 102 is formed above a p-Si substrate 101 is formed, above which an I-GaN layer (channel layer) 103, an n-AlGaN layer (barrier layer) 104 are formed. A source electrode 201, a drain electrode 202, and a gate electrode 203 are formed above the n-AlGaN layer 104. The source electrode 201 and the drain electrode 202 form an ohmic contact with the n-AlGaN layer 104. The gate electrode 203 forms a Schottky junction with the n-AlGaN layer 104.

    摘要翻译： 形成在p-Si衬底101上形成p-3C-SiC层102的多层结构，其中I-GaN层（沟道层）103，n-AlGaN层（势垒层）104 形成。 源极电极201，漏极电极202和栅电极203形成在n-AlGaN层104的上方。 源电极201和漏电极202与n-AlGaN层104形成欧姆接触。 栅电极203与n-AlGaN层104形成肖特基结。

    Semiconductor device
    6.
    发明申请
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US20050001233A1

    公开(公告)日：2005-01-06

    申请号：US10834347

    申请日：2004-04-29

    申请人： Toru Sugiyama ,  Tetsuro Nozu ,  Kouhei Morizuka

    发明人： Toru Sugiyama ,  Tetsuro Nozu ,  Kouhei Morizuka

    IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/205 ,  H01L29/73 ,  H01L29/737 ,  H01L29/78 ,  H01L31/0328

    CPC分类号： H01L29/1004 ,  H01L29/0817 ,  H01L29/7371

    摘要： According to the present invention, there is a provided a semiconductor device having, a collector contact layer made of an n-type GaAs layer; a first collector layer formed on the collector contact layer and made of an n-type GaAs layer; a second collector layer formed on the first collector layer and made of a p-type GaAs layer; a third collector layer formed on the second collector layer and made of an n-type InGaP layer; a fourth collector layer formed on the third collector layer and made of an n-type InGaP layer having an impurity concentration higher than that of the third collector layer; a fifth collector layer formed on the fourth collector layer and made of an n-type GaAs layer; a base layer formed on the fifth collector layer and made of a p-type GaAs layer; and an emitter layer formed on the base layer and made of an n-type InGaP layer.

    摘要翻译： 根据本发明，提供了一种具有由n型GaAs层制成的集电极接触层的半导体器件; 形成在集电极接触层上并由n型GaAs层构成的第一集电极层; 第二集电体层，形成在第一集电层上，由p型GaAs层构成; 形成在第二集电体层上并由n型InGaP层制成的第三集电极层; 第四集电体层，形成在第三集电体层上，由具有比第三集电体层的杂质浓度高的n型InGaP层构成; 形成在第四集电体层上并由n型GaAs层制成的第五集电极层; 基底层，形成在第五集电体层上，由p型GaAs层构成; 以及形成在基底层上并由n型InGaP层制成的发射极层。

    Semiconductor device suited for a high frequency amplifier
    8.
    发明授权
    Semiconductor device suited for a high frequency amplifier 失效
    适用于高频放大器的半导体器件

    公开(公告)号：US07038250B2

    公开(公告)日：2006-05-02

    申请号：US10834347

    申请日：2004-04-29

    申请人： Toru Sugiyama ,  Tetsuro Nozu ,  Kouhei Morizuka

    发明人： Toru Sugiyama ,  Tetsuro Nozu ,  Kouhei Morizuka

    IPC分类号： H01L29/732 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

    CPC分类号： H01L29/1004 ,  H01L29/0817 ,  H01L29/7371

    摘要： According to the present invention, there is a provided a semiconductor device having, a collector contact layer made of an n-type GaAs layer; a first collector layer formed on the collector contact layer and made of an n-type GaAs layer; a second collector layer formed on the first collector layer and made of a p-type GaAs layer; a third collector layer formed on the second collector layer and made of an n-type InGaP layer; a fourth collector layer formed on the third collector layer and made of an n-type InGaP layer having an impurity concentration higher than that of the third collector layer; a fifth collector layer formed on the fourth collector layer and made of an n-type GaAs layer; a base layer formed on the fifth collector layer and made of a p-type GaAs layer; and an emitter layer formed on the base layer and made of an n-type InGaP layer.

    摘要翻译： 根据本发明，提供了一种具有由n型GaAs层制成的集电极接触层的半导体器件; 形成在集电极接触层上并由n型GaAs层构成的第一集电极层; 第二集电体层，形成在第一集电层上，由p型GaAs层构成; 形成在第二集电体层上并由n型InGaP层制成的第三集电极层; 第三集电体层，形成在第三集电体层上，由具有比第三集电体层的杂质浓度高的n型InGaP层构成; 形成在第四集电体层上并由n型GaAs层制成的第五集电极层; 基底层，形成在第五集电体层上，由p型GaAs层构成; 以及形成在基底层上并由n型InGaP层制成的发射极层。

    High frequency power amplifier having a bipolar transistor
    10.
    发明授权
    High frequency power amplifier having a bipolar transistor 失效
    具有双极晶体管的高频功率放大器

    公开(公告)号：US06448859B2

    公开(公告)日：2002-09-10

    申请号：US09817149

    申请日：2001-03-27

    申请人： Kouhei Morizuka

    发明人： Kouhei Morizuka

    IPC分类号： H03F368

    CPC分类号： H03F1/32 ,  H03F1/302 ,  H03F3/19 ,  H03F3/211 ,  H03F2200/366 ,  H03F2200/75

    摘要： The object of the present invention is to provide a bipolar transistor which is excellent in uniformity of current distribution in spite of a small ballast resistance, and can constitute an amplifier showing high efficiency and low distortion with little deterioration of distortion even when a digital modulation wave is input thereto. A high frequency power amplifier of the present invention comprises a plurality of transistor blocks having a bipolar transistor, wherein each of the transistor blocks includes a resistance connected to an emitter of the bipolar transistor, a reference voltage generation circuit for generating a reference voltage as a base bias of the bipolar transistor, and a bias generation circuit connected to a base of the bipolar transistor, the bias generation circuit generating a base bias voltage by converting the reference voltage.

    摘要翻译： 本发明的目的是提供一种双极晶体管，尽管镇流电阻小，但分布均匀性优异，并且即使在数字调制波 被输入。 本发明的高频功率放大器包括具有双极晶体管的多个晶体管块，其中每个晶体管块包括连接到双极晶体管的发射极的电阻，用于产生参考电压的参考电压产生电路， 双极型晶体管的基极偏置和连接到双极晶体管的基极的偏置产生电路，偏置产生电路通过转换参考电压来产生基极偏置电压。