VERTICAL MEANDER INDUCTOR FOR SMALL CORE VOLTAGE REGULATORS
    1.
    发明申请
    VERTICAL MEANDER INDUCTOR FOR SMALL CORE VOLTAGE REGULATORS 审中-公开
    用于小型电压稳压器的垂直式电感电感器

    公开(公告)号:US20170053977A1

    公开(公告)日:2017-02-23

    申请号:US15342872

    申请日:2016-11-03

    摘要: Vertical meander inductors for small core voltage regulators and approaches to fabricating vertical meander inductors for small core voltage regulators are described. For example, a semiconductor die includes a substrate. An integrated circuit is disposed on an active surface of the substrate. An inductor is coupled to the integrated circuit. The inductor is disposed conformal with an insulating layer disposed on an essentially planar surface of the substrate. The insulating layer has an undulating topography.

    摘要翻译: 描述了用于小型电压调节器的垂直偏转电感器和用于制造小型电压调节器的垂直偏转电感器的方法。 例如,半导体管芯包括衬底。 集成电路设置在基板的有源表面上。 电感器耦合到集成电路。 电感器设置成与设置在基板的基本上平坦的表面上的绝缘层共形。 绝缘层具有起伏的形貌。

    VERTICAL MEANDER INDUCTOR FOR SMALL CORE VOLTAGE REGULATORS
    2.
    发明申请
    VERTICAL MEANDER INDUCTOR FOR SMALL CORE VOLTAGE REGULATORS 有权
    用于小型电压稳压器的垂直式电感电感器

    公开(公告)号:US20140084414A1

    公开(公告)日:2014-03-27

    申请号:US13629168

    申请日:2012-09-27

    IPC分类号: H01L21/02 H01L29/66

    摘要: Vertical meander inductors for small core voltage regulators and approaches to fabricating vertical meander inductors for small core voltage regulators are described. For example, a semiconductor die includes a substrate. An integrated circuit is disposed on an active surface of the substrate. An inductor is coupled to the integrated circuit. The inductor is disposed conformal with an insulating layer disposed on an essentially planar surface of the substrate. The insulating layer has an undulating topography.

    摘要翻译: 描述了用于小型电压调节器的垂直偏转电感器和用于制造小型电压调节器的垂直偏转电感器的方法。 例如,半导体管芯包括衬底。 集成电路设置在基板的有源表面上。 电感器耦合到集成电路。 电感器设置成与设置在基板的基本上平坦的表面上的绝缘层共形。 绝缘层具有起伏的形貌。

    Sacrificial dielectric planarization layer
    8.
    发明授权
    Sacrificial dielectric planarization layer 失效
    牺牲电介质平坦化层

    公开(公告)号:US07109557B2

    公开(公告)日:2006-09-19

    申请号:US10963839

    申请日:2004-10-12

    摘要: A method of forming a microelectronic structure and its associated structures is described. In one embodiment, a substrate is provided with a sacrificial layer disposed on a hard mask layer, and a metal layer disposed in a trench of the substrate and on the sacrificial layer. The metal layer is then removed at a first removal rate wherein a dishing is induced on a top surface of the metal layer until the sacrificial layer is exposed, and simultaneously removing the metal layer and the sacrificial layer at a second removal rate without substantially removing the hard mask.

    摘要翻译: 描述了形成微电子结构及其相关结构的方法。 在一个实施例中,衬底设置有设置在硬掩模层上的牺牲层,以及设置在衬底的沟槽中和牺牲层上的金属层。 然后以第一去除速率去除金属层,其中在金属层的顶表面上诱导凹陷,直到牺牲层被暴露,同时以第二移除速率去除金属层和牺牲层,而基本上不去除 硬面膜