公开(公告)号：US20110192445A1

公开(公告)日：2011-08-11

申请号：US12922443

申请日：2009-03-13

Applicant: Florian Solzbacher ,  Erik Jung

Inventor： Florian Solzbacher ,  Erik Jung

IPC: H01L31/052 ,  H01L31/18

CPC classification number: H01L24/95 ,  H01L31/048 ,  H01L31/0543 ,  H01L2924/10253 ,  H01L2924/1461 ,  Y02E10/52 ,  H01L2924/00

Abstract: A method for fabricating a photoelectric array device with an optical micro lens array (10) using a plurality of photovoltaic dies (12) so a lens (14) is aligned to each die (12) in the array device. A back surface (16) of a lens array substrate (10) is metallized with electrical conducting lines and interconnects (18). Fabricated photovoltaic dies are aligned to an alignment substrate using a fluidic capillary-driven alignment process. The plurality of aligned dies (12) is attached mechanically and electrically to the metallized lens array substrate (10), so the each die (12) aligns with a lens (14) in the lens array substrate (10). The alignment substrate is removed from the dies (12) attached to the lens array substrate (10). A back panel substrate (22) is coupled mechanically and electrically to the plurality of dies (12) attached to the lens array substrate (10).

Abstract translation: 一种使用多个光伏模具（12）制造具有光学微透镜阵列（10）的光电阵列器件的方法，因此透镜（14）与阵列器件中的每个管芯（12）对准。 透镜阵列基板（10）的后表面（16）用导电线和互连件（18）进行金属化。 制造的光伏模具使用流体毛细管驱动对准方法与对准衬底对准。 多个对准的管芯（12）机械地和电气地连接到金属化的透镜阵列衬底（10），因此每个管芯（12）与透镜阵列衬底（10）中的透镜（14）对准。 将取向基板从附着于透镜阵列基板（10）的模具（12）上取下。 后面板基板（22）机械和电连接到附接到透镜阵列基板（10）的多个管芯（12）。

公开(公告)号：US06409073B1

公开(公告)日：2002-06-25

申请号：US09743739

申请日：2001-02-27

Applicant: Kenneth Kaskoun ,  Erik Jung ,  Werner Budweiser

Inventor： Kenneth Kaskoun ,  Erik Jung ,  Werner Budweiser

IPC: B23K3102

CPC classification number: H01L22/20 ,  G01R1/0408 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/11003 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K1/0306 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/3478 ,  H05K2201/2081 ,  H05K2203/0338 ,  H05K2203/043 ,  H01L2224/29099 ,  H01L2924/00 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2224/05155

Abstract: A substrate (10, 80) includes a conductive layer (16, 82) which is non-wettable by solder. A solder receiving stud (22, 84) is formed on the conductive layer, preferably by plating. If used for transferring solder, a solder bump (32) is selectively formed on the solder receiving stud since the surrounding conductive layer is not wettable by the solder. A receiving substrate, such as a semiconductor device (100), is aligned with the substrate. The solder bump is heated to a liquidus state and the solder bump makes physical contact with a solder accepting stud (120) of the receiving substrate. Because the area of the solder accepting stud is larger than the area of the corresponding stud on the transfer substrate, the majority of the solder will transfer to the receiving substrate upon separation. Alternatively, the device could itself already have bumps formed thereon, in which case an unbumped substrate is used to test the device, and solder remains on the device upon separation.

Abstract translation: 基板（10,80）包括不被焊料润湿的导电层（16,82）。 在导电层上形成焊料接收柱（22,84），优选通过电镀。 如果用于转移焊料，则由于周围的导电层不被焊料润湿，所以在焊料接收螺柱上选择性地形成焊料凸点（32）。 诸如半导体器件（100）的接收衬底与衬底对准。 焊料凸块被加热到液相线状态，并且焊料凸块与接收基板的焊料接触柱（120）物理接触。 由于焊料接触螺柱的面积大于转移基板上对应的螺柱的面积，所以大多数焊料在分离时将转移到接收基板。 或者，该装置本身可以具有形成在其上的凸起，在这种情况下，使用未凸起的衬底来测试该装置，并且在分离时焊料残留在该装置上。

公开(公告)号：US20090161319A1

公开(公告)日：2009-06-25

申请号：US12093332

申请日：2006-10-05

Applicant: Robert Ingenbleek ,  Erik Jung ,  Alfred Kolb ,  Andreas Rekofsky ,  Roland Schollhorn ,  Daniela Wolf

Inventor： Robert Ingenbleek ,  Erik Jung ,  Alfred Kolb ,  Andreas Rekofsky ,  Roland Schollhorn ,  Daniela Wolf

IPC: H05K7/20 ,  H05K3/00

CPC classification number: H05K1/021 ,  H01L23/36 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H05K1/141 ,  H05K1/142 ,  H05K1/182 ,  H05K3/0061 ,  H05K2201/1056 ,  H05K2201/10674 ,  H05K2203/049 ,  Y10T29/49124 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic circuit arrangement includes a heat sink and a first circuit carrier which is thermally coupled to the heat sink, lies flat on the latter and is intended to wire electronic components of the circuit arrangement. Provided for at least one electronic component is a special arrangement which is associated with a considerably increased heat dissipation capability for the relevant component and, in addition, also affords further advantages in connection with changes in the population and/or line routing which might occur in practice. The important factor for this is that the component is arranged under a second circuit carrier which is held in a recess in the first circuit carrier. The recess passes through to the top side of the heat sink.

Abstract translation: 电子电路装置包括散热器和热耦合到散热器的第一电路载体，平坦地放置在散热器上，并且用于连接电路装置的电子部件。 为至少一个电子部件提供了一种特殊的布置，其与相关部件的相当大的散热能力相关联，此外，还提供了与可能发生的总体和/或线路由的变化相关的进一步的优点 实践。 其重要的因素是组件被布置在保持在第一电路载体中的凹部中的第二电路载体下。 凹槽通过散热器的顶侧。

公开(公告)号：US07011989B2

公开(公告)日：2006-03-14

申请号：US10698074

申请日：2003-10-30

Applicant: Karl-Friedrich Becker ,  Tanja Braun ,  Mathias Koch ,  Andreas Ostmann ,  Lars Böttcher ,  Erik Jung

Inventor： Karl-Friedrich Becker ,  Tanja Braun ,  Mathias Koch ,  Andreas Ostmann ,  Lars Böttcher ,  Erik Jung

IPC: H01L21/44

CPC classification number: H01L21/568 ,  H01L21/56 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/27 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L2221/68327 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2224/274 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19104 ,  H01L2224/82 ,  H01L2924/00

Abstract: A method for producing encapsulated chips includes preparing a wafer with contacts projecting from a surface of the wafer. The wafer is disposed on a dicing substrate and diced into a plurality of spaced chips on the dicing substrate. The contacts are covered with a protection arrangement, then injection molding being conducted to introduce encapsulation material into the contacts and the trenches. Then the protection arrangement is removed so that the contacts are exposed.

Abstract translation: 制造封装芯片的方法包括制备具有从晶片表面突出的触点的晶片。 将晶片设置在切割基板上并切割成切割基板上的多个间隔开的芯片。 触点覆盖有保护装置，然后进行注塑以将封装材料引入触点和沟槽中。 然后去除保护装置，使得触点暴露。

公开(公告)号：US07911051B2

公开(公告)日：2011-03-22

申请号：US12093332

申请日：2006-10-05

Applicant: Robert Ingenbleek ,  Erik Jung ,  Alfred Kolb ,  Andreas Rekofsky ,  Roland Schöllhorn ,  Daniela Wolf

Inventor： Robert Ingenbleek ,  Erik Jung ,  Alfred Kolb ,  Andreas Rekofsky ,  Roland Schöllhorn ,  Daniela Wolf

IPC: H01L23/34

CPC classification number: H05K1/021 ,  H01L23/36 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H05K1/141 ,  H05K1/142 ,  H05K1/182 ,  H05K3/0061 ,  H05K2201/1056 ,  H05K2201/10674 ,  H05K2203/049 ,  Y10T29/49124 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic circuit arrangement includes a heat sink and a first circuit carrier which is thermally coupled to the heat sink, lies flat on the latter and is intended to wire electronic components of the circuit arrangement. Provided for at least one electronic component is a special arrangement which is associated with a considerably increased heat dissipation capability for the relevant component and, in addition, also affords further advantages in connection with changes in the population and/or line routing which might occur in practice. The important factor for this is that the component is arranged under a second circuit carrier which is held in a recess in the first circuit carrier. The recess passes through to the top side of the heat sink.

Abstract translation: 电子电路装置包括散热器和热耦合到散热器的第一电路载体，平坦地放置在散热器上，并且用于连接电路装置的电子部件。 为至少一个电子部件提供了一种特殊的布置，其与相关部件的相当大的散热能力相关联，此外，还提供了与可能发生的总体和/或线路由的变化相关的进一步的优点 实践。 其重要的因素是组件被布置在保持在第一电路载体中的凹部中的第二电路载体下。 凹槽通过散热器的顶侧。