公开(公告)号：US09381387B2

公开(公告)日：2016-07-05

申请号：US13999917

申请日：2014-04-02

Applicant: David C. Douglas

Inventor： David C. Douglas

IPC: A62C2/06 ,  A62C2/10 ,  A62C3/02

CPC classification number: A62C3/0264 ,  A62C2/06 ,  A62C2/065 ,  A62C3/0214

Abstract: A fire-protection mechanism is described. The fire-protection mechanism includes multiple, overlapping cavities that can be filled with water (and, more generally, a fluid). When the fire-protection mechanism is deployed over an object, such as a building, and the cavities are filled with water, the fire-protection mechanism reduces the likelihood that the object is damaged by the heat associated with a fire proximate to the object, such as a wild fire. In particular, the heat capacity and latent heat of the water significantly increase the thermal time constant of the object, thereby reducing the likelihood of combustion. The fire-protection mechanism may include a reflective coating to redirect infrared radiation away from the object to provide further protection. In addition, the water in the cavities may be refilled, as needed, by directing a stream of water onto the fire-protection mechanism and/or through an internal channel in the fire-protection mechanism.

公开(公告)号：US20150068776A1

公开(公告)日：2015-03-12

申请号：US13999917

申请日：2014-04-02

Applicant: David C. Douglas

Inventor： David C. Douglas

IPC: A62C3/02

CPC classification number: A62C3/0264 ,  A62C2/06 ,  A62C2/065 ,  A62C3/0214

Abstract: A fire-protection mechanism is described. The fire-protection mechanism includes multiple, overlapping cavities that can be filled with water (and, more generally, a fluid). When the fire-protection mechanism is deployed over an object, such as a building, and the cavities are filled with water, the fire-protection mechanism reduces the likelihood that the object is damaged by the heat associated with a fire proximate to the object, such as a wild fire. In particular, the heat capacity and latent heat of the water significantly increase the thermal time constant of the object, thereby reducing the likelihood of combustion. The fire-protection mechanism may include a reflective coating to redirect infrared radiation away from the object to provide further protection. In addition, the water in the cavities may be refilled, as needed, by directing a stream of water onto the fire-protection mechanism and/or through an internal channel in the fire-protection mechanism.

Abstract translation: 描述了防火机制。 防火机构包括可以充满水的多个重叠的空腔（更通常为流体）。 当防火机构部署在诸如建筑物的物体上并且空腔充满水时，防火机构降低了由与靠近物体的火相关的热量的物体损坏的可能性， 如野火。 特别地，水的热容量和潜热显着地增加了物体的热时间常数，从而降低了燃烧的可能性。 火灾保护机构可以包括反射涂层以将红外辐射重新定向远离物体以提供进一步的保护。 此外，根据需要，空腔中的水可以通过将水流引导到防火机构和/或通过防火机构中的内部通道来重新填充。

公开(公告)号：US07958226B2

公开(公告)日：2011-06-07

申请号：US11354819

申请日：2006-02-15

Applicant: Linda Bernardi ,  Chet Birger ,  David C. Douglas ,  Steven Rosenthal ,  Kenneth R. Traub

Inventor： Linda Bernardi ,  Chet Birger ,  David C. Douglas ,  Steven Rosenthal ,  Kenneth R. Traub

IPC: G06F15/16

CPC classification number: H04L61/20 ,  H04L29/12207 ,  H04L63/0492 ,  H04L67/125 ,  H04L67/18

Abstract: A computer architecture for enterprise device applications that provides a real-time, bi-directional communication layer for device communication. An identity-based communications layer provides for secure, end-to-end telemetry and control communications by enabling mutual authentication and encryption between the devices and the enterprise. A unique identity is assigned to each device, user and application to provide security services. The unique identity is independent of a network-address. Security information and a network address may be associated with the unique identity.

Abstract translation: 一种用于企业设备应用程序的计算机体系结构，为设备通信提供实时的双向通信层。 基于身份的通信层通过实现设备和企业之间的相互认证和加密来提供安全的端到端遥测和控制通信。 为每个设备，用户和应用程序分配唯一的身份以提供安全服务。 独特的身份与网络地址无关。 安全信息和网络地址可以与唯一身份相关联。

公开(公告)号：US07805606B2

公开(公告)日：2010-09-28

申请号：US10372397

申请日：2003-02-25

Applicant: Chet Birger ,  David C. Douglas ,  Steven Rosenthal ,  Kenneth R. Traub

Inventor： Chet Birger ,  David C. Douglas ,  Steven Rosenthal ,  Kenneth R. Traub

IPC: H04L9/32

CPC classification number: H04L61/20 ,  H04L29/12207 ,  H04L63/0492 ,  H04L67/125 ,  H04L67/18

Abstract: A computer architecture for enterprise device applications provides a real-time, bi-directional communication layer for device communication. An identity-based communications layer provides for secure, end-to-end telemetry and control communications by enabling mutual authentication and encryption between the devices and the enterprise. A unique identity is assigned to each device, user and application to provide security services. A communications session is established between two devices using an authentication service that authenticates the device that is initiating the establishment of the communications session with another device. After authenticating the initiating device, the authentication service provides to the initiating device the network address of the other device and an authentication credential for use in the communications session between the initiating device and the other device.

Abstract translation: 用于企业设备应用的计算机体系结构提供用于设备通信的实时双向通信层。 基于身份的通信层通过实现设备和企业之间的相互认证和加密来提供安全的端到端遥测和控制通信。 为每个设备，用户和应用程序分配唯一的身份以提供安全服务。 使用认证服务的两个设备之间建立通信会话，认证服务认证正在发起与另一设备建立通信会话的设备。 在认证发起设备之后，认证服务向发起设备提供其他设备的网络地址，以及在启动设备和其他设备之间的通信会话中使用的认证凭证。

公开(公告)号：US20090007234A1

公开(公告)日：2009-01-01

申请号：US11567508

申请日：2006-12-06

Applicant: Chet Birger ,  David C. Douglas ,  Steven Rosenthal ,  Kenneth R. Traub

Inventor： Chet Birger ,  David C. Douglas ,  Steven Rosenthal ,  Kenneth R. Traub

IPC: G06F21/00 ,  H04L9/06

CPC classification number: H04L61/20 ,  H04L29/12207 ,  H04L63/0492 ,  H04L67/125 ,  H04L67/18 ,  H04W12/02

Abstract: A computer architecture for enterprise device applications provides a real-time, bi-directional communication layer for device communication. An identity-based communications layer provides for secure, end-to-end telemetry and control communications by enabling mutual authentication and encryption between the devices and the enterprise. A unique identity is assigned to each device, user and application to provide security services. A communications session is established between two devices using an authentication service that authenticates the device that is initiating the establishment of the communications session with another device. After authenticating the initiating device, the authentication service provides to the initiating device the network address of the other device and an authentication credential for use in the communications session between the initiating device and the other device.

公开(公告)号：US06219775B1

公开(公告)日：2001-04-17

申请号：US09040747

申请日：1998-03-18

Applicant: Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

Inventor： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

IPC: G06F702

CPC classification number: G06F15/8092 ,  G06F15/17381 ,  G06F15/8084 ,  G06F21/52

Abstract: A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processing nodes. Each processing node includes an interface for transmitting data over, and receiving data and commands from, the network, at least one memory module for storing data, a node processor and an auxiliary processor. The node processor receives commands received by the interface and processes data in response thereto, in the process generating memory access requests for facilitating the retrieval of data from or storage of data in the memory module. The node processor further controlling the transfer of data over the network by the interface. The auxiliary processor is connected to the memory module and the node processor. In response to memory access requests from the node processor, the auxiliary processor performs a memory access operation to store data received from the node processor in the memory module, or to retrieve data from the memory module for transfer to the node processor. In response to auxiliary processing instructions from the node processor, the auxiliary processor performs data processing operations in connection with data in the memory module.

Abstract translation: 大型并行计算机包括多个处理节点和由网络互连的至少一个控制节点。 该网络便于处理节点之间的数据传输和从控制节点到处理节点的命令。 每个处理节点包括用于在网络上传输数据并从其接收数据和命令的接口，用于存储数据的至少一个存储器模块，节点处理器和辅助处理器。 节点处理器在产生存储器访问请求的过程中接收由接口接收的命令并响应于此处理数据，以便于从存储器模块中的数据检索或存储数据。 节点处理器进一步通过接口控制网络上的数据传输。 辅助处理器连接到存储器模块和节点处理器。 响应于来自节点处理器的存储器访问请求，辅助处理器执行存储器访问操作以将从节点处理器接收的数据存储在存储器模块中，或者从存储器模块检索数据以传送到节点处理器。 响应于来自节点处理器的辅助处理指令，辅助处理器结合存储器模块中的数据执行数据处理操作。

公开(公告)号：US5872987A

公开(公告)日：1999-02-16

申请号：US714635

申请日：1996-09-16

Applicant: Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

Inventor： Jon P. Wade ,  Daniel R. Cassiday ,  Robert D. Lordi ,  Guy Lewis Steele, Jr. ,  Margaret A. St. Pierre ,  Monica C. Wong-Chan ,  Zahi S. Abuhamdeh ,  David C. Douglas ,  Mahesh N. Ganmukhi ,  Jeffrey V. Hill ,  W. Daniel Hillis ,  Scott J. Smith ,  Shaw-Wen Yang ,  Robert C. Zak, Jr.

IPC: G06F15/173 ,  G06F15/78 ,  G06F15/80 ,  G06F7/02

CPC classification number: G06F15/8092 ,  G06F15/17381 ,  G06F15/8084 ,  G06F21/52

Abstract: A massively-parallel computer includes a plurality of processing nodes and at least one control node interconnected by a network. The network faciliates the transfer of data among the processing nodes and of commands from the control node to the processing nodes. Each each processing node includes an interface for transmitting data over, and receiving data and commands from, the network, at least one memory module for storing data, a node processor and an auxiliary processor. The node processor receives commands received by the interface and processes data in response thereto, in the process generating memory access requests for facilitating the retrieval of data from or storage of data in the memory module. The node processor further controlling the transfer of data over the network by the interface. The auxiliary processor is connected to the memory module and the node processor. In response to memory access requests from the node processor, the auxiliary processor performs a memory access operation to store data received from the node processor in the memory module, or to retrieve data from the memory module for transfer to the node processor. In response to auxiliary processing instructions from the node processor, the auxiliary processor performs data processing operations in connection with data in the memory module.

Abstract translation: 大型并行计算机包括多个处理节点和由网络互连的至少一个控制节点。 该网络便于处理节点之间的数据传输和从控制节点到处理节点的命令。 每个处理节点包括用于从网络传输数据并从其接收数据和命令的接口，用于存储数据的至少一个存储器模块，节点处理器和辅助处理器。 节点处理器在产生存储器访问请求的过程中接收由接口接收的命令并响应于此处理数据，以便于从存储器模块中的数据检索或存储数据。 节点处理器进一步通过接口控制网络上的数据传输。 辅助处理器连接到存储器模块和节点处理器。 响应于来自节点处理器的存储器访问请求，辅助处理器执行存储器访问操作以将从节点处理器接收的数据存储在存储器模块中，或者从存储器模块检索数据以传送到节点处理器。 响应于来自节点处理器的辅助处理指令，辅助处理器结合存储器模块中的数据执行数据处理操作。

公开(公告)号：US08283766B2

公开(公告)日：2012-10-09

申请号：US12874446

申请日：2010-09-02

Applicant: John A. Harada ,  David C. Douglas ,  Robert J. Drost

Inventor： John A. Harada ,  David C. Douglas ,  Robert J. Drost

IPC: H01L23/52 ,  H01L23/48 ,  H01L23/495 ,  H01L23/02

CPC classification number: H01L25/0657 ,  G02B6/43 ,  H01L23/544 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L29/0657 ,  H01L2223/54426 ,  H01L2224/0401 ,  H01L2224/05555 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/1601 ,  H01L2224/16105 ,  H01L2224/16135 ,  H01L2224/16151 ,  H01L2224/1703 ,  H01L2224/32145 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81007 ,  H01L2224/81141 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/819 ,  H01L2224/8313 ,  H01L2224/83132 ,  H01L2224/83193 ,  H01L2224/8385 ,  H01L2225/06531 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/1015 ,  H01L2924/10155 ,  H01L2924/151

Abstract: A ramp-stack chip package is described. This chip package includes a vertical stack of semiconductor dies or chips that are offset from each other in a horizontal direction, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, is electrically and mechanically coupled to the exposed pads. For example, the ramp component may be coupled to the semiconductor dies using: solder, microsprings and/or an anisotropic conducting film. Furthermore, each of the semiconductor dies includes a static bend so that an end segment of each of the semiconductor dies is parallel to the direction and is mechanically coupled to the ramp component. These end segments may facilitate high-bandwidth communication of signals between the chips and the ramp component, for example, via proximity communication.

Abstract translation: 描述了斜坡堆叠芯片封装。 该芯片封装包括在水平方向彼此偏移的半导体管芯或芯片的垂直堆叠，从而限定具有暴露焊盘的露台。 位于大致平行于平台的高带宽斜坡部件被电气和机械耦合到暴露的焊盘。 例如，斜坡部件可以使用：焊料，微弹簧和/或各向异性导电膜耦合到半导体管芯。 此外，每个半导体管芯包括静态弯曲部，使得每个半导体管芯的端部段平行于该方向，并机械耦合到斜坡部件。 这些端段可以促进芯片和斜坡部件之间的信号的高带宽通信，例如通过接近通信。

公开(公告)号：US07949436B2

公开(公告)日：2011-05-24

申请号：US11437456

申请日：2006-05-19

Applicant: Robert J. Drost ,  Ronald Ho ,  David C. Douglas

Inventor： Robert J. Drost ,  Ronald Ho ,  David C. Douglas

IPC: G05D1/02

CPC classification number: H05K3/303 ,  G02B6/4226 ,  H01L22/12 ,  H01L24/01 ,  H01L25/0657 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06534 ,  H01L2225/06593 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0239 ,  H05K2201/10083 ,  H05K2201/10151 ,  H05K2201/10674 ,  H05K2203/166 ,  Y02P70/613 ,  Y10T29/49133

Abstract: One embodiment of the present invention provides a system that automatically detects and corrects a misalignment of a semiconductor chip. During operation, the system uses a position-detection mechanism integrated with the chip to determine the misalignment of the chip from a desired alignment for the chip. Next, the system uses an actuation mechanism integrated with the chip to automatically correct the misalignment, thereby improving performance and reliability of the chip.

Abstract translation: 本发明的一个实施例提供一种自动检测和校正半导体芯片的未对准的系统。 在操作期间，系统使用与芯片集成的位置检测机构来确定芯片与芯片的期望对准的未对准。 接下来，系统使用与芯片集成的致动机构来自动校正未对准，从而提高芯片的性能和可靠性。

公开(公告)号：US20110018120A1

公开(公告)日：2011-01-27

申请号：US12507349

申请日：2009-07-22

Applicant: Robert J. Drost ,  James G. Mitchell ,  David C. Douglas

Inventor： Robert J. Drost ,  James G. Mitchell ,  David C. Douglas

IPC: H01L23/538

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L23/642 ,  H01L23/645 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L24/72 ,  H01L24/90 ,  H01L25/0652 ,  H01L29/0657 ,  H01L2223/6638 ,  H01L2224/13099 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48137 ,  H01L2224/48157 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01055 ,  H01L2924/01058 ,  H01L2924/01067 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19104 ,  H01L2924/19106 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip package is described. This chip package includes a stack of semiconductor dies or chips that are offset from each other, thereby defining a terrace with exposed pads. A high-bandwidth ramp component, which is positioned approximately parallel to the terrace, electrically couples to the exposed pads. For example, the ramp component may be electrically coupled to the semiconductor dies using: microsprings, an anisotropic film, and/or solder. Consequently, the electrical contacts may have a conductive, a capacitive or, in general, a complex impedance. Furthermore, the chips and/or the ramp component may be positioned relative to each other using a ball-and-pit alignment technique. By removing the need for costly and area-consuming through-silicon vias (TSVs) in the semiconductor dies, the chip package facilitates chips to be stacked in a manner that provides high bandwidth and low cost.

Abstract translation: 描述了芯片封装。 该芯片封装包括彼此偏移的半导体管芯或芯片堆叠，由此限定具有暴露焊盘的露台。 位于大致平行于平台的高带宽斜坡部件电耦合到暴露的焊盘。 例如，斜坡部件可以使用：微弹簧，各向异性膜和/或焊料电耦合到半导体管芯。 因此，电触点可以具有导电性，电容性或通常的复阻抗。 此外，芯片和/或斜面部件可以使用球 - 坑对准技术相对于彼此定位。 通过消除对半导体管芯中昂贵且耗费大量的硅通孔（TSV）的需求，芯片封装便于以提供高带宽和低成本的方式堆叠芯片。