公开(公告)号：US08067267B2

公开(公告)日：2011-11-29

申请号：US11318164

申请日：2005-12-23

申请人： Belgacem Haba ,  Craig S. Mitchell

发明人： Belgacem Haba ,  Craig S. Mitchell

IPC分类号： H01L21/00

CPC分类号： H01L25/50 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/3011 ,  H01L2924/3511

摘要： A method of making a stacked microelectronic assembly includes providing a first microelectronic package that includes a first substrate having a first dielectric layer, conductive posts, and conductive traces extending along the surface of the first dielectric layer; providing a second microelectronic package including a second substrate that includes a second dielectric layer; securing a microelectronic element to one of the surfaces of at least one of the first or second substrates; and joining the conductive posts of the first substrate with the fusible masses of the second substrate. The posts may include a plurality of aligned posts which are aligned in a first row extending in a single orthogonal direction along a surface of the first substrate away from a portion of the first substrate that faces a face of the microelectronic element. The aligned posts are disposed beyond one of the edges of the microelectronic element.

摘要翻译： 制造堆叠的微电子组件的方法包括提供第一微电子封装，其包括具有第一电介质层的第一衬底，导电柱和沿着第一电介质层的表面延伸的导电迹线; 提供包括第二衬底的第二微电子封装，所述第二衬底包括第二介电层; 将微电子元件固定到所述第一或第二基板中的至少一个的一个表面上; 以及将第一基板的导电柱与第二基板的可熔块接合。 柱可以包括多个对准的柱，其在沿着第一基板的表面沿着单个正交方向延伸的第一行中排列，远离第一基板的面对微电子元件的表面的部分。 对准的柱被设置在微电子元件的边缘之一之外。

公开(公告)号：US07534652B2

公开(公告)日：2009-05-19

申请号：US11318846

申请日：2005-12-27

申请人： Belgacem Haba ,  Ilyas Mohammed ,  Craig S. Mitchell ,  Michael Warner ,  Jesse Burl Thompson

发明人： Belgacem Haba ,  Ilyas Mohammed ,  Craig S. Mitchell ,  Michael Warner ,  Jesse Burl Thompson

IPC分类号： H01L21/44

CPC分类号： H01L21/6835 ,  H01L22/34 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/056 ,  H01L2224/11003 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13582 ,  H01L2224/136 ,  H01L2224/1601 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05099

摘要： A dielectric structure is formed by a molding process, so that a first surface of a dielectric structure is shaped by contact with the mold. The opposite second surface of the dielectric structure is applied onto the front surface of a wafer element. The dielectric layer may include protruding bumps and terminals may be formed on the bumps. The bumps may be of a precise height. The terminals lie at a precisely controlled height above the front surface of the wafer element. The terminals may include projecting posts which extend above a surrounding solder mask layer to facilitate engagement with a test fixture. The posts are immersed within solder joints when the structure is bonded to a circuit panel.

摘要翻译： 通过模制工艺形成电介质结构，使得电介质结构的第一表面通过与模具接触而成形。 电介质结构的相对的第二表面被施加到晶片元件的前表面上。 电介质层可以包括突出的凸起，并且可以在凸块上形成端子。 凸块可能具有精确的高度。 端子位于晶片元件的前表面上方的精确控制的高度。 端子可以包括在周围的焊接掩模层上方延伸的突出柱，以便于与测试夹具的接合。 当结构结合到电路板上时，将柱浸入焊点中。

公开(公告)号：US06885106B1

公开(公告)日：2005-04-26

申请号：US10044121

申请日：2002-01-11

申请人： Philip Damberg ,  Craig S. Mitchell ,  John B. Riley ,  Michael Warner ,  Joseph Fjelstad

发明人： Philip Damberg ,  Craig S. Mitchell ,  John B. Riley ,  Michael Warner ,  Joseph Fjelstad

IPC分类号： H01L23/31 ,  H01L23/49 ,  H01L25/065 ,  H01L23/48 ,  H01R12/00

CPC分类号： H01L25/0657 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/50 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/50 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06579 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked microelectronic assembly includes a dielectric element and a first and second microelectronic element stacked one atop the other with the first microelectronic element disposed between the second microelectronic element and the dielectric. The dielectric element has opposed first and second surfaces with conductive features exposed at the first surface and terminals exposed on the second surface. Preferably, the contact-bearing face of the first microelectronic element confronts the first surface of the dielectric with at least some of the conductive features being movable with respect to the contacts or terminals. By providing such movable features, joining units have heights of about 300 microns or less may be joined to the terminals thereby reducing the overall height of the microelectronic assembly to 1.2 mm and less.

摘要翻译： 堆叠的微电子组件包括介电元件和第一和第二微电子元件，第一和第二微电子元件彼此堆叠，第一微电子元件设置在第二微电子元件和电介质之间。 电介质元件具有相对的第一表面和第二表面，其导电特征在第一表面暴露并且端子暴露在第二表面上。 优选地，第一微电子元件的接触面面对电介质的第一表面，其中至少一些导电特征可相对于触点或端子移动。 通过提供这种可移动特征，具有约300微米或更小的高度的接合单元可以连接到端子，从而将微电子组件的整体高度减小到1.2mm以下。

公开(公告)号：US08686551B2

公开(公告)日：2014-04-01

申请号：US13488828

申请日：2012-06-05

申请人： Belgacem Haba ,  Craig S. Mitchell ,  Apolinar Alvarez, Jr.

发明人： Belgacem Haba ,  Craig S. Mitchell ,  Apolinar Alvarez, Jr.

IPC分类号： H01L23/02 ,  H01L23/34 ,  H01L23/29 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L21/4853 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/5385 ,  H01L23/552 ,  H01L24/48 ,  H01L25/0652 ,  H01L25/162 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/3025 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Substrates having molded dielectric layers and methods of fabricating such substrates are disclosed. The substrates may advantageously be used in microelectronic assemblies having high routing density.

摘要翻译： 公开了具有模制的电介质层的衬底及其制造方法。 衬底可有利地用于具有高布线密度的微电子组件中。

公开(公告)号：US20110042810A1

公开(公告)日：2011-02-24

申请号：US12938094

申请日：2010-11-02

申请人： Belgacem Haba ,  Craig S. Mitchell ,  Masud Beroz

发明人： Belgacem Haba ,  Craig S. Mitchell ,  Masud Beroz

IPC分类号： H01L23/498 ,  H01L23/522

CPC分类号： H01L24/81 ,  H01L21/56 ,  H01L21/78 ,  H01L23/49575 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/97 ,  H01L25/105 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A plurality of microelectronic assemblies are made by severing an in-process unit including an upper substrate and lower substrate with microelectronic elements disposed between the substrates. In a further embodiment, a lead frame is joined to a substrate so that the leads project from this substrate. Lead frame is joined to a further substrate with one or more microelectronic elements disposed between the substrates.

摘要翻译： 多个微电子组件是通过用设置在基板之间的微电子元件切断包括上基板和下基板的在线单元制成的。 在另一个实施例中，引线框架连接到基板，使得引线从该基板突出。 引线框架连接到具有设置在基板之间的一个或多个微电子元件的另一基板。

公开(公告)号：US20090071707A1

公开(公告)日：2009-03-19

申请号：US12228537

申请日：2008-08-13

申请人： Kimitaka Endo ,  Philip Damberg ,  Craig S. Mitchell ,  Sean Moran ,  Christopher Wade ,  Belgacem Haba ,  John Riley

发明人： Kimitaka Endo ,  Philip Damberg ,  Craig S. Mitchell ,  Sean Moran ,  Christopher Wade ,  Belgacem Haba ,  John Riley

IPC分类号： H05K1/11 ,  C25D5/02

CPC分类号： H05K3/4007 ,  C25D5/02 ,  H01L21/4846 ,  H01L24/73 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/112 ,  H05K3/06 ,  H05K3/20 ,  H05K3/243 ,  H05K3/421 ,  H05K3/423 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2201/09563 ,  H05K2203/0152 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0733 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A method is provided for manufacturing a multilayer substrate. An insulating layer can have a hole overlying a patterned second metal layer. In turn, the second metal layer can overlie a first metal layer. A third metal layer can be electroplated onto the patterned second metal layer within the hole, the third metal layer extending from the second metal layer onto a wall of the hole. When plating the third metal layer, the first and second metal layers can function as a conductive commoning element.

摘要翻译： 提供了制造多层基板的方法。 绝缘层可以具有覆盖图案化的第二金属层的孔。 反过来，第二金属层可以覆盖在第一金属层上。 第三金属层可以电镀在孔内的图案化的第二金属层上，第三金属层从第二金属层延伸到孔的壁上。 当电镀第三金属层时，第一和第二金属层可以用作导电共用元件。

公开(公告)号：US07309910B2

公开(公告)日：2007-12-18

申请号：US11647838

申请日：2006-12-28

申请人： Craig S. Mitchell ,  Belgacem Haba

发明人： Craig S. Mitchell ,  Belgacem Haba

IPC分类号： H01L23/495 ,  H01L21/50

CPC分类号： H01L23/4951 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/48 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A microelectronic package includes a microelectronic element having contacts, a dielectric element, at least a portion of the dielectric element extending beneath the microelectronic element, and a structure including portions of a lead frame. The structure includes a plurality of terminals and leads formed integrally with the terminals, at least some of the terminals and at least some of the leads being disposed entirely beneath the microelectronic element, and at least some of the contacts being connected to at least some of the terminals by at least some of the leads. The leads and terminals are at least about 50 microns thick.

摘要翻译： 微电子封装包括具有触点的微电子元件，电介质元件，在微电子元件下方延伸的介电元件的至少一部分，以及包括引线框架的部分的结构。 该结构包括与端子一体形成的多个端子和引线，至少一些端子和至少一些引线完全设置在微电子元件下方，并且至少一些触点被连接到至少一些 终端由至少一些引线。 引线和端子至少约50微米厚。

公开(公告)号：US07202112B2

公开(公告)日：2007-04-10

申请号：US10972180

申请日：2004-10-22

申请人： Craig S. Mitchell ,  Belgacem Haba

发明人： Craig S. Mitchell ,  Belgacem Haba

IPC分类号： H01L21/50 ,  H01L23/495

CPC分类号： H01L23/4951 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/49572 ,  H01L24/48 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of making a microelectronic package includes providing a lead frame having at least one bus element and a plurality of branches extending from the bus element, each branch including a terminal and an elongated lead extending between the bus element and the terminal. The method includes applying a carrier element to the lead frame to form a laminate with the branches adhering to a first surface of the carrier element, and severing the branches from the bus element, leaving the branches mechanically connected to one another by the carrier element so as to form an in-process unit. The method also includes assembling a microelectronic element with the in-process unit so that the microelectronic element overlies a second surface of the carrier element.

摘要翻译： 制造微电子封装的方法包括提供具有至少一个总线元件的引线框架和从总线元件延伸的多个分支，每个支路包括端子和在总线元件和端子之间延伸的细长引线。 该方法包括将载体元件施加到引线框架以形成层压体，其中分支粘附到载体元件的第一表面，并且从总线元件断开分支，使分支通过载体元件彼此机械连接，从而 以形成一个进程内单元。 该方法还包括将微电子元件与处理中单元组装，使得微电子元件覆盖载体元件的第二表面。

公开(公告)号：US06977440B2

公开(公告)日：2005-12-20

申请号：US10454029

申请日：2003-06-04

申请人： L. Elliott Pflughaupt ,  David Gibson ,  Young-Gon Kim ,  Craig S. Mitchell ,  Wael Zohni ,  Ilyas Mohammed

发明人： L. Elliott Pflughaupt ,  David Gibson ,  Young-Gon Kim ,  Craig S. Mitchell ,  Wael Zohni ,  Ilyas Mohammed

IPC分类号： H01L21/31 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L23/02 ,  H01L23/48 ,  H01L23/485 ,  H01L23/50 ,  H01L23/528 ,  H01L23/66 ,  H01L25/065 ,  H01L31/0336 ,  H05K1/02

CPC分类号： H01L23/528 ,  H01L23/50 ,  H01L23/66 ,  H01L24/10 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/06505 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/14 ,  H01L2224/1403 ,  H01L2224/14505 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/78301 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/023 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/00014

摘要： A stacked chip assembly includes individual units having chips mounted on dielectric layers and traces on the dielectric layers interconnecting the contacts of the chips with terminals disposed in peripheral regions of the dielectric layers. At least some of the traces are multi-branched traces which connect chip select contacts to chip select terminals. The units are stacked one above the other with corresponding terminals of the different units being connected to one another by solder balls or other conductive elements so as to form vertical buses. Prior to stacking, the multi-branched traces of the individual units are selectively connected, as by forming solder bridges, so as to leave chip select contacts of chips in different units connected to different chip select terminals and thereby connect these chips to different vertical buses. The individual units desirably are thin and directly abut one another so as to provide a low-height assembly with good heat transfer from chips within the stack.

摘要翻译： 堆叠式芯片组件包括具有安装在电介质层上的芯片的单独单元和在将芯片的触点与布置在电介质层的周边区域中的端子互连的电介质层上的迹线。 至少一些迹线是将分片选择触点连接到芯片选择端子的多分支迹线。 这些单元彼此堆叠，不同单元的相应端子通过焊球或其它导电元件彼此连接，以形成垂直总线。 在堆叠之前，通过形成焊接桥，各个单元的多分支迹线被选择性地连接，以便在连接到不同的芯片选择端子的不同单元中留下芯片的芯片选择触点，从而将这些芯片连接到不同的垂直总线 。 各个单元期望地是薄的并且直接地彼此邻接，以便提供具有来自堆叠内的芯片的良好热传递的低高度组件。

公开(公告)号：US06602740B1

公开(公告)日：2003-08-05

申请号：US09718945

申请日：2000-11-22

申请人： Craig S. Mitchell

发明人： Craig S. Mitchell

IPC分类号： H01L2144

CPC分类号： H01L21/56 ,  H01L23/3114 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： A method of encapsulating microelectronic assemblies includes providing a substrate, securing at least one packaged chip atop the substrate, electrically interconnecting the at least one packaged chip and the substrate, and providing a dam atop the substrate, the dam surrounding the at least one packaged chip secured to the substrate. The method includes providing a cover layer over the dam and the at least one packaged chip secured atop the substrate, whereby the substrate, the dam and the cover layer define an enclosed space surrounding the at least one packaged chip. A curable liquid encapsulant is introduced into the enclosed space and cured to provide a compliant layer around the at least one packaged chip. The packaged chips may be electrically connected with the substrate using conductive leads or wires. Each packaged chip may include a semiconductor chip and a dielectric sheet electrically connected to the semiconductor chip. A porous layer, such as a plurality of compliant pads, may be disposed between the semiconductor chip and the dielectric sheet.

摘要翻译： 封装微电子组件的方法包括提供衬底，将至少一个封装芯片固定在衬底顶部，将至少一个封装芯片和衬底电互连，以及在衬底顶部提供一个坝，围绕至少一个封装芯片 固定在基材上。 所述方法包括在所述坝上提供覆盖层，并且所述至少一个封装芯片固定在所述衬底顶部，由此所述衬底，所述阻挡层和所述覆盖层限定围绕所述至少一个封装芯片的封闭空间。 将可固化液体密封剂引入封闭空间中并固化，以在至少一个封装芯片周围提供顺应层。 封装的芯片可以使用导电引线或导线与基板电连接。 每个封装的芯片可以包括电连接到半导体芯片的半导体芯片和电介质片。 诸如多个柔性焊盘的多孔层可以设置在半导体芯片和电介质片之间。