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    Method of performing salicide processes on MOS transistors
    1.
    发明授权
    Method of performing salicide processes on MOS transistors 有权
    在MOS晶体管上执行自对准硅化物处理的方法

    公开(公告)号：US07384853B2

    公开(公告)日：2008-06-10

    申请号：US11161990

    申请日：2005-08-25

    Applicant: Ming-Tsung Chen ,  Chang-Chi Huang ,  Po-Chao Tsao

    Inventor： Ming-Tsung Chen ,  Chang-Chi Huang ,  Po-Chao Tsao

    IPC: H01L21/331

    CPC classification number: H01L21/28518 ,  H01L21/26506 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/7834

    Abstract: A method of performing salicide processes on a MOS transistor, wherein the MOS transistor comprises a gate structure and a source/drain region, the method comprising: performing a selective growth process to form a silicon layer on the top of the gate and the source/drain region; performing an ion implantation process to form a retarded interface layer between the silicon layer and the gate and source/drain region; forming a metal layer on the silicon layer; and reacting the metal layer with the silicon layer for forming a silicide layer.

    Abstract translation: 一种在MOS晶体管上执行自对准硅化物工艺的方法，其中所述MOS晶体管包括栅极结构和源极/漏极区域，所述方法包括：执行选择性生长工艺以在所述栅极的顶部上形成硅层，并且所述源/ 漏区; 执行离子注入工艺以在硅层和栅极和源极/漏极区之间形成延迟界面层; 在所述硅层上形成金属层; 并使金属层与用于形成硅化物层的硅层反应。

    METHOD OF FABRICATING OPENINGS AND CONTACT HOLES
    3.
    发明申请
    METHOD OF FABRICATING OPENINGS AND CONTACT HOLES 有权
    制作开口和接触孔的方法

    公开(公告)号：US20070082489A1

    公开(公告)日：2007-04-12

    申请号：US11163149

    申请日：2005-10-06

    Applicant: Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen

    Inventor： Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen

    IPC: H01L21/302

    CPC classification number: H01L21/76802 ,  H01L21/76831

    Abstract: A substrate having an etch stop layer and at least a dielectric layer disposed from bottom to top is provided. The dielectric layer is then patterned to form a plurality of openings exposing the etch stop layer. A dielectric thin film is subsequently formed to cover the dielectric layer, the sidewalls of the openings, and the etch stop layer. The dielectric thin film disposed on the dielectric layer and the etch stop layer is then removed.

    Abstract translation: 提供具有蚀刻停止层和至少从底部到顶部设置的电介质层的衬底。 然后将电介质层图案化以形成露出蚀刻停止层的多个开口。 随后形成介电薄膜以覆盖电介质层，开口的侧壁和蚀刻停止层。 然后去除设置在电介质层和蚀刻停止层上的电介质薄膜。

    Method of fabricating semiconductor device for preventing polysilicon line being damaged during removal of photoresist
    5.
    发明授权
    Method of fabricating semiconductor device for preventing polysilicon line being damaged during removal of photoresist 有权

    公开(公告)号：US06544849B2

    公开(公告)日：2003-04-08

    申请号：US09852254

    申请日：2001-05-09

    Applicant: Shih-Chieh Hsu ,  Yi-Chung Sheng ,  Chang-Chi Huang ,  Sheng-Hao Lin ,  Cheng-Tung Huang

    Inventor： Shih-Chieh Hsu ,  Yi-Chung Sheng ,  Chang-Chi Huang ,  Sheng-Hao Lin ,  Cheng-Tung Huang

    IPC: H01L218234

    CPC classification number: H01L21/823425

    Abstract: A method of fabricating the semiconductor device for preventing polysilicon line from being damaged during removal of a photoresist layer. The method begins by forming polysilicon lines on a core device region and an electrostatic discharge protection device region of a substrate. A plurality of offset spacers is formed on sidewalls of the polysilicon lines. After the offset spacers are formed, a photoresist layer is formed over the substrate to cover the core device region, while exposing the electrostatic discharge protection device region. With the photoresist layer serving as a mask, a punch-through ion implantation is performed on the electrostatic discharge protection device region before the photoresist layer is removed. Next, a plurality of lightly doped source/drain regions is formed in the core device region. A spacer is further formed on the edge of the offset spacer, followed by forming source/drain regions in the core device region and the electrostatic discharge protection device. Since the offset spacers are formed on the sidewalls of the polysilicon lines before the photoresist layer is removed, the offset spacers can protect the polysilicon lines from being broken.

    METHOD OF FABRICATING NICKEL SILICIDE
    8.
    发明申请
    METHOD OF FABRICATING NICKEL SILICIDE 有权
    制备尼龙硅胶的方法

    公开(公告)号：US20070167009A1

    公开(公告)日：2007-07-19

    申请号：US11685209

    申请日：2007-03-13

    Applicant: Yi-Wei Chen ,  Chao-Ching Hsieh ,  Yi-Yiing Chiang ,  Tzung-Yu Hung ,  Yu-Lan Chang ,  Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen

    Inventor： Yi-Wei Chen ,  Chao-Ching Hsieh ,  Yi-Yiing Chiang ,  Tzung-Yu Hung ,  Yu-Lan Chang ,  Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen

    IPC: H01L21/44

    CPC classification number: H01L29/665 ,  H01L21/324 ,  H01L29/4933

    Abstract: A semiconductor device having nickel suicide and a method for fabricating nickel silicide. A semiconductor substrate having a plurality of doped regions is provided. Subsequently, a nickel layer is formed on the semiconductor substrate, and a first rapid thermal process (RTP) is performed to react the nickel layer with the doped regions disposed there under. Thereafter, the unreacted nickel layer is removed, and a second rapid thermal process is performed to form a semiconductor device having nickel silicide. The second rapid thermal process is a spike anneal process whose process temperature is between 400 and 600° C.

    Abstract translation: 一种具有镍硅化物的半导体器件和一种制造硅化镍的方法。 提供具有多个掺杂区域的半导体衬底。 随后，在半导体衬底上形成镍层，并进行第一快速热处理（RTP）以使镍层与设置在其下方的掺杂区域反应。 此后，除去未反应的镍层，进行第二快速热处理以形成具有硅化镍的半导体器件。 第二快速热处理是工艺温度在400和600℃之间的尖峰退火工艺。

    Metal oxide semiconductor transistor
    9.
    发明授权
    Metal oxide semiconductor transistor 有权
    金属氧化物半导体晶体管

    公开(公告)号：US07214988B2

    公开(公告)日：2007-05-08

    申请号：US11162693

    申请日：2005-09-20

    Applicant: Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen ,  Yi-Yiing Chiang ,  Yu-Lan Chang ,  Chung-Ju Lee ,  Chih-Ning Wu ,  Kuan-Yang Liao

    Inventor： Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen ,  Yi-Yiing Chiang ,  Yu-Lan Chang ,  Chung-Ju Lee ,  Chih-Ning Wu ,  Kuan-Yang Liao

    IPC: H01L29/76

    CPC classification number: H01L29/6653 ,  H01L21/28518 ,  H01L21/31111 ,  H01L29/6659

    Abstract: A method for forming a metal oxide semiconductor (MOS) transistor is provided. First, a gate structure is formed over a substrate. Then, offset spacers are formed on respective sidewalls of the gate structure. A first ion implantation process is performed to form a lightly doped drain (LDD) in the substrate beside the gate structure. Other spacers are formed on respective sidewalls of the offset spacers. Thereafter, a second ion implantation process is performed to form source/drain region in the substrate beside the spacers. Then, a metal silicide layer is formed on the surface of the source and the drain. An oxide layer is formed on the surface of the metal silicide layer. The spacers are removed and an etching stop layer is formed on the substrate. With the oxide layer over the metal silicide layer, the solvent for removing the spacers is prevented from damaging the metal silicide layer.

    Abstract translation: 提供一种用于形成金属氧化物半导体（MOS）晶体管的方法。 首先，在基板上形成栅极结构。 然后，在栅极结构的相应侧壁上形成偏移间隔物。 执行第一离子注入工艺以在栅极结构旁边的衬底中形成轻掺杂漏极（LDD）。 在偏置间隔物的相应侧壁上形成其它间隔物。 此后，进行第二离子注入工艺以在衬垫旁边的衬垫上形成源极/漏极区域。 然后，在源极和漏极的表面上形成金属硅化物层。 在金属硅化物层的表面上形成氧化物层。 去除间隔物，并在衬底上形成蚀刻停止层。 通过金属硅化物层上的氧化物层，可以防止用于除去间隔物的溶剂损坏金属硅化物层。

    Detachable sponge device for spin-coating machines
    10.
    发明授权
    Detachable sponge device for spin-coating machines 失效
    可剥离海绵装置用于旋涂机

    公开(公告)号：US5868843A

    公开(公告)日：1999-02-09

    申请号：US783103

    申请日：1997-01-14

    Applicant: Yu-Chen Yang ,  Chang-Chi Huang ,  Wen-Ping Yen

    Inventor： Yu-Chen Yang ,  Chang-Chi Huang ,  Wen-Ping Yen

    IPC: B05C11/08 ,  B05C11/10 ,  H01L21/00 ,  B05C21/00

    CPC classification number: H01L21/6715 ,  B05C11/08 ,  B05C11/1039

    Abstract: A detachable sponge device for a spin coating machine used to coat a liquid material over a semiconductor wafer is provided. The detachable sponge device is used to prevent the solvent that is jetted on the edge of the wafer from being oversprayed elsewhere on the wafer. The detachable sponge device is composed of a curved mounting piece and a corrugated piece of sponge attached on the curved inner side of the mounting piece. The mounting piece can be detachably mounted on the spin coating machine. The corrugated piece of sponge can absorb splattered particles of solvent from the wafer which can thus be prevented from bouncing back onto the wafer. The planarization of the coating of SOG on the wafer thus will not be affected by splattering particles of the solvent. Excellent results of planarization of SOG or photoresist layers can thus be achieved.

    Abstract translation: 提供了一种用于在半导体晶片上涂覆液体材料的旋涂机的可拆卸海绵装置。 可拆卸的海绵装置用于防止喷射在晶片边缘上的溶剂在晶片上的其他地方被过度喷涂。 可拆卸海绵装置由安装在安装件的弯曲内侧上的弯曲安装件和波纹状海绵构成。 安装件可拆卸地安装在旋涂机上。 波纹状海绵片可以从晶片吸收飞溅的溶剂颗粒，从而可以防止其从反弹回到晶片上。 因此，晶片上的SOG涂层的平面化不会受到溶剂的飞溅颗粒的影响。 因此可以实现SOG或光致抗蚀剂层的平坦化的优异结果。

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