公开(公告)号：US07884028B2

公开(公告)日：2011-02-08

申请号：US11733762

申请日：2007-04-10

Applicant: Yi-Wei Chen ,  Chun-Chieh Chang ,  Tzung-Yu Hung ,  Yu-Lan Chang ,  Chao-Ching Hsieh

Inventor： Yi-Wei Chen ,  Chun-Chieh Chang ,  Tzung-Yu Hung ,  Yu-Lan Chang ,  Chao-Ching Hsieh

IPC: H01L21/302

CPC classification number: H01L21/28052 ,  C23F1/08 ,  H01L21/28518 ,  H01L21/32134 ,  H01L21/6708 ,  H01L29/4933 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method of removing material layer is disclosed. First, a semiconductor substrate is fixed on a rotating platform, where a remnant material layer is included on the surface of the semiconductor substrate. Afterward, an etching process is carried out. In the etching process, the rotating platform is rotated, and an etching solution is sprayed from a center region and a side region of the rotating platform toward the semiconductor substrate until the material layer is removed. Since the semiconductor substrate is etched by the etching solution sprayed from both the center region and the side region of the rotating platform, the etching uniformity of the semiconductor substrate is improved.

Abstract translation: 公开了去除材料层的方法。 首先，将半导体基板固定在旋转平台上，在半导体基板的表面上包含残留材料层。 之后，进行蚀刻处理。 在蚀刻工艺中，旋转平台旋转，并且蚀刻溶液从旋转平台的中心区域和侧部区域朝向半导体衬底喷射直到材料层被去除。 由于通过从旋转平台的中心区域和侧面区域喷射的蚀刻溶液蚀刻半导体衬底，所以提高了半导体衬底的蚀刻均匀性。

公开(公告)号：US07482668B2

公开(公告)日：2009-01-27

申请号：US11829087

申请日：2007-07-27

Applicant: Chao-Ching Hsieh ,  Chun-Chieh Chang ,  Tzung-Yu Hung

Inventor： Chao-Ching Hsieh ,  Chun-Chieh Chang ,  Tzung-Yu Hung

IPC: H01L31/07

CPC classification number: H01L29/7833 ,  H01L21/823807 ,  H01L21/823864 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7843

Abstract: A semiconductor device is provided. A transistor is formed on a substrate, and a metal silicide layer is formed on the surface of a gate conductor layer and a source/drain region. Next, a surface treatment process is performed to selectively form a protection layer on the surface of the metal silicide layer. Then, a spacer of the transistor is partially removed using the protection layer as a mask, so as to reduce the width of the spacer. Then, a stress layer is formed on the substrate.

Abstract translation: 提供一种半导体器件。 在基板上形成晶体管，在栅极导体层和源极/漏极区域的表面上形成金属硅化物层。 接下来，进行表面处理工艺以在金属硅化物层的表面上选择性地形成保护层。 然后，使用保护层作为掩模来部分地去除晶体管的间隔物，以便减小间隔物的宽度。 然后，在基板上形成应力层。

公开(公告)号：US20080194100A1

公开(公告)日：2008-08-14

申请号：US11673145

申请日：2007-02-09

Applicant: Tzung-Yu Hung ,  Chun-Chieh Chang ,  Chao-Ching Hsieh ,  Yu-Lan Chang ,  Yi-Wei Chen

Inventor： Tzung-Yu Hung ,  Chun-Chieh Chang ,  Chao-Ching Hsieh ,  Yu-Lan Chang ,  Yi-Wei Chen

IPC: H01L21/44

CPC classification number: H01L21/28518

Abstract: The invention provides a method for forming a metal silicide layer. The method comprises steps of providing a substrate and forming a nickel-noble metal layer over the substrate. A grain boundary sealing layer is formed on the nickel-noble metal layer and then an oxygen diffusion barrier layer is formed on the grain boundary sealing layer. Thereafter, a rapid thermal process is performed to transform a portion of the nickel-noble metal layer into a metal silicide layer. Finally, the oxygen diffusion barrier layer, the grain boundary sealing layer and the rest portion of the nickel-noble metal layer are removed.

Abstract translation: 本发明提供一种形成金属硅化物层的方法。 该方法包括提供衬底并在衬底上形成镍 - 贵金属层的步骤。 在镍 - 贵金属层上形成晶界密封层，然后在晶界密封层上形成氧扩散阻挡层。 此后，进行快速热处理以将一部分镍 - 贵金属层转变为金属硅化物层。 最后，除去氧扩散阻挡层，晶界密封层和镍 - 贵金属层的其余部分。

公开(公告)号：US20070087573A1

公开(公告)日：2007-04-19

申请号：US11255420

申请日：2005-10-19

Applicant: Yi-Yiing Chiang ,  Chao-Ching Hsieh ,  Tzung-Yu Hung ,  Yu-Lan Chang ,  Chien-Chung Huang ,  Yi-Wei Chen

Inventor： Yi-Yiing Chiang ,  Chao-Ching Hsieh ,  Tzung-Yu Hung ,  Yu-Lan Chang ,  Chien-Chung Huang ,  Yi-Wei Chen

IPC: C03C25/68 ,  B05D3/00 ,  H01L21/302 ,  B44C1/22

CPC classification number: C23C14/021 ,  H01L21/28506 ,  H01L21/28518

Abstract: A pre-treatment method for physical vapor deposition of a metal layer is provided. A substrate is first provided and then a dry cleaning process is performed to the substrate using a chemical etching process, in which the chemical etching process causes a reaction to the oxide. Thereafter, an annealing process is performed, followed by a cooling process. Due to the treatment prior to depositing of the metal layer, subsequent metal layers from ill effects are prevented.

Abstract translation: 提供了用于金属层的物理气相沉积的预处理方法。 首先提供衬底，然后使用化学蚀刻工艺对衬底进行干法处理，其中化学蚀刻工艺引起与氧化物的反应。 此后，进行退火处理，随后进行冷却处理。 由于在沉积金属层之前的处理，防止了不良影响的后续金属层。

公开(公告)号：US06849541B1

公开(公告)日：2005-02-01

申请号：US10707517

申请日：2003-12-19

Applicant: Shao-Chung Hu ,  Yu-Ru Yang ,  Chien-Chung Huang ,  Tzung-Yu Hung

Inventor： Shao-Chung Hu ,  Yu-Ru Yang ,  Chien-Chung Huang ,  Tzung-Yu Hung

IPC: H01L21/768 ,  H01L21/4763 ,  H01L21/44

CPC classification number: H01L21/76843 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76831 ,  H01L21/76873 ,  H01L2221/1089

Abstract: A method of forming at least one wire on a substrate. The substrate includes at least one conductive region. An insulating layer is disposed on the substrate. At least one recess in the insulating layer exposes the conductive region. A barrier layer is formed on a surface of the insulating layer and the recess first. A continuous and uniform conductive layer is then formed on a surface of the barrier layer. A seed layer is thereafter formed on a surface of the conductive layer. Finally, a metal layer filling up the recess is formed on a surface of the seed layer.

Abstract translation: 一种在衬底上形成至少一根线的方法。 衬底包括至少一个导电区域。 绝缘层设置在基板上。 绝缘层中的至少一个凹部露出导电区域。 首先在绝缘层的表面和凹部上形成阻挡层。 然后在阻挡层的表面上形成连续且均匀的导电层。 此后在导电层的表面上形成晶种层。 最后，在种子层的表面上形成填充凹部的金属层。

公开(公告)号：US07785972B2

公开(公告)日：2010-08-31

申请号：US11463007

申请日：2006-08-08

Applicant: Yu-Lan Chang ,  Chao-Ching Hsieh ,  Yi-Wei Chen ,  Tzung-Yu Hung ,  Chun-Chieh Chang

Inventor： Yu-Lan Chang ,  Chao-Ching Hsieh ,  Yi-Wei Chen ,  Tzung-Yu Hung ,  Chun-Chieh Chang

IPC: H01L21/336

CPC classification number: H01L21/26506 ,  H01L21/324 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method of making a transistor device having silicided source/drain is provided. A gate electrode is formed on a substrate with a gate dielectric layer therebetween. A spacer is formed on sidewalls of the gate electrode. A source/drain is implanted into the substrate. A pre-amorphization implant (PAI) is performed to form an amorphized layer on the source/drain. A post-PAI annealing process is performed to repair defects formed during the PAI process. A metal silicide layer is then formed from the amorphized layer.

Abstract translation: 提供了制造具有硅化物源极/漏极的晶体管器件的方法。 栅电极形成在基板上，栅电介质层之间。 在栅电极的侧壁上形成间隔物。 将源极/漏极注入到衬底中。 进行前非晶化植入（PAI）以在源极/漏极上形成非晶化层。 进行后PAI退火处理以修复在PAI过程期间形成的缺陷。 然后从非晶化层形成金属硅化物层。

公开(公告)号：US07649263B2

公开(公告)日：2010-01-19

申请号：US11944462

申请日：2007-11-23

Applicant: Yu-Lan Chang ,  Chao-Ching Hsieh ,  Yi-Yiing Chiang ,  Yi-Wei Chen ,  Tzung-Yu Hung

Inventor： Yu-Lan Chang ,  Chao-Ching Hsieh ,  Yi-Yiing Chiang ,  Yi-Wei Chen ,  Tzung-Yu Hung

IPC: H01L23/48

CPC classification number: H01L29/665 ,  H01L29/6659 ,  H01L29/7833 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device including at least one conductive structure is provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal salicide layer and a protection layer. The refractory metal salicide layer is disposed over the silicon-containing conductive layer. The protection layer is disposed over the refractory metal salicide layer. Another semiconductor device including at least one conductive structure is also provided. The conductive structure includes a silicon-containing conductive layer, a refractory metal alloy salicide layer and a protection layer. The refractory metal alloy salicide layer is disposed over the silicon-containing conductive layer. The refractory metal alloy salicide layer is formed from a reaction of silicon of the silicon-containing conductive layer and a refractory metal alloy layer which includes a first refractory metal and a second refractory metal. The protection layer is disposed over the refractory metal alloy salicide layer.

Abstract translation: 提供了包括至少一个导电结构的半导体器件。 导电结构包括含硅导电层，难熔金属硅化物层和保护层。 难熔金属硅化物层设置在含硅导电层上。 保护层设置在难熔金属硅化物层上。 还提供了包括至少一个导电结构的另一个半导体器件。 导电结构包括含硅导电层，难熔金属合金自对准硅化物层和保护层。 难熔金属合金自对准硅化物层设置在含硅导电层的上方。 难熔金属合金自对准硅化物层由含硅导电层的硅与含有第一耐火金属和第二难熔金属的难熔金属合金层的反应形成。 保护层设置在难熔金属合金自对准硅化物层上。

公开(公告)号：US07595264B2

公开(公告)日：2009-09-29

申请号：US12017066

申请日：2008-01-21

Applicant: Yu-Lan Chang ,  Chao-Ching Hsieh ,  Yi-Yiing Chiang ,  Yi-Wei Chen ,  Tzung-Yu Hung

Inventor： Yu-Lan Chang ,  Chao-Ching Hsieh ,  Yi-Yiing Chiang ,  Yi-Wei Chen ,  Tzung-Yu Hung

IPC: H01L21/44

CPC classification number: H01L29/665 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a refractory metal alloy layer over a silicon-containing conductive layer. The refractory metal alloy layer is constituted of a first refractory metal and a second refractory metal. Thereafter, a cap layer is formed on the refractory metal alloy layer. A thermal process is performed so that the refractory metal alloy layer reacts with silicon of the silicon-containing conductive layer to form a refractory metal alloy salicide layer. Afterwards, an etch process with an etch solution is performed to removes the cap layer and the refractory metal alloy layer which has not been reacted and to form a protection layer on the refractory metal alloy salicide layer.

Abstract translation: 提供一种制造半导体器件的方法。 该方法包括在含硅导电层上形成难熔金属合金层。 难熔金属合金层由第一耐火金属和第二难熔金属构成。 此后，在难熔金属合金层上形成盖层。 进行热处理，使得难熔金属合金层与含硅导电层的硅反应形成难熔金属合金硅化物层。 之后，进行具有蚀刻溶液的蚀刻工艺以除去未被反应的盖层和难熔金属合金层，并在难熔金属合金自对准硅化物层上形成保护层。

公开(公告)号：US20080224232A1

公开(公告)日：2008-09-18

申请号：US11687185

申请日：2007-03-16

Applicant: Chao-Ching Hsieh ,  Yu-Lan Chang ,  Chien-Chung Huang ,  Tzung-Yu Hung ,  Chun-Chieh Chang ,  Yi-Wei Chen

Inventor： Chao-Ching Hsieh ,  Yu-Lan Chang ,  Chien-Chung Huang ,  Tzung-Yu Hung ,  Chun-Chieh Chang ,  Yi-Wei Chen

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L21/28097 ,  H01L21/32105 ,  H01L21/3211 ,  H01L29/66507 ,  H01L29/66545

Abstract: A silicidation process for a MOS transistor and a resulting transistor structure are described. The MOS transistor includes a silicon substrate, a gate dielectric layer, a silicon gate, a cap layer on the silicon gate, a spacer on the sidewalls of the silicon gate and the cap layer, and S/D regions in the substrate beside the silicon gate. The process includes forming a metal silicide layer on the S/D regions, utilizing plasma of a reactive gas to react a surface layer of the metal silicide layer into a passivation layer, removing the cap layer and then reacting the silicon gate into a fully silicided gate.

Abstract translation: 描述了用于MOS晶体管和所得晶体管结构的硅化工艺。 MOS晶体管包括硅衬底，栅极电介质层，硅栅极，硅栅极上的覆盖层，硅栅极和帽层的侧壁上的间隔物，以及位于硅的旁边的衬底中的S / D区域 门。 该方法包括在S / D区上形成金属硅化物层，利用反应气体的等离子体将金属硅化物层的表面层反应成钝化层，去除覆盖层，然后使硅栅极反应成完全硅化物 门。

公开(公告)号：US20080020587A1

公开(公告)日：2008-01-24

申请号：US11458690

申请日：2006-07-20

Applicant: Chun-Chieh Chang ,  Tzung-Yu Hung ,  Chao-Ching Hsieh ,  Yi-Wei Chen ,  Yu-Lan Chang

Inventor： Chun-Chieh Chang ,  Tzung-Yu Hung ,  Chao-Ching Hsieh ,  Yi-Wei Chen ,  Yu-Lan Chang

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L21/02068 ,  H01L29/665

Abstract: A method of stripping a remnant metal is disclosed. The remnant metal is formed on a transitional silicide of a silicon substrate. Firstly, a surface oxidation process is performed on the transitional silicide, so as to form a protective layer on the transitional silicide. Then, a HPM stripping process is performed on the silicon substrate in order to strip the remnant metal.

Abstract translation: 公开了剥离残余金属的方法。 残余金属形成在硅衬底的过渡硅化物上。 首先，在过渡硅化物上进行表面氧化处理，以在过渡硅化物上形成保护层。 然后，在硅衬底上执行HPM剥离工艺，以剥离剩余金属。