Radio frequency signal transmission system with carrier frequencies at
opposite edges of the channel
    1.
    发明授权
    Radio frequency signal transmission system with carrier frequencies at opposite edges of the channel 失效
    射频信号传输系统,其通道的相对边缘具有载波频率

    公开(公告)号:US4761821A

    公开(公告)日:1988-08-02

    申请号:US885783

    申请日:1986-07-15

    IPC分类号: H04B1/40 H04B1/50

    CPC分类号: H04B1/50 H04B1/408

    摘要: A radio frequency transmitter simultaneously transmits both a local oscillator frequency and that frequency modulated by an information content signal. A receiver receives a carrier wave that is at the opposite edge of a channel from that of the local oscillator. The transmitted and received information signals can be of opposite type sidebands.

    摘要翻译: 射频发射机同时发送本地振荡器频率和由信息内容信号调制的频率。 接收机接收与本地振荡器的信道相反边缘的载波。 发送和接收的信息信号可以是相反类型的边带。

    Leadless chip carrier assembly and method
    2.
    发明授权
    Leadless chip carrier assembly and method 失效
    无引脚芯片载体组装及方法

    公开(公告)号:US4760948A

    公开(公告)日:1988-08-02

    申请号:US65611

    申请日:1987-06-23

    申请人: Ray G. Spiecker

    发明人: Ray G. Spiecker

    IPC分类号: H05K3/34 H05K13/04

    摘要: A leadless ceramic chip carrier (LCCC) is soldered to mating conductor pads on a circuit board by depositing a layer of solder paste on peripheral contact pads and on an array of central pads on the board. The same solder paste type and melt temperature are used for both peripheral and central pads. the contact pads of the LCCC are placed on the solder layers and the assembly exposed to infrared radiation from above or other energy source. The LCCC body shades the solder on the central pads resulting in the solder layers at the peripheral pads melting first. The solder on the central pads then melts and balls up due to surface tension lifting the LCCC away from the board stretching the melted solder at the peripheral pads which make the electrical connections to the LCCC contacts.

    摘要翻译: 无引线陶瓷芯片载体(LCCC)通过在外围接触焊盘和板上的中心焊盘阵列上沉积一层焊膏而焊接到电路板上的匹配导体焊盘。 相同的焊膏类型和熔体温度用于外围和中心焊盘。 LCCC的接触垫放置在焊料层上,该组件暴露于来自上述或其他能量源的红外辐射。 LCCC主体将焊料遮蔽在中心焊盘上,导致外围焊盘上的焊料层首先熔化。 中心焊盘上的焊料然后由于表面张力而熔化和焊球,LCCC远离板延伸在外围焊盘处熔化的焊料,从而形成与LCCC触点的电连接。

    Device header and method of making same
    3.
    发明授权
    Device header and method of making same 失效
    设备标题及其制作方法

    公开(公告)号:US4759829A

    公开(公告)日:1988-07-26

    申请号:US108664

    申请日:1987-10-15

    摘要: A device header with a multilayer coating overlying its entire surface, and a method of making said header, are disclosed. The multilayer coating comprises an electrolytic nickel layer and a gold layer in the device mounting area of the header, whereas the rest of the header is coated with electroless nickel, a first gold layer, electrolytic nickel, and a second gold layer. In the fabrication, the electroless nickel layer is deposited over the entire header followed by the first gold layer. Upon removing these layers from the device mounting area, the first gold layer remaining on the rest of the header acts as a mask for the etching of the mounting area preparatory to deposition of electrolytic nickel and the second gold layer. The header has the advantage of the excellent coverage of electroless nickel over most of its surface, but with the advantage of high purity electrolytic nickel in the device mounting area.

    摘要翻译: 公开了一种具有覆盖其整个表面的多层涂层的装置头部以及制造所述头部的方法。 多层涂层在集管的装置安装区域中包括电解镍层和金层,而集管的其余部分涂覆有无电镍,第一金层,电解镍和第二金层。 在制造中,无电镀镍层沉积在整个集管上,随后是第一金层。 在从装置安装区域移除这些层时,残留在集管的其余部分上的第一金层用作用于蚀刻沉积电解镍和第二金层的安装区域的掩模。 该头具有在其大部分表面上具有优异的化学镀镍覆盖的优点,但是在装置安装区域中具有高纯度电解镍的优点。

    Floating gate memory device with facing asperities on floating and
control gates
    4.
    发明授权
    Floating gate memory device with facing asperities on floating and control gates 失效
    浮动门存储器件在浮动和控制门上面对凹凸

    公开(公告)号:US4757360A

    公开(公告)日:1988-07-12

    申请号:US511250

    申请日:1983-07-06

    申请人: Lorenzo Faraone

    发明人: Lorenzo Faraone

    CPC分类号: H01L29/7883 Y10S257/90

    摘要: A floating gate memory device includes a substrate of semiconductor material having on a surface thereof a layer of insulating material. On the insulating layer is a floating gate of conductive polycrystalline silicon with the floating gate having a textured outer surface and relatively smoother sidewalls. A second layer of insulating material extends over the outer surface and sidewalls of the floating gate. The portion of the second insulating material over the outer surface of the floating gate has a textured surface and is thinner than the portions of the second insulating layer over the sidewalls of the floating gate. A control gate is over the second insulating layer and extends over the outer surface and sidewalls of the floating gate. The control gate is of conductive polycrystalline silicon and has an inner surface portion over the textured outer surface of the control gate which is textured and has undulations which substantially follow the undulations of the textured surface of the floating gate.

    摘要翻译: 浮栅存储器件包括半导体材料的衬底,其表面上具有绝缘材料层。 在绝缘层上是导电多晶硅的浮动栅极,浮动栅极具有织构化的外表面和相对平滑的侧壁。 第二层绝缘材料在浮动栅极的外表面和侧壁上延伸。 第二绝缘材料在浮动栅极的外表面上的部分具有纹理表面,并且比浮置栅极的侧壁上的第二绝缘层的部分更薄。 控制栅极在第二绝缘层上方并且在浮动栅极的外表面和侧壁上延伸。 控制栅极是导电多晶硅,并且在控制栅极的织构化外表面上具有纹理化的纹理外表面部分,并且具有基本上跟随浮栅的纹理化表面的起伏的起伏。

    Phase shifter with slow transition detector
    5.
    发明授权
    Phase shifter with slow transition detector 失效
    移相器与慢转换检测器

    公开(公告)号:US4754265A

    公开(公告)日:1988-06-28

    申请号:US786529

    申请日:1985-10-11

    IPC分类号: H01P1/185 H03L7/081 G08B21/00

    CPC分类号: H01P1/185 H03L7/0812

    摘要: A phase shifter uses a PIN diode or diode pairs operated in a switching mode to switch transmission-line elements for phase-shifting radio frequency or microwave signals. A drive circuit for each diode(s) includes a FET switch controlled by a first level of a bilevel control signal to apply B+ to forward bias the diode(s) with a forward current. When forward biased, the active region of the diode(s) becomes flooded with charge carriers. The first FET switch is turned OFF by a second level of the bilevel control signal, and a second FET switch is turned ON to apply a reverse bias voltage to the diode(s) to render them nonconductive. Before the diode(s) become nonconductive, the excess charge carriers must be swept out of the diode(s). To achieve fast switching, the second FET switch must draw a large current for a short time as the excess charge carriers are removed. In a phased-array antenna, it is difficult to locate defective components, and very difficult to locate a driver circuit/diode combination suffering from low switching speed. A monitor circuit includes a voltage divider which in effect translates the diode voltage to an input terminal of an EXOR gate. The control signal is applied to the second input terminal. The EXOR produces a fault indicative level for a short time after a transition of the control signal. A strobe timed to occur during this interval latches the fault indicative signal and the latched level is sent to a central monitor location and also lights a lamp at the module in which the defect occurs.

    摘要翻译: 移相器使用在开关模式下工作的PIN二极管或二极管对来切换用于移相射频或微波信号的传输线元件。 每个二极管的驱动电路包括由双电平控制信号的第一电平控制的FET开关,以施加B +以使正向电流对二极管进行正向偏置。 当正向偏置时,二极管的有源区域变得充满电荷载流子。 第一FET开关通过二级控制信号的第二电平关闭,第二FET开关导通,向二极管施加反向偏置电压,使其不导通。 在二极管变为非导通之前,必须将多余的电荷载流子从二极管中扫出。 为了实现快速切换,第二个FET开关必须在多余的电荷载体被去除的情况下短时间吸取大电流。 在相控阵天线中,难以定位有缺陷的部件,并且非常难以定位具有低切换速度的驱动电路/二极管组合。 监视器电路包括分压器,其实际上将二极管电压转换到EXOR门的输入端。 控制信号被施加到第二输入端。 EXOR在控制信号转换后短时间产生故障指示电平。 在该间隔期间定时发生的选通脉冲锁存故障指示信号,并且锁存电平被发送到中央监视器位置,并且还在发生缺陷的模块处点亮灯。

    Dielectrically isolated PMOS, NMOS, PNP and NPN transistors on a silicon
wafer
    6.
    发明授权
    Dielectrically isolated PMOS, NMOS, PNP and NPN transistors on a silicon wafer 失效
    硅晶片上的绝缘PMOS,NMOS,PNP和NPN晶体管

    公开(公告)号:US4751561A

    公开(公告)日:1988-06-14

    申请号:US33378

    申请日:1987-04-02

    摘要: A plurality of monocrystalline silicon seeds is disposed on an insulator layer which is disposed on a substantially flat major surface of a silicon wafer. A first monocrystalline silicon deposit of first conductivity type is formed on a first silicon seed and a second monocrystalline silicon deposit, of similar configuration, is formed on a second silicon seed. The first and second deposits are then covered with insulator layers and a third monocrystalline deposit is formed on a third silicon seed. The third deposit has a top surface height substantially equal to or less than that of the top surfaces of the first and second deposits. An insulator layer is then formed on the top surface of the third deposit and first and second monocrystalline islands are formed on this insulator layer. Complementary bipolar transistors are formed in the first and second monocrystalline silicon deposits and PMOS and NMOS transistors are formed in the first and second islands on the third insulator layer.

    摘要翻译: 多个单晶硅种子设置在绝缘体层上,该绝缘体层设置在硅晶片的基本平坦的主表面上。 在第一硅晶种上形成第一导电类型的第一单晶硅沉积物,并且在第二硅晶种上形成具有类似构造的第二单晶硅沉积物。 然后第一和第二沉积物被绝缘体层覆盖,并且在第三硅晶种上形成第三单晶沉积物。 第三沉积物具有基本上等于或小于第一和第二沉积物的顶表面的顶表面高度的顶表面高度。 然后在第三沉积物的顶表面上形成绝缘体层,并且在该绝缘体层上形成第一和第二单晶岛。 在第一和第二单晶硅沉积物中形成互补双极晶体管,并且在第三绝缘体层上的第一和第二岛中形成PMOS和NMOS晶体管。

    Method of measuring misalignment between superimposed patterns
    7.
    发明授权
    Method of measuring misalignment between superimposed patterns 失效
    测量叠加图案之间的偏差的方法

    公开(公告)号:US4750836A

    公开(公告)日:1988-06-14

    申请号:US909023

    申请日:1986-09-18

    申请人: Philip G. Stein

    发明人: Philip G. Stein

    摘要: A first pattern of circular indicia of the same diameter and of equal spacing is superimposed with an overlapping second pattern of circular indicia of the same diameter as the first pattern indicia. The indicia of the second pattern are in progressively larger spacings in mirror image relation to a central reference indicia. Measurement indicia are adjacent to each indicia of the second pattern. Observation of the most closely aligned indicia of the first and second patterns and the measurement indicia corresponding to that most closely aligned indicia gives a quick visual measurement of the magnitude of the misalignment.

    摘要翻译: 具有相同直径和等间距的圆形标记的第一图案与第一图案标记具有相同直径的圆形标记的重叠第二图案叠加。 第二种图案的标记在与中央参考标记的镜像关系中呈逐渐更大的间隔。 测量标记与第二图案的每个标记相邻。 观察第一和第二图案的最紧密排列的标记和对应于最接近对齐的标记的测量标记,可以快速地观察未对准的大小。

    Low distortion filters for separating frequency or phase modulated
signals from composite signals
    8.
    发明授权
    Low distortion filters for separating frequency or phase modulated signals from composite signals 失效
    用于从复合信号中分离频率或相位调制信号的低失真滤波器

    公开(公告)号:US4747140A

    公开(公告)日:1988-05-24

    申请号:US946042

    申请日:1986-12-24

    申请人: John J. Gibson

    发明人: John J. Gibson

    CPC分类号: H03H15/00 H04B1/1646

    摘要: A circuit for separating FM signals from a composite signal utilizes a comb filter having successive frequency response nulls which span the frequency spectrum of the FM signal to be separated. The comb filter response is phase linear and defines the pass-band of the desired signal. A nonideal or phase nonlinear bandpass filter can be cascaded with the comb filter to attenuate out of band signals. The cascade combination of the comb filter and nonlinear bandpass filters is a cost effective substitute for the conventional, complicated phase linear bandpass filter having a boxcar frequency response traditionally used to separate FM signals.

    摘要翻译: 用于从复合信号分离FM信号的电路利用具有连续频率响应零点的梳状滤波器,该频率响应零点跨越要分离的FM信号的频谱。 梳状滤波器响应是相位线性的并且定义所需信号的通带。 非线性或相位非线性带通滤波器可以与梳状滤波器级联以衰减带外信号。 梳状滤波器和非线性带通滤波器的级联组合是传统上用于分离FM信号的传统的复杂相位线性带通滤波器的成本有效的替代品,其具有箱式电车频率响应。

    Method for preparing a photosensitive film on a glass surface
    9.
    发明授权
    Method for preparing a photosensitive film on a glass surface 失效
    在玻璃表面上制备感光膜的方法

    公开(公告)号:US4746588A

    公开(公告)日:1988-05-24

    申请号:US802021

    申请日:1985-11-25

    摘要: A photosensitive film on a glass surface is prepared by: dispensing a quantity of aqueous emulsion containing the film constituents on the surface, distributing the emulsion as a layer over the surface, leveling the distributed layer and then drying the layer. To burst any bubbles that form during distribution, and to remove residual effects of the bubbles, a mist of a surface-tension-reducing liquid, such as methyl alcohol, is contacted with the distributed layer during leveling.

    摘要翻译: 玻璃表面上的感光性膜通过以下方式制备:在表面上分配一定量的含有膜成分的水性乳液,将乳液分布在表面上,使分布层平整,然后干燥该层。 为了在分配期间形成任何气泡,并且为了除去气泡的残留影响,在流平期间,表面张力降低液体如甲醇的雾与分布层接触。

    Degaussing circuit with residual current cutoff
    10.
    发明授权
    Degaussing circuit with residual current cutoff 失效
    具有残余电流截止的去磁电路

    公开(公告)号:US4742270A

    公开(公告)日:1988-05-03

    申请号:US782243

    申请日:1985-09-30

    IPC分类号: H04N9/29 H01J29/06

    CPC分类号: H04N9/29

    摘要: A degaussing circuit for a video display apparatus eliminates residual degaussing current flow during operation of the video display apparatus. A capacitor is connected between coil of the degaussing relay and the source of energizing voltage. Application of the energizing voltage to the relay coil energizes the relay and initiates degaussing of the cathode ray tube of the video display apparatus, and also causes the capacitor to begin charging. As the capacitor becomes charged, the degaussing relay becomes deenergized, thereby terminating degaussing current flow. The capacitor charging time constant is selected to allow sufficient time for degaussing to occur before deenergization of the degaussing relay.

    摘要翻译: 用于视频显示装置的消磁电路在视频显示装置的操作期间消除了剩余消磁电流。 电容器连接在消磁继电器的线圈和通电电源之间。 向继电器线圈施加通电电压使继电器通电,并启动视频显示装置的阴极射线管的消磁,并且还使电容器开始充电。 当电容器充电时,消磁继电器断电,从而终止消磁电流。 选择电容器充电时间常数以在消磁继电器断电之前允许有足够的时间进行消磁。