公开(公告)号：US07538987B2

公开(公告)日：2009-05-26

申请号：US10611978

申请日：2003-07-03

申请人： Hideo Fujiwara ,  Keiichi Nagasaka ,  Tong Zhao ,  William H. Butler ,  Julian Velev ,  Amrit Bandyopadhyay

发明人： Hideo Fujiwara ,  Keiichi Nagasaka ,  Tong Zhao ,  William H. Butler ,  Julian Velev ,  Amrit Bandyopadhyay

IPC分类号： G11B5/39

CPC分类号： G11B5/1278

摘要： A CPP spin-valve element formed on a substrate including a free layer structure including at least one ferromagnetic layer and a pinned layer structure including at least one ferromagnetic layer. The free layer is magnetically softer than the pinned layer. A thin non-magnetic spacer layer structure configured to separate the free layer and the pinned layer is provided in order to prevent a magnetic coupling between the free and pinned layer structures, and to allow an electric current to go there through. At least two current-confining (CC) layer structures including at least two parts having significantly different current conductivities are incorporated therein.

摘要翻译： 一种CPP自旋阀元件，其形成在包括至少一个铁磁层和包括至少一个铁磁层的钉扎层结构的自由层结构的基板上。 自由层比被钉扎层更软。 提供了构造成分离自由层和被钉扎层的薄非磁性间隔层结构，以防止自由和被钉扎层结构之间的磁耦合，并且允许电流通过其去。 包含至少两个电流限制（CC）层结构，其包括具有显着不同的电流电导率的至少两个部分。

公开(公告)号：US07496781B2

公开(公告)日：2009-02-24

申请号：US10278800

申请日：2002-10-24

申请人： Hirotaka Tamura ,  Hisakatsu Yamaguchi ,  Shigetoshi Wakayama ,  Kohtaroh Gotoh ,  Junji Ogawa

发明人： Hirotaka Tamura ,  Hisakatsu Yamaguchi ,  Shigetoshi Wakayama ,  Kohtaroh Gotoh ,  Junji Ogawa

IPC分类号： G06F1/04 ,  G05F1/12 ,  H03L7/06

CPC分类号： H04L7/0337 ,  G11C7/1072 ,  G11C7/22 ,  G11C7/222 ,  G11C8/18 ,  G11C11/4076 ,  H03K2005/00052 ,  H04L7/0025

摘要： A semiconductor integrated circuit device has a command decoder for issuing a control command in accordance with a supplied control signal, a DRAM core, and a timing adjusting circuit for supplying the control command, set active for a predetermined period, as a DRAM control signal to the DRAM core. The timing adjusting circuit generates n different clocks that are respectively shifted in phase with respect to a supplied reference clock, and generates the DRAM control signal by setting the control command active in a prescribed operation cycle for only a period starting at a first predetermined clock pulse of a first clock of the n clocks and ending at a second predetermined clock pulse of a second clock of the n clocks. In this way, timing design with relatively high accuracy of adjustment can be done in a short period.

摘要翻译： 半导体集成电路器件具有命令解码器，用于根据所提供的控制信号，DRAM内核和定时调整电路发出控制命令，该控制命令用于将预定周期内设定的控制命令设置为DRAM控制信号， DRAM内核。 定时调整电路产生相对于所提供的参考时钟相位移相同步的n个不同的时钟，并且通过仅在从第一预定时钟脉冲开始的周期内将规定的操作周期中的控制命令设置为有效来产生DRAM控制信号 的n个时钟的第一时钟并且以n个时钟的第二时钟的第二预定时钟脉冲结束。 以这种方式，可以在短时间内进行相对较高的调整精度的定时设计。

公开(公告)号：US07472282B1

公开(公告)日：2008-12-30

申请号：US09425736

申请日：1999-10-22

申请人： Yusaku Fujii ,  Takashi Shinzaki

发明人： Yusaku Fujii ,  Takashi Shinzaki

IPC分类号： H04K1/00 ,  H04L9/00

CPC分类号： G06K9/00885 ,  G06F21/32

摘要： ID information and organic information based on authentication demand which a service providing system received from a user terminal are inputted and stored into a use information storing unit. The ID information and organic information stored in an organic information input storing unit and an ID information input storing unit and the ID information and organic information which were inputted in the past in the use information storing unit are compared and collated by a comparing unit and a collating unit. A control unit discriminates an authentication demand by an illegal access person on the basis of results of the comparison and collation, notifies the service providing system of a discrimination result, and logs identity information of the illegal access person.

摘要翻译： 基于从用户终端接收到的服务提供系统的认证需求的ID信息和有机信息被输入并存储到使用信息存储单元中。 存储在有机信息输入存储单元和ID信息输入存储单元中的ID信息和有机信息以及过去在使用信息存储单元中输入的ID信息和有机信息被比较单元和 整理单位 控制单元基于比较和对照的结果来鉴别非法访问者的认证需求，向服务提供系统通知鉴别结果，并记录非法访问人员的身份信息。

公开(公告)号：US20060209974A1

公开(公告)日：2006-09-21

申请号：US11170702

申请日：2005-06-29

申请人： Makoto Yoshida

发明人： Makoto Yoshida

IPC分类号： H04L27/06 ,  H04B1/10 ,  H04K1/10

CPC分类号： H04L27/2647 ,  H04L25/0204

摘要： A propagation path estimation method for a receiver of a radio communication system in which band limiting of a signal is performed in signal transmission and reception. The method comprises: estimating an impulse response group of a propagation path of the signal; having the impulse response group pass through a filter with a filter characteristic inverse of a band limiting filter characteristic for the band limiting; removing impulse responses corresponding to noise components from an output of the filter by threshold judgement; and estimating the propagation path using impulse responses which are not removed. The method is capable of suppressing background noises regardless of propagation environments such as a delay spread or path intervals, so that the accuracy of propagation path estimation is significantly improved.

摘要翻译： 一种用于在信号发送和接收中执行信号的频带限制的无线电通信系统的接收机的传播路径估计方法。 该方法包括：估计信号的传播路径的脉冲响应组; 脉冲响应组通过具有用于频带限制的频带限制滤波器特性的滤波器特性的滤波器; 通过阈值判断从滤波器的输出去除对应于噪声分量的脉冲响应; 以及使用未被去除的脉冲响应来估计传播路径。 该方法能够抑制背景噪声，而不管传播环境如延迟扩展或路径间隔，从而显着提高了传播路径估计的精度。

公开(公告)号：US20050196704A1

公开(公告)日：2005-09-08

申请号：US11117309

申请日：2005-04-29

申请人： Shunji Baba ,  Takatoyo Yamakami ,  Norio Kainuma ,  Kenji Kobae ,  Hidehiko Kira ,  Hiroshi Kobayashi

发明人： Shunji Baba ,  Takatoyo Yamakami ,  Norio Kainuma ,  Kenji Kobae ,  Hidehiko Kira ,  Hiroshi Kobayashi

IPC分类号： G03F7/16 ,  B05C5/02 ,  B05C11/10 ,  B05D3/00 ,  B05D7/00 ,  H01L21/56 ,  H01L21/60 ,  H05K1/02 ,  H05K3/00 ,  H05K3/28 ,  G03C5/00

CPC分类号： B05C11/1034 ,  B05C5/0212 ,  H01L21/563 ,  H01L24/743 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2924/00014 ,  H05K1/0269 ,  H05K3/0091 ,  H05K3/284 ,  H05K2203/0126 ,  H05K2203/163 ,  H01L2924/00 ,  H01L2224/05599

摘要： A resin coating method for applying resin to a predetermined region of a wiring board includes the steps of imaging an external appearance of the resin extruded from a resin application device; and automatically adjusting an amount of the resin extruded from the resin application device based on the external appearance of the resin obtained in the imaging step.

公开(公告)号：US20040041595A1

公开(公告)日：2004-03-04

申请号：US10648272

申请日：2003-08-27

申请人： FUJITSU, LTD.

发明人： Yasushige Ogawa ,  Yoshiyuki Ishida ,  Masato Matsumiya

IPC分类号： H03K005/00

CPC分类号： H03M1/1019 ,  G01R31/3167 ,  H03M1/66

摘要： It is intended to provide a semiconductor integrated circuit device and adjustment method of the same semiconductor integrated circuit device, capable of adjusting an analog signal outputted from an incorporated analog signal generating section without outputting it outside as an analog value. An analog signal AOUT is outputted from an analog signal generating section 3 in which an adjustment signal AD is inputted. The analog signal AOUT is inputted to a judgment section 1, in which it is compared and judged with a predetermined value and then a judgment signal JG is outputted. The judgment signal JG acts on a predetermined signal storing section 4 as an internal signal and the adjustment signal AD is fetched into the predetermined signal storing section 4. Further, the judgment signal JG is outputted as digital signal through an external terminal T2 and an external tester device acquires the adjustment signal and stores the acquired adjustment signal in the predetermined signal storing section 4. Consequently, the analog signal can be adjusted as analog value without being outputted outside and an adjustment test can be carried out with a simple tester device and according to a simple test method accurately and rapidly.

摘要翻译： 本发明旨在提供一种半导体集成电路器件的半导体集成电路器件和调整方法，该半导体集成电路器件能够调整从内置的模拟信号产生部分输出的模拟信号而不将其输出为模拟值。 从输入调整信号AD的模拟信号生成部3输出模拟信号AOUT。 模拟信号AOUT被输入到判断部分1，在判定部分1中，以预定值进行比较和判断，然后输出判断信号JG。 判断信号JG作为内部信号作用在预定信号存储部分4上，并且调节信号AD被取出到预定信号存储部分4.此外，判断信号JG通过外部端子T2和外部信号作为数字信号输出 测试器装置获取调整信号并将获取的调节信号存储在预定信号存储部分4中。因此，可以将模拟信号调整为模拟值而不输出到外部，并且可以使用简单的测试装置进行调整测试，并根据 准确快速地进行简单的测试方法。

公开(公告)号：US20030146496A1

公开(公告)日：2003-08-07

申请号：US10376308

申请日：2003-03-03

申请人： FUJITSU, LTD.

发明人： Shunji Nakamura

IPC分类号： H01L029/06

CPC分类号： H01L27/10852 ,  H01L21/76816 ,  H01L27/10814 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device including the steps of: (a) forming an interlayer insulating film over a semiconductor substrate; (b) forming a first mask on the interlayer insulating film, the first mask having a plurality of stripe patterns parallel to a first direction, and etching the interlayer insulating film from a surface thereof to a first intermediate depth to form a groove; and (c) forming a second mask on the interlayer insulating film, the second mask having a plurality of stripe patterns parallel to a second direction crossing the first direction, and etching the interlayer insulating film by a remaining thickness thereof in an area corresponding to the groove and not covered with the second mask to form an opening, and in an area other than the area corresponding to the groove to form a second groove reaching a second intermediate depth from a surface of the interlayer insulating film. With this method, an opening having different cross sectional shapes at different depths can be formed with a smaller number of masks.

公开(公告)号：US20030067975A1

公开(公告)日：2003-04-10

申请号：US10288543

申请日：2002-11-06

申请人： Fujitsu, Ltd.

发明人： Kenichi Yamakura ,  Hideaki Tanishima ,  Fumiaki Uematsu ,  Koji Horibe ,  Manabu Nakano

IPC分类号： H03H007/30 ,  H03K005/159

CPC分类号： G11B20/10009 ,  G11B20/10046 ,  G11B20/18

摘要： A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.

公开(公告)号：US20010041391A1

公开(公告)日：2001-11-15

申请号：US09812815

申请日：2001-03-21

申请人： FUJITSU, LTD.

发明人： Akito Hara ,  Kuninori Kitahara

IPC分类号： H01L021/339 ,  H01L021/84

CPC分类号： H01L21/02686 ,  H01L21/02532 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/66772 ,  H01L29/78654 ,  H01L29/78675 ,  H01L29/78696 ,  Y10T117/1076

摘要： A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.

公开(公告)号：US20010026347A1

公开(公告)日：2001-10-04

申请号：US09759424

申请日：2001-01-12

申请人： FUJITSU LTD.

发明人： Manabu Sawasaki ,  Takashi Takagi ,  Yoji Taniguchi ,  Hiroyasu Inoue ,  Susumu Nakano ,  Tomonori Tanose ,  Naonobu Matsui ,  Kazuyuki Hosokawa ,  Kazuhiko Sumi ,  Masahiro Ikeda ,  Naoshige Itami

IPC分类号： G02F001/1337

CPC分类号： G02F1/133707 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/13394 ,  G02F2001/13712

摘要： A liquid crystal display device of the present invention has a structure in which vertically aligned liquid crystal is sealed between a TFT substrate and a CF substrate. Pixel electrodes in which slits are provided are formed on the TFT substrate, while cell gap holding spacers and domain defining projections are formed on the CF substrate. For example, positive type photoresist is coated on a common electrode. Then, first exposure is executed by using a mask for light-shielding spacer forming regions and projection forming regions, and then second exposure is executed by using a mask for light-shielding the spacer forming regions. Then, the photoresist is developed. Accordingly, the spacers and the projections, each having a different height, can be formed simultaneously.

摘要翻译： 本发明的液晶显示装置具有垂直排列的液晶被密封在TFT基板和CF基板之间的结构。 在TFT基板上形成有设置有狭缝的像素电极，在CF基板上形成单元间隙保持用间隔物和区域限定突起。 例如，在公共电极上涂覆正型光致抗蚀剂。 然后，通过使用遮光间隔物形成区域和投影形成区域的掩模来执行第一曝光，然后通过使用用于遮蔽间隔物形成区域的掩模来执行第二曝光。 然后，显影光致抗蚀剂。 因此，可以同时形成各自具有不同高度的间隔件和突起。