CAVITY PACKAGES
    81.
    发明申请

    公开(公告)号:US20210134689A1

    公开(公告)日:2021-05-06

    申请号:US17146304

    申请日:2021-01-11

    IPC分类号: H01L23/10 H01L23/66 H01L23/04

    摘要: An integrated device package is disclosed. The integrated device package can include an integrated device die, an element, a cavity, and an electrical interconnect. The element can have an antenna structure. The element can be attached to a surface of the integrated device. The cavity can be disposed between the integrated device die and the antenna structure. The electrical interconnect can connect the integrated device die and the antenna structure.

    DBI to Si bonding for simplified handle wafer

    公开(公告)号:US10964664B2

    公开(公告)日:2021-03-30

    申请号:US16386261

    申请日:2019-04-17

    摘要: Devices and techniques include process steps for preparing various microelectronic components for bonding, such as for direct bonding without adhesive. The processes include providing a first bonding surface on a first surface of the microelectronic components, bonding a handle to the prepared first bonding surface, and processing a second surface of the microelectronic components while the microelectronic components are gripped at the handle. In some embodiments, the processes include removing the handle from the first bonding surface, and directly bonding the microelectronic components at the first bonding surface to other microelectronic components.

    Die tray with channels
    84.
    发明授权

    公开(公告)号:US10796936B2

    公开(公告)日:2020-10-06

    申请号:US15806822

    申请日:2017-11-08

    摘要: Representative implementations of devices and techniques provide a device and a technique for processing integrated circuit (IC) dies. The device comprises a die tray (such as a pick and place tray, for example) for holding the dies during processing. The die tray may include an array of pockets sized to hold individual dies. The technique can include loading dies on the die tray, cleaning the top and bottom surfaces of the dies, and ashing and activating both surfaces of the dies while on the die tray, eliminating the need to turn the dies over during processing.

    Die processing
    86.
    发明授权

    公开(公告)号:US10714449B2

    公开(公告)日:2020-07-14

    申请号:US16515588

    申请日:2019-07-18

    摘要: Representative implementations provide techniques and systems for processing integrated circuit (IC) dies. Dies being prepared for intimate surface bonding (to other dies, to substrates, to another surface, etc.) may be processed with a minimum of handling, to prevent contamination of the surfaces or the edges of the dies. The techniques include processing dies while the dies are on a dicing sheet or other device processing film or surface. Systems include integrated cleaning components arranged to perform multiple cleaning processes simultaneously.

    BOND ENHANCEMENT IN MICROELECTRONICS BY TRAPPING CONTAMINANTS AND ARRESTING CRACKS DURING DIRECT-BONDING PROCESSES

    公开(公告)号:US20200075520A1

    公开(公告)日:2020-03-05

    申请号:US16553535

    申请日:2019-08-28

    IPC分类号: H01L23/00

    摘要: Structures and techniques provide bond enhancement in microelectronics by trapping contaminants and byproducts during bonding processes, and arresting cracks. Example bonding surfaces are provided with recesses, sinks, traps, or cavities to capture small particles and gaseous byproducts of bonding that would otherwise create detrimental voids between microscale surfaces being joined, and to arrest cracks. Such random voids would compromise bond integrity and electrical conductivity of interconnects being bonded. In example systems, a predesigned recess space or predesigned pattern of recesses placed in the bonding interface captures particles and gases, reducing the formation of random voids, thereby improving and protecting the bond as it forms. The recess space or pattern of recesses may be placed where particles collect on the bonding surface, through example methods of determining where mobilized particles move during bond wave propagation. A recess may be repeated in a stepped reticule pattern at the wafer level, for example, or placed by an aligner or alignment process.

    SYSTEMS AND METHODS FOR EFFICIENT TRANSFER OF SEMICONDUCTOR ELEMENTS

    公开(公告)号:US20200043910A1

    公开(公告)日:2020-02-06

    申请号:US16599744

    申请日:2019-10-11

    摘要: Systems and methods for efficient transfer of elements are disclosed. A film which supports a plurality of diced integrated device dies can be provided. The plurality of diced integrated device dies can be disposed adjacent one another along a surface of the film. The film can be positioned adjacent the support structure such that the surface of the film faces a support surface of the support structure. The film can be selectively positioned laterally relative to the support structure such that a selected first die is aligned with a first location of the support structure. A force can be applied in a direction nonparallel to the surface of the film to cause the selected first die to be directly transferred from the film to the support structure.