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    Four terminal non-volatile transistor device
    73.
    发明授权
    Four terminal non-volatile transistor device 有权
    四端子非易失性晶体管器件

    公开(公告)号：US07075141B2

    公开(公告)日：2006-07-11

    申请号：US10811191

    申请日：2004-03-26

    申请人： Thomas Rueckes ,  Brent M. Segal ,  Bernard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

    发明人： Thomas Rueckes ,  Brent M. Segal ,  Bernard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

    IPC分类号： H01L27/10 ,  H01L29/788

    CPC分类号： G11C23/00 ,  B82Y10/00 ,  G11C13/025 ,  G11C16/0416 ,  G11C2213/17 ,  H01L27/115 ,  H01L29/7881 ,  Y10S977/708 ,  Y10S977/932

    摘要： A four terminal non-volatile transistor device. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and each in electrical communication with a respective terminal. A channel region of a second semiconductor type of material is disposed between the source and drain region. A floating gate structure is made of at least one of semiconductive or conductive material and is disposed over the channel region. A control gate is made of at least one of semiconductive or conductive material and is in electrical communication with a respective terminal. An electromechanically-deflectable nanotube switching element is in electrical communication with one of the floating gate structure and the control gate structure, and is positioned to be electromechanically deflectable into contact with the other of the floating gate structure and the control gate structure. When the nanotube switching element is in communication with both the control gate and the floating gate, the control gate may be used to modulate the conductivity of the channel region. The nanotube switching element may be formed from a porous fabric of a monolayer of single-walled carbon nanotubes. Under certain embodiments, the nanotube article is suspended vertically in relation to the horizontal substrate. Under certain embodiments, a release gate and release node are positioned in spaced relation to the nanotube switching element, and, in response to a signal on the release node, the release gate electromechanically deflects the nanotube switching element out of contact with the one of the control gate and floating gate. Under certain embodiments, the contact between the nanotube switching element and the one of the control gate and floating gate is a non-volatile state. Under certain embodiments, the device occupies an area of 8F2.

    摘要翻译： 四端非易失性晶体管器件。 非挥发性晶体管器件包括第一半导体类型的材料的源极区域和漏极区域，并且各自与相应的端子电连通。 第二半导体类型的材料的沟道区域设置在源区和漏区之间。 浮栅结构由半导体或导电材料中的至少一种制成，并且设置在沟道区域上。 控制门由半导体或导电材料中的至少一种制成，并与相应的端子电连通。 机电可偏转的纳米管开关元件与浮动栅极结构和控制栅极结构中的一个电连通，并且被定位成机电可偏转地与浮动栅极结构和控制栅极结构中的另一个接触。 当纳米管开关元件与控制栅极和浮置栅极两者连通时，控制栅极可用于调制沟道区的导电性。 纳米管切换元件可以由单壁碳纳米管单层的多孔织物形成。 在某些实施例中，纳米管制品相对于水平基底垂直悬挂。 在某些实施例中，释放栅极和释放节点以与纳米管开关元件隔开的关系定位，并且响应于释放节点上的信号，释放门电磁机械地使纳米管开关元件偏转与 控制门和浮动门。 在某些实施例中，纳米管开关元件与控制栅极和浮置栅极之间的接触是非易失性状态。 在某些实施例中，该装置占据8F 2的面积。

    Isolation structure for deflectable nanotube elements
    76.
    发明申请
    Isolation structure for deflectable nanotube elements 有权
    可偏转纳米管元件的隔离结构

    公开(公告)号：US20050035344A1

    公开(公告)日：2005-02-17

    申请号：US10917606

    申请日：2004-08-13

    申请人： Claude Bertin ,  Thomas Rueckes ,  Brent Segal

    发明人： Claude Bertin ,  Thomas Rueckes ,  Brent Segal

    IPC分类号： G11C13/02 ,  H01H1/027 ,  H01H59/00 ,  H01L27/28 ,  H01L29/06 ,  H01L29/73 ,  H01L29/78 ,  H01L51/30

    CPC分类号： H01L29/0665 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  H01H1/0094 ,  H01H1/027 ,  H01H2001/0005 ,  H01L27/28 ,  H01L29/0673 ,  H01L29/73 ,  H01L29/78 ,  H01L51/0048 ,  H01L51/0508 ,  Y10S977/94 ,  Y10S977/943

    摘要： Nanotube-based switching elements and logic circuits. Under one embodiment of the invention, a switching element includes an input node, an output node, a nanotube channel element having at least one electrically conductive nanotube, and a control electrode. The control electrode is disposed in relation to the nanotube channel element to controllably form an electrically conductive channel between the input node and the output node. The channel at least includes said nanotube channel element. The output node is constructed and arranged so that channel formation is substantially unaffected by the electrical state of the output node. Under another embodiment of the invention, the control electrode is arranged in relation to the nanotube channel element to form said conductive channel by causing electromechanical deflection of said nanotube channel element. Under another embodiment of the invention, the output node includes an isolation structure disposed in relation to the nanotube channel element so that channel formation is substantially invariant from the state of the output node. Under another embodiment of the invention, the isolation structure includes electrodes disposed on opposite sides of the nanotube channel element and said electrodes produce substantially the same electric field. Under another embodiment of the invention, a Boolean logic circuit includes at least one input terminal and an output terminal, and a network of nanotube switching elements electrically disposed between said at least one input terminal and said output terminal. The network of nanotube switching elements effectuates a Boolean function transformation of Boolean signals on said at least one input terminal. The Boolean function transformation includes a Boolean inversion within the function, such as a NOT or NOR function.

    摘要翻译： 基于纳米管的开关元件和逻辑电路。 在本发明的一个实施例中，开关元件包括输入节点，输出节点，具有至少一个导电纳米管的纳米管通道元件和控制电极。 控制电极相对于纳米管通道元件设置，以在输入节点和输出节点之间可控制地形成导电通道。 通道至少包括所述纳米管通道元件。 输出节点的构造和布置使得通道形成基本上不受输出节点的电气状态的影响。 在本发明的另一实施例中，控制电极相对于纳米管通道元件布置，以通过引起所述纳米管通道元件的机电偏转而形成所述导电通道。 在本发明的另一个实施例中，输出节点包括相对于纳米管通道元件设置的隔离结构，使得通道形成从输出节点的状态基本上是不变的。 在本发明的另一个实施例中，隔离结构包括设置在纳米管通道元件的相对侧上的电极，所述电极产生基本上相同的电场。 在本发明的另一个实施例中，布尔逻辑电路包括至少一个输入端子和输出端子，以及电气地布置在所述至少一个输入端子和所述输出端子之间的纳米管开关元件网络。 纳米管切换元件的网络在所述至少一个输入端上实现布尔信号的布尔函数变换。 布尔函数变换包括函数内的布尔反转，如NOT或NOR函数。

    Three dimensional (3D) memories with multiple resistive change elements per cell and corresponding architectures for in-memory computing
    77.
    发明授权
    Three dimensional (3D) memories with multiple resistive change elements per cell and corresponding architectures for in-memory computing 有权

    公开(公告)号：US12068029B2

    公开(公告)日：2024-08-20

    申请号：US18370541

    申请日：2023-09-20

    申请人： Nantero, Inc.

    发明人： Claude L. Bertin

    IPC分类号： G11C11/00 ,  G11C13/02 ,  H10K10/50 ,  H10K19/00 ,  H10K85/20

    CPC分类号： G11C13/025 ,  H10K10/50 ,  H10K19/202 ,  H10K85/221

    摘要： The present disclosure generally relates to multi-switch storage cells (MSSCs), three-dimensional MSSC arrays, and three-dimensional MSSC memory. Multi-switch storage cells include a cell select device, multiple resistive change elements, and an intracell wiring electrically connecting the multiple resistive change elements together and to the cell select device. MSSC arrays are designed (architected) and operated to prevent inter-cell (sneak path) currents between multi-switch storage cells, which prevents stored data disturb from adjacent cells and adjacent cell data pattern sensitivity. Additionally, READ and WRITE operations may be performed on one of the multiple resistive change elements in a multi-switch storage cell without disturbing the stored data in the remaining resistive change elements. However, controlled parasitic currents may flow in the remaining resistive change elements within the cell. Isolating each multi-switch storage cell in a three-dimensional MSSC array, enables in-memory computing for applications such as data processing for machine learning and artificial intelligence.

    Three Dimensional (3D) Memories with Multiple Resistive Change Elements per Cell and Corresponding Architectures
    78.
    发明公开
    Three Dimensional (3D) Memories with Multiple Resistive Change Elements per Cell and Corresponding Architectures 审中-公开

    公开(公告)号：US20230142173A1

    公开(公告)日：2023-05-11

    申请号：US17519828

    申请日：2021-11-05

    申请人： Nantero, Inc.

    发明人： Claude L. Bertin

    IPC分类号： G11C13/02 ,  H01L27/28 ,  H01L51/00 ,  H01L51/05

    CPC分类号： G11C13/025 ,  H01L27/285 ,  H01L51/0048 ,  H01L51/0591

    摘要： The present disclosure generally relates to multi-switch storage cells (MSSCs), three-dimensional MSSC arrays, and three-dimensional MSSC memory. Multi-switch storage cells include a cell select device, multiple resistive change elements, and an intracell wiring electrically connecting the multiple resistive change elements together and to the cell select device. MSSC arrays are designed (architected) and operated to prevent inter-cell (sneak path) currents between multi-switch storage cells, which prevents stored data disturb from adjacent cells and adjacent cell data pattern sensitivity. Additionally, READ and WRITE operations may be performed on one of the multiple resistive change elements in a multi-switch storage cell without disturbing the stored data in the remaining resistive change elements. However, controlled parasitic currents may flow in the remaining resistive change elements within the cell. Isolating each multi-switch storage cell in a three-dimensional MSSC array, enables in-memory computing for applications such as data processing for machine learning and artificial intelligence.

    Electrostatic discharge protection devices using carbon-based diodes
    79.
    发明授权
    Electrostatic discharge protection devices using carbon-based diodes 有权

    公开(公告)号：US11387277B2

    公开(公告)日：2022-07-12

    申请号：US16915414

    申请日：2020-06-29

    申请人： Nantero, Inc.

    发明人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  C. Rinn Cleavelin

    IPC分类号： H01L27/28 ,  G11C13/00 ,  H01L51/00 ,  H01L45/00 ,  H01L51/05 ,  H01L27/24 ,  H01L29/02

    摘要： The present disclosure is directed toward carbon based diodes, carbon based resistive change memory elements, resistive change memory having resistive change memory elements and carbon based diodes, methods of making carbon based diodes, methods of making resistive change memory elements having carbon based diodes, and methods of making resistive change memory having resistive change memory elements having carbons based diodes. The carbon based diodes can be any suitable type of diode that can be formed using carbon allotropes, such as semiconducting single wall carbon nanotubes (s-SWCNT), semiconducting Buckminsterfullerenes (such as C60 Buckyballs), or semiconducting graphitic layers (layered graphene). The carbon based diodes can be pn junction diodes, Schottky diodes, other any other type of diode formed using a carbon allotrope. The carbon based diodes can be placed at any level of integration in a three dimensional (3D) electronic device such as integrated with components or wiring layers.