公开(公告)号：US20020181475A1

公开(公告)日：2002-12-05

申请号：US09874904

申请日：2001-06-04

Inventor： Jason Dove ,  Brian Semple ,  Andre Tanguay ,  James Lotz

IPC: H04L012/56

CPC classification number: H04L49/3081 ,  H04J2203/0025 ,  H04J2203/0089 ,  H04L49/205 ,  H04L49/25 ,  H04L49/30 ,  H04L49/552 ,  H04L2012/5662

Abstract: Traffic is transported within a system in the form of TDM packets. These packets are generated at source line units and transported from the line units to a switch. The switch routes the packets to appropriate target line units based on information contained within the packet. At the switch, packets from the source line units may be merged. A gather function relies on each of the line units sourcing packets to exclusively drive lines at software-assigned timeslots within the packet. The switch performs a simple OR function of each byte in merging the packet payloads.

Abstract translation: 业务以TDM数据包的形式在系统内传输。 这些分组在源线单元处生成并从线路单元传送到交换机。 交换机根据数据包中包含的信息将数据包路由到适当的目标行单元。 在交换机处，来自源行单元的数据包可能被合并。 收集功能依赖于源数据包的每个线路单元，在数据包内的软件分配时隙中独占地驱动线路。 交换机在合并分组有效载荷时执行每个字节的简单OR功能。

公开(公告)号：US06456596B2

公开(公告)日：2002-09-24

申请号：US09281138

申请日：1999-03-29

Applicant: Andrew J Barker

Inventor： Andrew J Barker

IPC: H04J316

CPC classification number: H04J3/08 ,  H04J2203/0025 ,  H04J2203/0042 ,  H04J2203/0053 ,  H04J2203/006 ,  H04J2203/0067

Abstract: In a digital telecommunications system having data packages carrying identification data, the identification data is characterized in that it is unique to the package within a station and does not depend on the identity of the originating station.

Abstract translation: 在具有携带识别数据的数据包的数字电信系统中，识别数据的特征在于它对于站内的包装是唯一的，并且不依赖于始发站的身份。

公开(公告)号：US20020097737A1

公开(公告)日：2002-07-25

申请号：US09987999

申请日：2001-11-16

Applicant: ALCATEL

Inventor： Giovanni Traverso ,  Orsola Pais Golin ,  Luca Razzetti ,  Lucia Bianchi ,  Santo Maggio

IPC: H04L012/28

CPC classification number: H04Q11/04 ,  H04J3/0685 ,  H04J3/0688 ,  H04J3/1611 ,  H04J2203/0012 ,  H04J2203/0025 ,  H04J2203/006 ,  H04Q2213/13003 ,  H04Q2213/1302 ,  H04Q2213/1304 ,  H04Q2213/13174 ,  H04Q2213/13178 ,  H04Q2213/13216 ,  H04Q2213/13322 ,  H04Q2213/1336 ,  H04Q2213/13367

Abstract: Improved interface system for synchronous hierarchy telecommunication networks, in particular SDH networks, comprising a high frequency backpanel function, said system comprising at least a central board and one or more input/output peripheral board apt to exchange data frames and control bytes. According to the invention, the data frames contain control bytes and said data frames are bitwise converted before being exchanged between the peripheral boards and the central board.

Abstract translation: 改进的用于同步分层电信网络的接口系统，特别是包括高频背板功能的SDH网络，所述系统至少包括一个中央板和一个或多个输入/输出外设板，以便交换数据帧和控制字节。 根据本发明，数据帧包含控制字节，并且所述数据帧在外围板和中央板之间交换之前被逐位转换。

公开(公告)号：US06356550B1

公开(公告)日：2002-03-12

申请号：US09364722

申请日：1999-07-30

Applicant: Kevin Wayne Williams

Inventor： Kevin Wayne Williams

IPC: H04L1250

CPC classification number: H04Q11/0478 ,  H04J2203/0025

Abstract: A SONET bus has a set of SONET mappers that transmit and receive facility signals on facility lines. Each facility line operates at a predetermined speed. Each SONET mapper generates a SONET signal by mapping the facility signals received by the SONET mapper into a predefined format for transmission. The predefined format includes timeslots associated with each received facility signal. Each SONET mapper receives a SONET signal and maps the received SONET signal into the facility signals transmitted by the SONET mapper on the facility lines. Each SONET signal includes an associated set of the facility signals. At least one counter outputs a timeslot count signal for synchronizing the timeslots of the facility signals. A set of bidirectional drivers has a mapper side and a system side. Each bidirectional driver receives the timeslot count signal. A first set of interconnections separately couples each bidirectional driver at the mapper side to at least one SONET mapper of the set of SONET mappers, such that each bidirectional driver receives the SONET signal generated by at least one SONET mapper and transmits the SONET signal received by at least one SONET mapper. A second set of interconnections couples the bidirectional drivers to each other at the system side. The bidirectional drivers transmit one or more of the facility signals via the second set of interconnections by extracting the one or more facility signals from the SONET signals generated by the SONET mappers in accordance with the timeslot count signal and the predefined format.

Abstract translation: SONET总线具有一组在设备线路上发送和接收设备信号的SONET映射器。 每个设备线以预定速度运行。 每个SONET映射器通过将由SONET映射器接收的设施信号映射到预定格式进行发送来产生SONET信号。 预定格式包括与每个接收到的设施信号相关联的时隙。 每个SONET映射器接收SONET信号，并将接收到的SONET信号映射到由设备线上的SONET映射器发送的设备信号。 每个SONET信号包括一组相关的设施信号。 至少一个计数器输出用于同步设备信号的时隙的时隙计数信号。 一组双向驱动程序具有映射器端和系统端。 每个双向驱动器接收时隙计数信号。 第一组互连将映射器侧的每个双向驱动器分别耦合到SONET映射器组的至少一个SONET映射器，使得每个双向驱动器接收由至少一个SONET映射器生成的SONET信号，并且发送由SONET映射器接收的SONET信号 至少有一个SONET映射器。 第二组互连在系统侧将双向驱动器彼此耦合。 双向驱动器通过从SONET映射器根据时隙计数信号和预定义格式产生的SONET信号中提取一个或多个设备信号，经由第二组互连传输设备信号中的一个或多个。

公开(公告)号：US09525509B2

公开(公告)日：2016-12-20

申请号：US13781959

申请日：2013-03-01

Applicant: FUJITSU LIMITED

Inventor： Hidetaka Kawahara ,  Junichi Sugiyama ,  Wataru Odashima ,  Shota Shinohara ,  Hiroyuki Homma

IPC: H04B7/212 ,  H04J14/08 ,  H04J3/16

CPC classification number: H04J14/08 ,  H04J3/1652 ,  H04J2203/0012 ,  H04J2203/0025 ,  H04J2203/0096

Abstract: A data transmission device where a low-speed signal transmission frame is included in time slots of a high-speed signal transmission frame and a number of the time slots to include the low-speed signal transmission frame is variable, wherein the time slots have respective time slot numbers, includes a storage unit storing signal data of the high-speed signal transmission frame corresponding to the number of the time slots based on a time slot number basis, wherein the signal data of the high-speed signal transmission frame are supplied on the time slot number basis; and a selection and output unit selecting and sequentially outputting the signal data on the time slot number basis, wherein the signal data have been stored in accordance with the number of the time slots.

Abstract translation: 在高速信号传输帧的时隙中包括低速信号传输帧的数据传输设备和包括低速信号传输帧的时隙数量是可变的，其中时隙具有相应的 时隙号包括存储单元，其基于时隙数基准存储对应于时隙数量的高速信号传输帧的信号数据，其中提供高速信号传输帧的信号数据 时隙数基础; 以及选择和输出单元，以时隙号为基础选择并依次输出信号数据，其中根据时隙的数量已经存储了信号数据。

公开(公告)号：US09276690B2

公开(公告)日：2016-03-01

申请号：US13393964

申请日：2010-04-06

Applicant: Dong Wang ,  Yan Yuan

Inventor： Dong Wang ,  Yan Yuan

IPC: H04B10/00 ,  H04J14/00 ,  H04J3/16 ,  H04J14/02

CPC classification number: H04J3/1652 ,  H04J14/0212 ,  H04J14/0293 ,  H04J14/0297 ,  H04J2203/0012 ,  H04J2203/0025 ,  H04J2203/0026 ,  H04J2203/0073

Abstract: The present invention discloses a distributed electrical cross apparatus, and a system and method for the distributed electrical cross apparatus implementing an SNC cascade protection. The apparatus includes a backboard and at least four single-boards integrated with electrical cross units, wherein the single-boards are inserted in the limited number of slots in the backboard, and these single-boards also set line-side service access units, client-side service access units and backboard access units. The present invention has both accessing of line-side services and accessing of client-side services in the same single-board, access and flexible scheduling of various services such as line-side services and client-side services and so on are implemented on the backboard with limited number of slots, and the function of the distributed electrical cross system processing various services is increased in the case of low cost.

Abstract translation: 本发明公开了一种分布式电交叉装置，以及实现SNC级联保护的分布式交叉装置的系统和方法。 该装置包括背板和至少四个与电叉交叉单元集成的单板，其中单板插入在背板中的有限数量的槽中，并且这些单板还设置线路侧服务访问单元，客户端 服务接入单元和背板接入单元。 本发明在线路侧业务的访问以及客户端业务的访问方面，在同一单板，接入和灵活调度诸如线路侧业务和客户端业务等各种业务的同时， 在具有有限数量的插槽的背板上，并且在低成本的情况下，分布式电交叉系统处理各种服务的功能增加。

公开(公告)号：US07656891B1

公开(公告)日：2010-02-02

申请号：US10912766

申请日：2004-08-04

Applicant: Juan-Carlos Calderon ,  Soowan Suh ,  Jing Ling ,  Jean-Michel Caia ,  Alejandro Lenero Beracoechea

Inventor： Juan-Carlos Calderon ,  Soowan Suh ,  Jing Ling ,  Jean-Michel Caia ,  Alejandro Lenero Beracoechea

IPC: H04B7/212

CPC classification number: H04J3/1611 ,  H04J2203/0025 ,  H04J2203/0094 ,  H04J2203/0096

Abstract: A method and apparatus for processing at least two types of payloads received at varying intervals in a communications network using a single processing path is provided. The two types of payloads may include virtually and contiguously concatenated payloads according to SONET/SHD architecture. The method comprises interleaving data in a predetermined format and controlling distribution of the data irrespective of the format received such that the data can be processed at the destination and passed to downstream components.

Abstract translation: 提供一种用于处理在使用单个处理路径的通信网络中以不同间隔接收的至少两种类型的有效载荷的方法和装置。 两种类型的有效载荷可以包括根据SONET / SHD架构的虚拟和连续的级联有效载荷。 该方法包括以预定格式交织数据并且控制数据的分配，而不管所接收的格式如何，使得可以在目的地处理数据并将其传递到下游分量。

公开(公告)号：US20090141719A1

公开(公告)日：2009-06-04

申请号：US12272609

申请日：2008-11-17

Applicant: Subhash C. Roy ,  David K. Toebes ,  Michael M. Renault ,  Steven E. Benoit ,  Igor Zhovnirovsky ,  Daniel C. Upp ,  William B. Lipp

Inventor： Subhash C. Roy ,  David K. Toebes ,  Michael M. Renault ,  Steven E. Benoit ,  Igor Zhovnirovsky ,  Daniel C. Upp ,  William B. Lipp

IPC: H04L12/56

CPC classification number: H04L12/6402 ,  H04J3/0682 ,  H04J3/0685 ,  H04J3/0688 ,  H04J2203/0025 ,  H04J2203/0026 ,  H04L7/10 ,  H04L2012/6413

Abstract: Methods, systems, and apparatuses related to a communication switch are disclosed herein. In some embodiments, the communication switch may be configured to transmit TDM, ATM and/or packet data from an ingress service processor, through a plurality of switch elements, to an egress service processor. Other embodiments may be described and claimed.

Abstract translation: 本文公开了与通信开关相关的方法，系统和装置。 在一些实施例中，通信交换机可以被配置为将TDM，ATM和/或分组数据从入口服务处理器通过多个交换元件发送到出口服务处理器。 可以描述和要求保护其他实施例。

公开(公告)号：US07508752B1

公开(公告)日：2009-03-24

申请号：US10449500

申请日：2003-05-30

Applicant: Darrell Heflin

Inventor： Darrell Heflin

IPC: H04L12/28

CPC classification number: H04J3/14 ,  H04J2203/0025 ,  H04J2203/006

Abstract: Techniques for switching facilities in cross-connect systems are provided. Redundant line cards can determine line card path status and insert the path status into the associated data stream. A switch matrix can analyze the path status of the redundant line cards in hardware and switch the selected line card based on which line is providing the best performance. Additionally, consecutive path status information can be analyzed before switching line cards.

Abstract translation: 提供交叉连接系统中交换设备的技术。 冗余线卡可以确定线路卡路径状态，并将路径状态插入关联的数据流。 开关矩阵可以分析硬件中冗余线路卡的路径状态，并根据哪一行提供最佳性能来切换所选择的线路卡。 另外，在切换线路卡之前，可以分析连续路径状态信息。

公开(公告)号：US07428249B2

公开(公告)日：2008-09-23

申请号：US11375056

申请日：2006-03-15

Applicant: Luca R. Diaconescu ,  Ronald J. Gagnon

Inventor： Luca R. Diaconescu ,  Ronald J. Gagnon

IPC: H04J3/06 ,  G06F11/10

CPC classification number: H04J3/14 ,  H04J3/0623 ,  H04J2203/0025 ,  H04J2203/006 ,  H04J2203/0096

Abstract: A system for performing Bit Interleaved Parity-8 (BIP-8) computation on large concatenated payloads, in a processing node of an optical communications networks. The BIP-8 computation system comprises storage means associated with each processing strip for allowing the comparison between calculated and transmitted frame error check values to be delayed.

Abstract translation: 一种用于在光通信网络的处理节点中对大级联有效载荷执行比特交错奇偶校验8（BIP-8）计算的系统。 BIP-8计算系统包括与每个处理条相关联的存储装置，用于允许计算和发送的帧错误校验值之间的比较被延迟。