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公开(公告)号：US09780048B1
公开(公告)日：2017-10-03
申请号：US15227919
申请日：2016-08-03
Applicant: QUALCOMM Incorporated
Inventor： David Francis Berdy , Changhan Hobie Yun , Chengjie Zuo , Niranjan Sunil Mudakatte , Mario Francisco Velez , Shiqun Gu , Jonghae Kim
CPC classification number: H01L23/66 , H01L23/5384 , H01L23/642 , H01L23/645 , H01L24/13 , H01L24/45 , H01L25/18 , H01L25/50 , H01L2224/48195 , H01L2924/14 , H01L2924/19042 , H01L2924/19105 , H05K1/0243 , H05K1/025 , H05K1/141
Abstract: An integrated circuit device includes a first substrate having a ground plane. The integrated circuit device also includes a second substrate. The second substrate has a first layer of passive devices. The passive devices include at least one inductor on a first side of the second substrate. The first layer of passive devices is substantially orthogonal to the ground plane and the second substrate supported by the first substrate. An inductor magnetic field is substantially parallel to the ground plane.
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52.发明授权公开(公告)号：US09773862B2
公开(公告)日：2017-09-26
申请号：US15375137
申请日：2016-12-11
Applicant: QUALCOMM Incorporated
Inventor： Changhan Hobie Yun , Daeik Daniel Kim , Chengjie Zuo , Jonghae Kim , Mario Francisco Velez , Donald William Kidwell, Jr. , Jon Bradley Lasiter , Kwan-Yu Lai , Jitae Kim , Ravindra Vaman Shenoy
IPC: H01L21/4763 , H01L49/02 , H01L27/08 , H01L23/48 , H01L21/28 , H01L21/768
CPC classification number: H01L28/90 , H01G4/012 , H01G4/33 , H01L21/28282 , H01L21/486 , H01L21/76898 , H01L23/481 , H01L23/5223 , H01L27/0805 , H01L27/12 , H01L28/60 , H01L2924/0002 , H01L2924/00
Abstract: Provided are space-efficient capacitors that have a higher quality factor than conventional designs and improve coupling of electrical energy from a through-glass via (TGV) to a dielectric. For example, provided is a TGV having a non-rectangular cross-section, where one end of the TGV is coupled to a first metal plate. A dielectric material is formed on the first metal plate. A second metal plate is formed on the dielectric material in a manner that overlaps at least a portion of the first metal plate to form at least one overlapped region of the dielectric material. At least a part of the perimeter of the overlapped region is non-planar. The overlapped region can be formed in a shape of a closed ring, in a plurality of portions of a ring shape, in substantially a quarter of a ring shape, and/or in substantially a half of a ring shape.
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公开(公告)号：US09660110B2
公开(公告)日：2017-05-23
申请号：US14498359
申请日：2014-09-26
Applicant: QUALCOMM Incorporated
Inventor： Daeik Daniel Kim , Jonghae Kim , Chengjie Zuo , Sang-June Park , Changhan Hobie Yun , Mario Francisco Velez , David Francis Berdy , Matthew Michael Nowak , Robert Paul Mikulka
CPC classification number: H01L29/93 , H01L27/0629 , H01L29/94
Abstract: An apparatus includes a varactor having a first contact that is located on a first side of a substrate. The varactor includes a second contact that is located on a second side of the substrate, and the second side is opposite the first side. The apparatus further includes a signal path between the first contact and the second contact.
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公开(公告)号：US20170141756A1
公开(公告)日：2017-05-18
申请号：US15137662
申请日：2016-04-25
Applicant: QUALCOMM Incorporated
Inventor： Changhan Hobie Yun , Chengjie Zuo , Daeik Daniel Kim , Mario Francisco Velez , Niranjan Sunil Mudakatte , Je-Hsiung Jeffrey Lan , David Francis Berdy , Yunfei Ma , Robert Paul Mikulka , Jonghae Kim
CPC classification number: H03H9/542 , H01F17/0013 , H01F2017/002 , H01F2017/0026 , H03H3/02 , H03H3/08 , H03H7/0123 , H03H7/461 , H03H9/0547 , H03H9/0557 , H03H9/0561 , H03H9/1014 , H03H9/1071 , H03H9/64 , H05K1/0306 , H05K1/185 , H05K3/0014 , H05K3/4602
Abstract: A device includes an acoustic resonator embedded within an encapsulating structure that at least partially encapsulates the acoustic resonator. The device includes an inductor electrically connected to the acoustic resonator. At least a portion of the inductor is embedded in the encapsulating structure.
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公开(公告)号：US20170133996A1
公开(公告)日：2017-05-11
申请号：US14936998
申请日：2015-11-10
Applicant: QUALCOMM Incorporated
Inventor： Daeik Daniel Kim , Chengjie Zuo , David Francis Berdy , Changhan Hobie Yun , Mario Francisco Velez , Jonghae Kim
CPC classification number: H03H7/0115 , H01L23/66 , H01L25/0657 , H01L25/18 , H01L28/10 , H01L28/40 , H01L2223/6677 , H01L2224/14181 , H01L2224/16145 , H01L2224/16227 , H01L2224/16265 , H01L2225/06513 , H01L2225/06541 , H03H7/1766 , H03H7/1775
Abstract: A circuit includes a localized metal-insulator-metal (MIM) capacitor array in a radio frequency (RF) front end circuit, which is integrated on a first die, and includes a localized common shared ground node within the localized MIM capacitor array, a plurality of inductors, and a plurality of RF filters. Each of the plurality of RF filters includes a plurality of passive resonant frequency circuits, and each of the plurality of passive resonant frequency circuits is implemented utilizing one or more MIM capacitors in the localized MIM capacitor array, and one or more of the plurality of inductors. The plurality of inductors may be arranged at a periphery of the localized MIM capacitor array on the first die or integrated on a second die, which is coupled to the first die. Each of the MIM capacitors in the localized MIM capacitor array has a different capacitance value.
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Patent Agency Ranking
公开(公告)号：US20170077079A1
公开(公告)日：2017-03-16
申请号：US14853701
申请日：2015-09-14
Applicant: QUALCOMM Incorporated
Inventor： Je-Hsiung Jeffrey Lan , Niranjan Sunil Mudakatte , Changhan Hobie Yun , Daeik Daniel Kim , Chengjie Zuo , David Francis Berdy , Mario Francisco Velez , Jonghae Kim
CPC classification number: H01L27/01 , H01L21/4846 , H01L23/15 , H01L23/49816 , H01L23/49822 , H01L23/5223 , H01L23/5227 , H01L28/10 , H01L28/75 , H01L2224/11
Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.
Abstract translation: 一种装置包括玻璃基板和电容器。 电容器包括耦合到第一电极的第一金属，电介质结构和包括电容器的第二电极的通孔结构。 第一金属结构通过电介质结构与通孔结构分离。
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57.发明授权Asymmetric unbalanced acoustically coupled resonators for spurious mode suppression 有权非对称不平衡声耦合谐振器，用于杂散模式抑制公开(公告)号：US09461614B2
公开(公告)日：2016-10-04
申请号：US14067908
申请日：2013-10-30
Applicant: QUALCOMM Incorporated
Inventor： Changhan Hobie Yun , Chengjie Zuo , Mario Francisco Velez , Daeik Daniel Kim , Jonghae Kim
IPC: H01L41/047 , H03H9/17 , H03H9/02 , H03H9/13 , H03H9/56
CPC classification number: H03H9/17 , H01L41/047 , H03H9/02157 , H03H9/13 , H03H9/56
Abstract: A resonator includes a piezoelectric core, a set of electrodes, and at least one ground terminal. The electrodes are arranged on the piezoelectric core and also includes at least one input electrode having a first width and at least one output electrode having a second width that differs from the first width. The ground terminal is also on the piezoelectric core.
Abstract translation: 谐振器包括压电芯，一组电极和至少一个接地端子。 电极布置在压电芯上，并且还包括具有第一宽度的至少一个输入电极和具有不同于第一宽度的第二宽度的至少一个输出电极。 接地端子也在压电铁芯上。
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公开(公告)号：US09379686B2
公开(公告)日：2016-06-28
申请号：US14196355
申请日：2014-03-04
Applicant: QUALCOMM Incorporated
Inventor： Changhan Hobie Yun , Chengjie Zuo , Jonghae Kim , Mario Francisco Velez , Daeik Daniel Kim , Rick Allen Wilcox
CPC classification number: H03H9/02448 , H03H3/02 , H03H9/02133 , H03H9/02228 , H03H9/02244 , H03H9/132 , H03H9/133 , H03H9/15 , H03H9/462 , H03H9/54 , H03H2003/027
Abstract: An integrated circuit device includes a piezoelectric substrate having a first surface and a second surface opposite the first surface. The device also includes a first electrode and a second electrode on the first surface of the piezoelectric substrate, the first electrode having a first width and the second electrode having a second width. The device further includes a third electrode and a fourth electrode on the second surface of the piezoelectric substrate, the third electrode having a third width that is substantially the same as the second width, and the fourth electrode having a fourth width that is substantially the same as the first width. The first and third electrodes operate as part of a first portion of a microelectromechanical systems (MEMS) resonator, and the second and fourth electrodes operate as part of a second portion of the MEMS resonator.
Abstract translation: 集成电路装置包括具有第一表面和与第一表面相对的第二表面的压电基片。 该装置还包括在压电基片的第一表面上的第一电极和第二电极，第一电极具有第一宽度，第二电极具有第二宽度。 该装置还包括在压电基片的第二表面上的第三电极和第四电极，第三电极具有与第二宽度基本相同的第三宽度，第四电极具有基本相同的第四宽度 作为第一宽度。 第一和第三电极作为微机电系统（MEMS）谐振器的第一部分的一部分工作，第二和第四电极作为MEMS谐振器的第二部分的一部分工作。
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59.发明申请METAL-INSULATOR-METAL (MIM) CAPACITORS ARRANGED IN A PATTERN TO REDUCE INDUCTANCE, AND RELATED METHODS 审中-公开金属绝缘体金属（MIM）电容器，以减少电感的形态和相关方法公开(公告)号：US20160181233A1
公开(公告)日：2016-06-23
申请号：US14580900
申请日：2014-12-23
Applicant: QUALCOMM Incorporated
Inventor： Changhan Hobie Yun , Je-Hsiung Jeffrey Lan , Daeik Daniel Kim , David Francis Berdy , Chengjie Zuo , Jonghae Kim , Niranjan Sunil Mudakatte , Mario Francisco Velez , Robert Paul Mikulka
CPC classification number: H01L28/40 , H01G4/33 , H01G4/38 , H01L27/016 , H01L27/0805 , H01L2224/18
Abstract: Metal-insulator-metal (MIM) capacitors arranged in a pattern to reduce inductance, and related methods, are disclosed. In one aspect, circuits are provided that employ MIM capacitors coupled in series. The MIM capacitors are arranged in a pattern, wherein a MIM capacitor is placed so as to be electromagnetically adjacent to at least two MIM capacitors, and so that a current of the MIM capacitor flows in a direction opposite or substantially opposite of a direction in which a current of each adjacent MIM capacitor flows. The magnetic field generated at metal connections of each MIM capacitor rotates in an opposite direction of the magnetic field of each electromagnetically adjacent MIM capacitor, and thus a larger proportion of magnetic fields cancel out one another rather than combining, reducing equivalent series inductance (ESL) compared to linear arrangement of MIMs.
Abstract translation: 公开了以图案排列以降低电感的金属绝缘体金属（MIM）电容器及相关方法。 在一个方面，提供了采用串联耦合的MIM电容器的电路。 MIM电容器以图案布置，其中MIM电容器放置成与至少两个MIM电容器电磁相邻，并且使得MIM电容器的电流沿与其中的MIM方向相反或基本上相反的方向流动 每个相邻MIM电容器的电流流动。 在每个MIM电容器的金属连接处产生的磁场沿与每个电磁相邻的MIM电容器的磁场相反的方向旋转，因此较大比例的磁场彼此抵消而不是组合，从而减小了等效串联电感（ESL） 与MIM的线性排列相比。
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公开(公告)号：US09370103B2
公开(公告)日：2016-06-14
申请号：US14020558
申请日：2013-09-06
Applicant: QUALCOMM Incorporated
Inventor： Changhan Hobie Yun , Chengjie Zuo , Jonghae Kim , Daeik Daniel Kim , Mario Francisco Velez
CPC classification number: H05K1/162 , H01L23/49822 , H01L23/50 , H01L2224/16225 , H01L2924/15311 , H05K1/0306 , H05K1/032 , H05K1/115 , H05K1/181 , H05K3/46 , H05K2201/10378 , H05K2201/10674 , Y10T29/49165
Abstract: An interposer for a chipset includes multilayer thin film capacitors incorporated therein to reduce parasitic inductance in the chipset. Power and ground terminals are laid out in a staggered pattern to cancel magnetic fields between conductive vias to reduce equivalent series inductance (ESL).
Abstract translation: 用于芯片组的插入件包括并入其中的多层薄膜电容器，以减少芯片组中的寄生电感。 电源和接地端子布置成交错图案，以消除导电通孔之间的磁场，以减少等效串联电感（ESL）。
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