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104 条记录 (耗时 0.027 秒)

    Method of fabricating a daul damascene structure
    41.
    发明授权
    Method of fabricating a daul damascene structure 失效
    制造daul镶嵌结构的方法

    公开(公告)号：US6077769A

    公开(公告)日：2000-06-20

    申请号：US72311

    申请日：1998-05-04

    申请人： Yimin Huang ,  Tony Lin ,  Tri-Rung Yew

    发明人： Yimin Huang ,  Tony Lin ,  Tri-Rung Yew

    IPC分类号： H01L21/768 ,  H01L21/4763

    CPC分类号： H01L21/76811

    摘要： A method is provided for fabricating a dual damascene structure on a substrate with a first dielectric layer, an etching stop layer, a second dielectric layer, and a hard mask layer formed on it. The first step is to define the hard mask layer in order to form the first hole, which corresponds to the position of the conductive layer exposing the second dielectric layer. Then, an etching process, including an etching step with medium SiO.sub.2 /SiN etching selectivity and an over-etching step with high SiO.sub.2 /SiN etching selectivity, is performed to form the second hole and the third hole. Finally, a glue/barrier layer and a metal layer are filled into the second hole and the third hole, thus accomplishing a dual damascene structure.

    摘要翻译： 提供了一种用于在衬底上制造双镶嵌结构的方法，其上形成有第一介电层，蚀刻停止层，第二介电层和硬掩模层。 第一步是定义硬掩模层以形成第一孔，其对应于暴露第二电介质层的导电层的位置。 然后，进行包括具有中等SiO 2 / SiN蚀刻选择性的蚀刻步骤和具有高SiO 2 / SiN蚀刻选择性的过蚀刻步骤的蚀刻工艺，以形成第二孔和第三孔。 最后，将胶/阻挡层和金属层填充到第二孔和第三孔中，从而实现双镶嵌结构。

    Method of forming a dual damascene with dummy metal lines
    42.
    发明授权
    Method of forming a dual damascene with dummy metal lines 有权
    用虚拟金属线形成双镶嵌的方法

    公开(公告)号：US6001733A

    公开(公告)日：1999-12-14

    申请号：US164856

    申请日：1998-10-01

    申请人： Yimin Huang ,  Ming-Sheng Yang ,  Tri-Rung Yew

    发明人： Yimin Huang ,  Ming-Sheng Yang ,  Tri-Rung Yew

    IPC分类号： H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L23/52 ,  H01L21/44

    CPC分类号： H01L21/76843 ,  H01L21/3212 ,  H01L21/76808 ,  H01L21/76813 ,  H01L21/7684 ,  H01L2221/1031

    摘要： A method for forming dual damascene is provided. First, a first inter-metal dielectric layer and a stop layer is formed on a substrate, and then a first photoresist pattern including a via hole and a dummy metal line is patterned and the stop layer is etched for forming via hole. Next, a second inter-metal dielectric layer is deposited and then a second photoresist pattern is patterned for forming metal line trench by etching. Afterwards, a glue layer and a metal layer are blanketed and the dual damascene structure is formed by chemical mechanical polishing.

    摘要翻译： 提供了一种形成双镶嵌的方法。 首先，在基板上形成第一金属间介电层和停止层，然后对包括通孔和虚拟金属线的第一光致抗蚀剂图案进行图案化，并且对停止层进行蚀刻以形成通孔。 接下来，沉积第二金属间介电层，然后对第二光致抗蚀剂图案进行图案化以通过蚀刻形成金属线沟槽。 然后，胶合层和金属层被覆盖，并通过化学机械抛光形成双镶嵌结构。

    Method of fabricating an unlanded metal via of multi-level interconnection
    44.
    发明授权
    Method of fabricating an unlanded metal via of multi-level interconnection 失效
    制造多层互连的无衬金属通孔的方法

    公开(公告)号：US5981395A

    公开(公告)日：1999-11-09

    申请号：US994157

    申请日：1997-12-19

    申请人： Yimin Huang ,  Tri-Rung Yew

    发明人： Yimin Huang ,  Tri-Rung Yew

    IPC分类号： H01L21/768 ,  H01L21/302

    CPC分类号： H01L21/76829 ,  H01L21/76897

    摘要： A method of fabricating an unlanded metal via of multi-level interconnection. The method is characterized by utilizing damascene scheme to form a metal wiring layer so that the processes are simplified. Moreover, by this method of the invention, a problem of difficulty in filling dielectric material between the metal wiring lines can be avoided and the metal layer does not have to be etched prior to filling the dielectric material. Further more, an etching stop layer is formed over the first inter-metal dielectric layer to avoid overetching during the formation of metal via, which therefore avoid short circuit. Forming the metal wiring lines by damascene scheme allows the etching stop layer to be easily formed over the first dielectric layer, without over etching the metal via.

    摘要翻译： 一种制造多层互连的无衬金属通孔的方法。 该方法的特征在于利用镶嵌方案形成金属布线层，从而简化了工艺。 此外，通过本发明的这种方法，可避免难以在金属布线之间填充介电材料的问题，并且在填充电介质材料之前不必对金属层进行蚀刻。 此外，在第一金属间电介质层上形成蚀刻停止层，以避免在形成金属通孔期间的过蚀刻，从而避免短路。 通过镶嵌方案形成金属布线允许蚀刻停止层容易地形成在第一介电层上，而不会过度蚀刻金属通孔。

    Method of forming dual damascene structure
    46.
    发明授权
    Method of forming dual damascene structure 有权

    公开(公告)号：US06593223B1

    公开(公告)日：2003-07-15

    申请号：US09524720

    申请日：2000-03-14

    申请人： Yimin Huang ,  Tri-Rung Yew

    发明人： Yimin Huang ,  Tri-Rung Yew

    IPC分类号： H01L214763

    CPC分类号： H01L21/76829 ,  H01L21/76807

    摘要： A method of forming a dual damascene structure comprises the steps of providing a substrate having a first conductive layer formed thereon, and then sequentially forming a first dielectric layer, an anti-reflection layer and a second dielectric layer over the substrate. Next, the first dielectric layer, the anti-reflection layer and the second dielectric layer are patterned to form a first opening that exposes the conductive layer. Thereafter, the second dielectric layer is patterned to form a trench (or second opening) in a position above the first conductive layer. The trench and the first opening together form an opening of the dual damascene structure. Finally, a second conductive material is deposited into the opening and the trench to form conductive lines and the dual damascene structures.

    Dual damascene process
    47.
    发明授权
    Dual damascene process 失效
    双镶嵌工艺

    公开(公告)号：US6159661A

    公开(公告)日：2000-12-12

    申请号：US73997

    申请日：1998-05-07

    申请人： Yimin Huang ,  Tri-Rung Yew

    发明人： Yimin Huang ,  Tri-Rung Yew

    IPC分类号： H01L21/314 ,  H01L21/768 ,  G03F7/00

    CPC分类号： H01L21/76832 ,  H01L21/3143 ,  H01L21/7681

    摘要： An improved dual damascene process for forming metal interconnects comprising the steps of providing a semiconductor substrate that has a conductive layer, a first dielectric layer and a first mask layer already formed thereon. The first dielectric layer is made from a low-k dielectric material. A first silicon oxynitride (SiON) layer is formed over the first mask layer. Next, the first silicon oxynitride layer is patterned, and then the first mask layer is etched using the first silicon oxynitride as a mask. Subsequently, a second dielectric layer and a second mask layer are formed over the first silicon oxynitride. The second dielectric layer can be made from a low-k dielectric material. Next, a second silicon oxynitride layer is formed over the second mask layer. Thereafter, the second silicon oxynitride layer is patterned, and then the second mask layer is etched using the second silicon oxynitride layer as a mask. Subsequently, using the second mask layer as a mask, the second dielectric layer is etched to form a metal wire opening. Etching continues down the metal wire opening to form a via opening in the first dielectric layer that exposes the conductive layer. Finally, metal is deposited into the metal wire opening and the via opening to form the dual damascene structure of this invention.

    摘要翻译： 一种用于形成金属互连的改进的双镶嵌工艺，包括以下步骤：提供具有导电层，第一介电层和已形成在其上的第一掩模层的半导体衬底。 第一电介质层由低k电介质材料制成。 在第一掩模层上形成第一氮氧化硅（SiON）层。 接下来，对第一氮氧化硅层进行构图，然后使用第一氧氮化硅作为掩模蚀刻第一掩模层。 随后，在第一氮氧化硅上形成第二电介质层和第二掩模层。 第二电介质层可以由低k电介质材料制成。 接下来，在第二掩模层上形成第二氧氮化硅层。 此后，对第二氮氧化硅层进行构图，然后使用第二氮氧化硅层作为掩模蚀刻第二掩模层。 随后，使用第二掩模层作为掩模，蚀刻第二介电层以形成金属丝开口。 蚀刻在金属线开口处继续向下以在暴露导电层的第一介电层中形成通孔。 最后，将金属沉积到金属丝开口和通孔中以形成本发明的双镶嵌结构。

    Structure of metallization
    48.
    发明授权
    Structure of metallization 失效
    金属化结构

    公开(公告)号：US6084304A

    公开(公告)日：2000-07-04

    申请号：US100769

    申请日：1998-06-05

    申请人： Yimin Huang ,  Tri-Rung Yew

    发明人： Yimin Huang ,  Tri-Rung Yew

    IPC分类号： H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H01L23/485

    CPC分类号： H01L23/53228 ,  H01L2224/85375

    摘要： A metallization structure comprises a semiconductor substrate and pre-formed multi-interconnect layer, which include a passivation layer deposited on the top copper layer of the multi-interconnect layer, a pad window, and a non-copper thin conductive film. The non-copper thin conductive film is deposited in the pad window to protect the top copper layer from exposure to the air. The non-copper thin conductive film includes aluminum, tantalum, TaN, TiN, or WN.

    摘要翻译： 金属化结构包括半导体衬底和预成形的多互连层，其包括沉积在多互连层的顶部铜层上的钝化层，焊盘窗口和非铜薄导电膜。 非铜薄导电膜沉积在焊盘窗口中以保护顶部铜层不暴露于空气中。 非铜薄导电膜包括铝，钽，TaN，TiN或WN。

    Dielectric pattern
    49.
    发明授权
    Dielectric pattern 失效
    电介质图案

    公开(公告)号：US5959361A

    公开(公告)日：1999-09-28

    申请号：US59691

    申请日：1998-04-14

    申请人： Yimin Huang ,  Tri-Rung Yew

    发明人： Yimin Huang ,  Tri-Rung Yew

    IPC分类号： H01L21/768 ,  H01L51/00 ,  H01L21/321

    CPC分类号： H01L21/76832 ,  H01L21/76804 ,  H01L21/7681 ,  H01L21/76811

    摘要： A dielectric pattern. On a substrate having a metal wiring layer formed thereon, a first dielectric layer and a first masking layer are formed. A cap insulation layer is formed on the masking layer. The first dielectric layer, the first masking layer and the cap insulation layer are penetrated through by a first opening. A second dielectric layer and a second masking layer are formed on the cap insulation layer. The second dielectric layer and the second masking layer are penetrated through by a second opening. The first and the second openings are contiguous without intermittence.

    摘要翻译： 电介质图案。 在其上形成有金属布线层的基板上，形成第一介电层和第一掩模层。 在掩模层上形成盖绝缘层。 第一介电层，第一掩模层和盖绝缘层穿过第一开口。 第二介电层和第二掩模层形成在盖绝缘层上。 第二介电层和第二掩蔽层穿过第二开口。 第一和第二开口是连续的而不间断。

    Self-assembly nano-composite solar cell
    50.
    发明授权
    Self-assembly nano-composite solar cell 有权
    自组装纳米复合太阳能电池

    公开(公告)号：US08937241B2

    公开(公告)日：2015-01-20

    申请号：US13458272

    申请日：2012-04-27

    申请人： Che-Ning Yeh ,  Chun-Te Ho ,  Tri-Rung Yew

    发明人： Che-Ning Yeh ,  Chun-Te Ho ,  Tri-Rung Yew

    IPC分类号： H01L31/042 ,  H01L31/0384 ,  H01L31/0376 ,  H01L31/0352

    CPC分类号： H01L31/03845 ,  B82Y30/00 ,  H01L31/035227 ,  H01L31/035281 ,  H01L31/03767 ,  H01L31/075 ,  H01L31/1804 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

    摘要： A self-assembly nano-composite solar cell comprises a substrate, a first electrode layer, a composite absorption layer and a second electrode layer. The first electrode layer is formed on the substrate. The composite absorption layer is formed over the first electrode layer and includes a plurality of vertical nano-pillars, a plurality of gaps each formed between any two adjacent nano-pillars, and a plurality of bismuth sulfide nano-particles filled into the gaps and attached to the nano-pillars. The second electrode layer is formed over the composite absorption layer. Through etching and soaking in solutions, the composite absorption layer with nano-pillars and bismuth sulfide nano-particles is fabricated to form a self-assembly nano-composite solar cell having high power conversion efficiency.

    摘要翻译： 自组装纳米复合太阳能电池包括基板，第一电极层，复合吸收层和第二电极层。 第一电极层形成在基板上。 复合吸收层形成在第一电极层之上，并且包括多个垂直纳米柱，在任何两个相邻的纳米柱之间形成的多个间隙和填充到间隙中的多个硫化铋纳米颗粒 到纳米柱。 第二电极层形成在复合吸收层上。 通过蚀刻和浸泡在溶液中，制备具有纳米柱和硫化铋纳米颗粒的复合吸收层，以形成具有高功率转换效率的自组装纳米复合太阳能电池。