Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same
    1.
    发明授权
    Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same 有权
    互连结构具有设置在导电结构之间或围绕导电结构内的导电结构的扩大气隙

    公开(公告)号:US06940146B2

    公开(公告)日:2005-09-06

    申请号:US10670145

    申请日:2003-09-23

    摘要: An interconnect is formed on the substrate. The conductive structure at least includes a first conductive structure and a second conductive structure, which have a gap region in-between. The substrate is exposed at the gap region. A first structured dielectric layer is formed over the substrate to cover the first and the second conductive structures. The first structured dielectric layer also has a void at the gap region between the first and the second conductive structures. The void significantly extends to the whole gap region. The first structured dielectric layer also has an indent region above the void. An anti-etch layer fills the indent region of the first structured dielectric layer. As a result, the first structured dielectric layer has a substantially planar surface. A second structured dielectric layer is formed on the first structured dielectric layer and the anti-etch layer. The first structured dielectric layer and the second structured dielectric layer also have an opening to expose the conductive structure. When the opening is shifted to the gap region between the first conductive structure and the second conductive structure due to misalignment, the portion of the opening above the gap region stops on the anti-etch layer without opening the void.

    摘要翻译: 在基板上形成互连。 导电结构至少包括在其间具有间隙区域的第一导电结构和第二导电结构。 衬底在间隙区域暴露。 第一结构化介电层形成在衬底上以覆盖第一和第二导电结构。 第一结构化介电层在第一和第二导电结构之间的间隙区域也具有空隙。 空隙显着延伸到整个间隙区域。 第一结构化介电层还在空隙上方具有凹陷区域。 抗蚀刻层填充第一结构化介电层的凹陷区域。 结果,第一结构化介电层具有基本平坦的表面。 在第一结构化介电层和抗蚀刻层上形成第二结构化介电层。 第一结构化介电层和第二结构化介电层也具有露出导电结构的开口。 当开口由于未对准而移动到第一导电结构和第二导电结构之间的间隙区域时,间隙区域上方的开口部分停止在抗蚀刻层上而不打开空隙。

    Interconnect structure and method for manufacturing the same
    3.
    发明申请
    Interconnect structure and method for manufacturing the same 审中-公开
    互连结构及其制造方法

    公开(公告)号:US20050131775A1

    公开(公告)日:2005-06-16

    申请号:US11049444

    申请日:2005-02-01

    申请人: John Hsuan Ellis Lee

    发明人: John Hsuan Ellis Lee

    IPC分类号: G06Q30/00 G06Q30/06 G06F17/60

    摘要: A system for speeding up an establishment's foundation through Internet comprises a data storage device having databases built therein and an electronic hub connected to the data storage device through computer program. The electronic hub is cooperated with the data storage device, whereby is capable to communicate, examine the resource provider, save the resource provider, and match the resource provider and whereby speeds up the establishment's foundation. A method for speeding up founding establishment through Internet comprises communicating, examining the resource provider, saving the resource provider, and matching the resource provider.

    摘要翻译: 通过互联网加速企业基础的系统包括具有内置数据库的数据存储装置和通过计算机程序连接到数据存储装置的电子集线器。 电子集线器与数据存储装置配合,从而能够进行通信,检查资源提供者,保存资源提供者,并与资源提供者匹配,从而加快了企业的基础。 通过互联网加速建立企业的方法包括通信,审查资源提供者,节约资源提供者,以及资源提供者的匹配。

    Dual damascene structure and its manufacturing method
    4.
    发明授权
    Dual damascene structure and its manufacturing method 失效
    双镶嵌结构及其制造方法

    公开(公告)号:US5933761A

    公开(公告)日:1999-08-03

    申请号:US113879

    申请日:1998-07-10

    申请人: Ellis Lee

    发明人: Ellis Lee

    摘要: The present invention relates to a dual damascene structure and its manufacturing method. The invention uses two implanting step to form two stop layers. It uses the stop layers to perform an anisotropic etching step so as to form a via and trench. Finally, a conductive layer is filled into the via and trench followed by the completion of forming of the dual damascene structure. The invention controls the etching stop. Another advantage of the present invention is that of using the spacer as the trench mask instead of the multi-mask. Therefore, misalignment is prevented in the present invention.

    摘要翻译: 本发明涉及一种双镶嵌结构及其制造方法。 本发明使用两个植入步骤形成两个停止层。 它使用停止层进行各向异性蚀刻步骤以形成通孔和沟槽。 最后,将导电层填充到通孔和沟槽中,随后完成双镶嵌结构的形成。 本发明控制蚀刻停止。 本发明的另一个优点是使用间隔物作为沟槽掩模而不是多掩模。 因此,在本发明中防止了未对准。

    Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same

    公开(公告)号:US06914318B2

    公开(公告)日:2005-07-05

    申请号:US10670012

    申请日:2003-09-23

    IPC分类号: H01L21/768 H01L29/00

    摘要: An interconnect is formed on the substrate. The conductive structure at least includes a first conductive structure and a second conductive structure, which have a gap region in-between. The substrate is exposed at the gap region. A first structured dielectric layer is formed over the substrate to cover the first and the second conductive structures. The first structured dielectric layer also has a void at the gap region between the first and the second conductive structures. The void significantly extends to the whole gap region. The first structured dielectric layer also has an indent region above the void. An anti-etch layer fills the indent region of the first structured dielectric layer. As a result, the first structured dielectric layer has a substantially planar surface. A second structured dielectric layer is formed on the first structured dielectric layer and the anti-etch layer. The first structured dielectric layer and the second structured dielectric layer also have an opening to expose the conductive structure. When the opening is shifted to the gap region between the first conductive structure and the second conductive structure due to misalignment, the portion of the opening above the gap region stops on the anti-etch layer without opening the void.

    Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same
    7.
    发明授权
    Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same 有权
    互连结构具有设置在导电结构之间或围绕导电结构内的导电结构的扩大气隙

    公开(公告)号:US06888247B2

    公开(公告)日:2005-05-03

    申请号:US09971471

    申请日:2001-10-05

    IPC分类号: H01L21/768 H01L27/04

    摘要: An interconnect is formed on the substrate. The conductive structure at least includes a first conductive structure and a second conductive structure, which have a gap region in-between. The substrate is exposed at the gap region. A first structured dielectric layer is formed over the substrate to cover the first and the second conductive structures. The first structured dielectric layer also has a void at the gap region between the first and the second conductive structures. The void significantly extends to the whole gap region. The first structured dielectric layer also has an indent region above the void. An anti-etch layer fills the indent region of the first structured dielectric layer As a result, the first structured dielectric layer has a substantially planar surface A second structured dielectric layer is formed on the first structured dielectric layer and the anti-etch layer. The first structured dielectric layer and the second structured dielectric layer also have an opening to expose the conductive structure. When the opening is shifted to the gap region between the first conductive structure and the second conductive structure due to misalignment, the portion of the opening above the gap region stops on the anti-etch layer without opening the void.

    摘要翻译: 在基板上形成互连。 导电结构至少包括在其间具有间隙区域的第一导电结构和第二导电结构。 衬底在间隙区域暴露。 第一结构化介电层形成在衬底上以覆盖第一和第二导电结构。 第一结构化介电层在第一和第二导电结构之间的间隙区域也具有空隙。 空隙显着延伸到整个间隙区域。 第一结构化介电层还在空隙上方具有凹陷区域。 抗蚀刻层填充第一结构化电介质层的凹陷区域结果,第一结构化介电层具有基本上平坦的表面。第一结构化介电层和抗蚀刻层上形成有第二结构化介电层。 第一结构化介电层和第二结构化介电层也具有露出导电结构的开口。 当开口由于未对准而移动到第一导电结构和第二导电结构之间的间隙区域时,间隙区域上方的开口部分停止在抗蚀刻层上而不打开空隙。

    Method of fabricating shallow trench isolation
    8.
    发明授权
    Method of fabricating shallow trench isolation 失效
    浅沟槽隔离的制作方法

    公开(公告)号:US06245635B1

    公开(公告)日:2001-06-12

    申请号:US09203042

    申请日:1998-11-30

    申请人: Ellis Lee

    发明人: Ellis Lee

    IPC分类号: H01L2176

    CPC分类号: H01L21/76229

    摘要: A method of fabricating a shallow trench isolation includes formation of a polishing stop layer. The polishing stop layer is formed in a fill material by performing ion implantation to implant atoms in the fill material. The depth of the polishing stop layer can be controlled by the energy of the implanted atoms. The polishing stop layer prevents the fill material from being dished by chemical-mechanical polishing. The polishing stop layer also prevents scratches from forming in the surface of the fill material, which is used to form isolation regions.

    摘要翻译: 制造浅沟槽隔离的方法包括形成抛光停止层。 抛光停止层通过进行离子注入而在填充材料中形成,以在填充材料中注入原子。 抛光停止层的深度可以通过注入原子的能量来控制。 抛光停止层防止填充材料通过化学机械抛光而抛光。 抛光停止层还防止在用于形成隔离区域的填充材料的表面中形成划痕。

    Method of fabricating copper interconnection
    9.
    发明授权
    Method of fabricating copper interconnection 失效
    制造铜互连的方法

    公开(公告)号:US06171960B2

    公开(公告)日:2001-01-09

    申请号:US09057812

    申请日:1998-04-09

    申请人: Ellis Lee

    发明人: Ellis Lee

    IPC分类号: H01L2144

    摘要: A method of fabricating copper interconnection is provided comprising forming a dielectric layer with a trench or a via on a semiconductor substrate. A titanium layer is formed on the dielectric layer. A copper layer doped with light silicon is formed in the trench or the via. The copper layer is encapsulated by annealing to make silicon doped in the copper layer diffuse toward the surface of the copper to react with the titanium layer and the gas. It prevents the copper layer from oxidation and diffusion to increase the yield.

    摘要翻译: 提供一种制造铜互连的方法,包括在半导体衬底上形成具有沟槽或通孔的电介质层。 在电介质层上形成钛层。 在沟槽或通孔中形成掺杂有硅的铜层。 通过退火对铜层进行封装,使得在铜层中掺杂的硅向铜表面扩散以与钛层和气体反应。 它防止铜层氧化和扩散以提高产率。

    System and method for founding establishment through internet
    10.
    发明授权
    System and method for founding establishment through internet 失效
    通过互联网建立企业的制度和方法

    公开(公告)号:US07412394B2

    公开(公告)日:2008-08-12

    申请号:US09769091

    申请日:2001-01-24

    申请人: John Hsuan Ellis Lee

    发明人: John Hsuan Ellis Lee

    IPC分类号: G06Q10/00

    摘要: A system for speeding up an establishment's foundation through Internet comprises a data storage device having databases built therein and an electronic hub connected to the data storage device through computer program. The electronic hub is cooperated with the data storage device, whereby is capable to communicate, examine the resource provider, save the resource provider, and match the resource provider and whereby speeds up the establishment's foundation. A method for speeding up founding establishment through Internet comprises communicating, examining the resource provider, saving the resource provider, and matching the resource provider.

    摘要翻译: 通过互联网加速企业基础的系统包括具有内置数据库的数据存储装置和通过计算机程序连接到数据存储装置的电子集线器。 电子集线器与数据存储装置配合,从而能够进行通信,检查资源提供者,保存资源提供者,并与资源提供者匹配,从而加快了企业的基础。 通过互联网加速建立企业的方法包括通信,审查资源提供者,节约资源提供者,以及资源提供者的匹配。