An improved dual damascene process for forming metal interconnects comprising the steps of providing a semiconductor substrate that has a conductive layer, a first dielectric layer and a first mask layer already formed thereon. The first dielectric layer is made from a low-k dielectric material. A first silicon oxynitride (SiON) layer is formed over the first mask layer. Next, the first silicon oxynitride layer is patterned, and then the first mask layer is etched using the first silicon oxynitride as a mask. Subsequently, a second dielectric layer and a second mask layer are formed over the first silicon oxynitride. The second dielectric layer can be made from a low-k dielectric material. Next, a second silicon oxynitride layer is formed over the second mask layer. Thereafter, the second silicon oxynitride layer is patterned, and then the second mask layer is etched using the second silicon oxynitride layer as a mask. Subsequently, using the second mask layer as a mask, the second dielectric layer is etched to form a metal wire opening. Etching continues down the metal wire opening to form a via opening in the first dielectric layer that exposes the conductive layer. Finally, metal is deposited into the metal wire opening and the via opening to form the dual damascene structure of this invention.