公开(公告)号：US08014187B2

公开(公告)日：2011-09-06

申请号：US12127988

申请日：2008-05-28

申请人： Hee Bok Kang ,  Suk Kyoung Hong

发明人： Hee Bok Kang ,  Suk Kyoung Hong

IPC分类号： G11C11/00 ,  G11C13/00

CPC分类号： G11C13/0061 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2013/0092 ,  G11C2213/72

摘要： A method is disclosed for driving a phase change memory device including a phase change resistor. The method includes applying a trigger voltage to the phase change resistor for a first write time to preheat the phase change resistor, applying a first write voltage to the phase change resistor for a second write time to control a first state of the phase change resistor, and applying a second voltage to the phase change resistor for a third write time to control a second state of the phase change resistor.

摘要翻译： 公开了一种用于驱动包括相变电阻器的相变存储器件的方法。 该方法包括：将第一写入时间的触发电压施加到相变电阻器，以预热相变电阻器，向第二写入时间施加第一写入电压至相变电阻器，以控制相变电阻器的第一状态， 以及将第二电压施加到所述相变电阻器用于第三写入时间，以控制所述相变电阻器的第二状态。

公开(公告)号：US08000132B2

公开(公告)日：2011-08-16

申请号：US12785661

申请日：2010-05-24

申请人： Hee Bok Kang ,  Suk Kyoung Hong

发明人： Hee Bok Kang ,  Suk Kyoung Hong

IPC分类号： G11C7/00

CPC分类号： G11C13/0064 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2013/0078 ,  G11C2013/0092

摘要： A method for efficiently driving a phase change memory device is presented that includes the operational procedures of writing, reading, comparing and changing. The phase change memory device has a resistor configured to sense a crystallization state changed by currents so as to store data corresponding to the crystallization state. The writing operation writes data having a first state in a corresponding unit cell of the phase change memory device. The reading operation reads a cell data stored in the unit cell. The comparing operation compares the data having the first state with the cell data read from the unit cell to verify whether or not the data having the first state is the same as the cell data. The changing operation changes a write condition when the data having a first state is different from that of the cell data.

摘要翻译： 提出一种有效驱动相变存储器件的方法，其中包括写入，读取，比较和更改的操作步骤。 相变存储器件具有被配置为感测由电流改变的结晶状态以便存储对应于结晶状态的数据的电阻器。 写入操作在相变存储器件的相应单元中写入具有第一状态的数据。 读取操作读取存储在单位单元中的单元数据。 比较操作将具有第一状态的数据与从单元单元读取的单元数据进行比较，以验证具有第一状态的数据是否与单元数据相同。 当具有第一状态的数据与小区数据的数据不同时，改变操作改变写入条件。

公开(公告)号：US20110193046A1

公开(公告)日：2011-08-11

申请号：US13090043

申请日：2011-04-19

申请人： Hee Bok Kang ,  Suk Kyoung Hong

发明人： Hee Bok Kang ,  Suk Kyoung Hong

IPC分类号： H01L45/00

CPC分类号： G11C13/003 ,  G11C13/0004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2013/0092 ,  G11C2213/72 ,  G11C2213/74 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675

摘要： A phase change memory (PCM) device, a manufacturing technique of making the PCM device, and a way of operating the PCM device is presented. The PCM device is structured to have a silicon on insulator type substrate that provides an advantage of thermally insulating the active area of the PCM device without the need for an additional insulation layer. The PCM device has a phase change resistor PCR that has one terminal connected to a word line and the other terminal connected in common to the N-terminals of two PN diodes in which the P-terminals are connected in common to the bit line. As a result, a current flowing through the phase change resistor PCR is doubled which results in doubling the cell driving capacity.

摘要翻译： 提出了相变存储器（PCM）装置，制造PCM装置的制造技术以及操作PCM装置的方法。 PCM器件被构造为具有绝缘体上硅型衬底，其提供了对PCM器件的有源区域进行绝热的优点，而不需要额外的绝缘层。 PCM装置具有一个相变电阻器PCR，其一个端子连接到字线，另一个端子共同连接到两个PN二极管的N端，其中P端子共同连接到位线。 结果，流过相变电阻器PCR的电流加倍，导致电池驱动能力增加一倍。

公开(公告)号：US07961534B2

公开(公告)日：2011-06-14

申请号：US12204965

申请日：2008-09-05

申请人： Hee Bok Kang ,  Suk Kyoung Hong

发明人： Hee Bok Kang ,  Suk Kyoung Hong

IPC分类号： G11C11/00

CPC分类号： G11C13/003 ,  G11C8/06 ,  G11C8/18 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0033 ,  G11C13/004 ,  G11C13/0069 ,  G11C16/3431 ,  G11C2013/0052 ,  G11C2013/0078 ,  G11C2013/009 ,  G11C2013/0092 ,  G11C2213/15 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/72 ,  G11C2213/75 ,  G11C2213/76

摘要： A semiconductor memory device includes a read/write bit line configured to supply a cell driving voltage. A selecting unit is connected to the read/write bit line and is controlled by a word line. A plurality of cells are connected between the selecting unit and a source line, and the cells are configured to read and write data according to a cell driving voltage. Each switching element of a plurality of switching elements are connected in parallel with a single cell of the plurality of cells, and the plurality of switching elements are controlled selectively by a plurality of bit lines.

摘要翻译： 半导体存储器件包括被配置为提供单元驱动电压的读/写位线。 选择单元连接到读/写位线并由字线控制。 多个单元连接在选择单元和源极线之间，并且单元被配置为根据单元驱动电压来读取和写入数据。 多个开关元件的每个开关元件与多个单元的单个单元并联连接，并且多个开关元件由多个位线选择性地控制。

公开(公告)号：US07920064B2

公开(公告)日：2011-04-05

申请号：US12146544

申请日：2008-06-26

申请人： Hee Bok Kang ,  Suk Kyoung Hong

发明人： Hee Bok Kang ,  Suk Kyoung Hong

IPC分类号： G08B13/14

CPC分类号： G06K19/0723

摘要： A RFID tag capable of storing and restoring flag data is described. The RFID tag includes an analog block for generating a driving power using a radio frequency signal received through an antenna. The driving power is used to store the flag data. A digital block is operated using the generated driving power and processes RF data that is transmitted and received via the analog block in order to store the flag data in the analog block. A memory block reads and writes data to a nonvolatile ferroelectric capacitor depending on a control signal from the digital block. The analog block supplies the flag data to the digital block during an activation time period of a power-on reset signal.

摘要翻译： 描述能够存储和恢复标志数据的RFID标签。 RFID标签包括用于使用通过天线接收的射频信号来产生驱动功率的模拟块。 驱动功率用于存储标志数据。 使用所产生的驱动功率来操作数字模块，并处理经由模拟块发送和接收的RF数据，以便将标志数据存储在模拟块中。 存储器块根据来自数字块的控制信号将数据读取和写入非易失性铁电电容器。 在上电复位信号的激活时间段期间，模拟模块将标志数据提供给数字模块。

公开(公告)号：US20100327877A1

公开(公告)日：2010-12-30

申请号：US12650524

申请日：2009-12-30

申请人： Hee Bok KANG ,  Suk Kyoung Hong

发明人： Hee Bok KANG ,  Suk Kyoung Hong

IPC分类号： G01R31/02

CPC分类号： G06K7/0008 ,  G01R31/2822

摘要： A radio frequency identification (RFID) device and a test method thereof are disclosed. In this test method, the RFID device receives different kinds of tag selection addresses and memory addresses according to a time sharing scheme, so that one or more RFID tags are tested. The RFID device includes a tag chip and a test chip. The tag chip performs a test operation upon receiving a test input signal from an external node, and externally outputs a test output signal indicating a result of the test operation. The test chip tests the tag chip upon receiving an address and data from an external node via a test pad during a test mode.

摘要翻译： 公开了射频识别（RFID）装置及其测试方法。 在该测试方法中，RFID设备根据时间共享方案接收不同种类的标签选择地址和存储器地址，从而测试一个或多个RFID标签。 RFID设备包括标签芯片和测试芯片。 标签芯片在从外部节点接收到测试输入信号时进行测试操作，并从外部输出表示测试结果的测试输出信号。 在测试模式期间，测试芯片通过测试板从外部节点接收到地址和数据时测试标签芯片。

公开(公告)号：US07643326B2

公开(公告)日：2010-01-05

申请号：US11956394

申请日：2007-12-14

申请人： Hee Bok Kang ,  Suk Kyoung Hong

发明人： Hee Bok Kang ,  Suk Kyoung Hong

IPC分类号： G11C11/22

CPC分类号： G11C11/405 ,  G11C8/16 ,  G11C11/22

摘要： A semiconductor memory device comprises a one-transistor (1-T) field effect transistor (FET) type ferroelectric device connected between a pair of bit lines and controlled by a word line, where a different channel resistance is induced to a channel region depending on a polarity state of a ferroelectric layer; a plurality of access transistors connected between the ferroelectric device and the pair of bit lines; and a plurality of port word lines configured to select the plurality of access transistors.

摘要翻译： 一种半导体存储器件包括连接在一对位线之间并被字线控制的单晶体管（1-T）场效应晶体管（FET）型铁电元件，其中不同的沟道电阻根据 铁电层的极性状态; 连接在所述铁电体器件与所述一对位线之间的多个存取晶体管; 以及配置为选择所述多个存取晶体管的多个端口字线。

公开(公告)号：US20090168558A1

公开(公告)日：2009-07-02

申请号：US12166753

申请日：2008-07-02

申请人： Hee Bok Kang ,  Suk Kyoung Hong

发明人： Hee Bok Kang ,  Suk Kyoung Hong

IPC分类号： G11C7/00

CPC分类号： G11C11/404 ,  G11C11/4085 ,  G11C11/4094 ,  G11C2211/4016

摘要： A 1-transistor type DRAM driving process writes a data bit that corresponds to a level applied to a bit line. A first hold period holds data by deactivating a word line of an NMOS transistor and precharging a source and bit line. After the first hold period, a complex operation period operates the NMOS transistor and a bipolar transistor by activating the word line of the NMOS transistor, shifting the source line voltage to a ground voltage, and shifting the bit line voltage to a corresponding multi level bit voltage level. After the complex operation period, a bipolar transistor operation period operates only the bipolar transistor by deactivating the word line of the NMOS transistor. After the bipolar transistor operation period, a second hold period holds the data by precharging the source and bit lines of the NMOS transistor and the bit level applied to the bit line is written.

摘要翻译： 1晶体管型DRAM驱动处理将与应用于位线的电平对应的数据位写入。 第一保持周期通过去激活NMOS晶体管的字线并预充电源极和位线来保持数据。 在第一保持周期之后，复合工作周期通过激活NMOS晶体管的字线来操作NMOS晶体管和双极晶体管，将源极线电压移动到接地电压，并将位线电压移位到相应的多电平位 电压电平。 在复杂操作周期之后，双极晶体管工作周期仅通过使NMOS晶体管的字线去激活来操作双极晶体管。 在双极晶体管工作周期之后，第二保持周期通过对NMOS晶体管的源极和位线进行预充电来保持数据，并且写入施加到位线的位电平。

公开(公告)号：US20090040811A1

公开(公告)日：2009-02-12

申请号：US12133725

申请日：2008-06-05

申请人： Hee Bok KANG ,  Suk Kyoung Hong

发明人： Hee Bok KANG ,  Suk Kyoung Hong

IPC分类号： G11C11/00 ,  G11C7/00

CPC分类号： G11C13/0069 ,  G11C13/0004 ,  G11C2013/0076 ,  G11C2013/008 ,  G11C2013/0092 ,  G11C2213/72

摘要： A phase change memory device includes a cell array unit having a phase change resistance cell positioned at an intersection of a word line and a bit line. A write driving unit is configured to generate a single write voltage to the cell array unit when data to be written is a first data and is configured to generate a plurality of write voltages selectively when the data is a second data.

摘要翻译： 相变存储器件包括具有位于字线和位线的交点处的相变电阻单元的单元阵列单元。 写入驱动单元被配置为当要写入的数据是第一数据时，向单元阵列单元生成单个写入电压，并且被配置为当数据是第二数据时选择性地生成多个写入电压。

公开(公告)号：US08315089B2

公开(公告)日：2012-11-20

申请号：US13166241

申请日：2011-06-22

申请人： Hee Bok Kang ,  Suk Kyoung Hong

发明人： Hee Bok Kang ,  Suk Kyoung Hong

IPC分类号： G11C11/21

CPC分类号： G11C13/0064 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/009 ,  G11C2211/5634 ,  G11C2213/72

摘要： A phase change memory device having an improved performance that minimizes cell degradation is presented. The phase change memory device includes: a cell array, a sense amplifier, a write driving unit, and a reference level selecting unit. The cell array has a phase change resistor is configured to read/write data. The sense amplifier is configured to compare a reference voltage with a sensing voltage received from the cell array. The write driving unit is configured to supply a driving voltage corresponding to write data to the cell array. The reference level selecting unit is configured to select a read reference voltage in a read mode so as to output the reference voltage, and to select a reference voltage corresponding to input data in a write verifying mode so as to output the reference voltage.

摘要翻译： 提出了具有使电池劣化最小化的改进性能的相变存储器件。 相变存储器件包括：单元阵列，读出放大器，写入驱动单元和参考电平选择单元。 单元阵列具有相变电阻器，用于读/写数据。 读出放大器被配置为将参考电压与从单元阵列接收的感测电压进行比较。 写入驱动单元被配置为向单元阵列提供与写入数据相对应的驱动电压。 参考电平选择单元被配置为在读取模式中选择读取参考电压以输出参考电压，并且以写入验证模式选择与输入数据相对应的参考电压，以输出参考电压。