公开(公告)号：US20140153318A1

公开(公告)日：2014-06-05

申请号：US14232808

申请日：2011-07-22

Applicant: Frederick Perner

Inventor： Frederick Perner

IPC: G11C13/00

CPC classification number: G11C13/0002 ,  G11C7/02 ,  G11C7/062 ,  G11C11/1673 ,  G11C13/0007 ,  G11C13/004 ,  G11C2013/0045 ,  G11C2013/0054 ,  G11C2213/77

Abstract: A read circuit for sensing a resistance state of a resistive switching device in a crosspoint array utilizes an equipotential preamplifier connected to a selected column line of the resistive switching device in the array. The equipotential preamplifier delivers a sense current while maintaining the selected column line at a reference voltage near a biasing voltage applied to unselected row lines of the array. The read circuit has a reference current source for generating a sense reference current, and a current comparator connected to evaluate the sense current delivered by the equipotential preamplifier against the sense reference current and generating an output signal indicative of the resistance state of the resistive switching device.

Abstract translation: 用于感测交叉点阵列中的电阻式开关装置的电阻状态的读取电路利用连接到阵列中的电阻式开关装置的选定列线的等电位前置放大器。 等电位前置放大器提供感测电流，同时将选定的列线保持在靠近施加到阵列的未选行行的偏置电压的参考电压。 读取电路具有用于产生感测参考电流的参考电流源，以及连接的电流比较器，用于评估由等电位前置放大器相对于感测参考电流传递的感测电流，并产生指示电阻开关器件的电阻状态的输出信号 。

公开(公告)号：US20140014891A1

公开(公告)日：2014-01-16

申请号：US14006719

申请日：2011-03-29

Applicant: Frederick Perner

Inventor： Frederick Perner

IPC: H01L45/00

CPC classification number: H01L45/12 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

Abstract: A memory array has a plurality of conductor structures. Each conductor structure has a top wire segment extending in a first direction, a middle wire segment extending in a second direction at an angle from the first direction, a bottom wire segment extending in a direction opposite to the first direction, and a via connecting the top, middle, and bottom wire segments. A plurality of memory cells in an upper plane of the memory array are formed at intersections of the middle wire segment of each conductor structure with the top wire segments of neighboring conductor structures, and a plurality of memory cells in a lower plane are formed at intersections of the middle wire segment of each conductor structure with the bottom wire segments of neighboring conductor structures.

Abstract translation: 存储器阵列具有多个导体结构。 每个导体结构具有沿第一方向延伸的顶部线段，沿着与第一方向成一定角度的第二方向延伸的中间线段，沿与第一方向相反的方向延伸的底部线段，以及连接 顶部，中间和底部线段。 存储器阵列的上平面中的多个存储单元形成在每个导体结构的中间线段与相邻导体结构的顶部线段的交点处，并且下部平面中的多个存储单元形成在相交处 每个导体结构的中间线段与相邻导体结构的底部线段。

公开(公告)号：US08331129B2

公开(公告)日：2012-12-11

申请号：US12875423

申请日：2010-09-03

Applicant: Wei Yi ,  Frederick Perner ,  Matthew D. Pickett ,  Muhammad Shakeel Qureshi

Inventor： Wei Yi ,  Frederick Perner ,  Matthew D. Pickett ,  Muhammad Shakeel Qureshi

IPC: G11C11/00

CPC classification number: G11C5/063 ,  G11C8/08 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0066 ,  G11C2013/0076 ,  G11C2211/5624 ,  G11C2213/77

Abstract: A memory array with write feedback includes a number of row lines intersecting a number of column lines, a memory element connected between one of the row lines and one of the column lines, an electrical condition supply to be selectively applied to one of the row lines; and a feedback control loop to control an electrical condition supplied by the electrical condition supply. A method for setting the state of a memory element within a memory array includes applying an electrical condition to the memory element within the memory array, sensing a resistive state of the memory element, and controlling the electrical condition based on the sensed resistive state to cause the memory element to reach a target resistance.

Abstract translation: 具有写入反馈的存储器阵列包括与多条列线相交的许多行线，连接在行线之一和列线之一之间的存储元件，选择性地施加到行线之一的电气供应 ; 以及用于控制由电气供应提供的电气状况的反馈控制回路。 用于设置存储器阵列内的存储元件的状态的方法包括将电气条件施加到存储器阵列内的存储元件，感测存储元件的电阻状态，以及基于感测到的电阻状态来控制电气状态，从而导致 记忆元件达到目标电阻。

公开(公告)号：US20070096713A1

公开(公告)日：2007-05-03

申请号：US11267705

申请日：2005-11-03

Applicant: Frederick Perner

Inventor： Frederick Perner

IPC: G05F3/20

CPC classification number: G05F3/262

Abstract: A digital current source used to mirror a reference current is provided. The digitally controlled analog current source multiplies a current from a master mirror transistor producing an output current that is a digitally controlled multiple of the reference current. The circuit comprises a plurality of one bit current mirror cells. Each one bit current mirror cell comprises a mirror transistor receiving an analog gate voltage from a master mirror transistor and providing a drain voltage, an operational amplifier configured to maintain the drain voltage for the mirror transistor equivalent to the analog gate voltage, and a switch configured to receive one control bit, the switch enabling current mirroring when the mirror voltage is substantially equivalent to the master mirror voltage. The digital current source further includes a common line summing element employed to receive and compile currents from each of the one bit current mirror cells.

Abstract translation: 提供了用于镜像参考电流的数字电流源。 数字控制的模拟电流源将来自主镜晶体管的电流相乘，产生作为参考电流的数字控制倍数的输出电流。 电路包括多个一位电流镜单元。 每一位电流镜单元包括反射镜晶体管，其接收来自主镜晶体管的模拟栅极电压并提供漏极电压;运算放大器，被配置为保持反射镜晶体管的漏极电压等于模拟栅极电压;以及开关配置 为了接收一个控制位，当镜电压基本上等于主镜电压时，该开关启用电流镜像。 数字电流源还包括用于从一个位电流镜单元中的每一个接收和编译电流的公共线求和元件。

公开(公告)号：US20050270364A1

公开(公告)日：2005-12-08

申请号：US10861047

申请日：2004-06-04

Applicant: Manish Sharma ,  Frederick Perner

Inventor： Manish Sharma ,  Frederick Perner

IPC: B41J3/50 ,  B41M5/40 ,  C09D11/00

CPC classification number: C09D11/30 ,  B41J3/50

Abstract: A flexible media magnetic printing system provides for data storage within flexible media imprinted with magnetic ink. In a particular embodiment, the printing system includes at least one reservoir of magnetic ink with magnetic particles capable of supporting high density data, and at least one reservoir of visible ink. The reservoirs are coupled to a print head including one or more ink-ejecting nozzles, which is removably or fixedly coupled to at least one magnetic read/write device. The magnetic read/write device tracks above the magnetic ink applied by the ink-ejecting nozzles to the flexible media. The magnetic read/write device writes to the magnetic ink by providing a magnetic field of sufficient intensity to re-orient the magnetic alignment within the ink to a known direction. The magnetic read/write device also reads data from flexible media, for example, paper or cloth that is imprinted with data-embedded magnetic ink. Visible or substantially invisible magnetic ink may be applied as dots within or strips beneath characters printed in visible ink. An inkjet printer head incorporating the flexible media magnetic printing system is further provided.

Abstract translation: 柔性介质磁性印刷系统提供用磁性墨水印刷的柔性介质内的数据存储。 在特定实施例中，打印系统包括至少一个具有能够支持高密度数据的磁性颗粒的磁性墨水储存器和至少一个可见墨水储存器。 储存器联接到包括一个或多个喷墨喷嘴的打印头，喷墨喷嘴可移除地或固定地耦合到至少一个磁读/写装置。 磁读/写装置在由喷墨喷嘴施加到柔性介质上的磁性油墨之上进行跟踪。 磁读/写装置通过提供足够强度的磁场来写入磁墨，以将墨中的磁对准重新定向到已知方向。 磁读/写装置还从柔性介质读取数据，例如印有数据嵌入式磁墨的纸或布。 可见或基本上不可见的磁性墨水可以作为打印在可见墨水中的字符之下或之下的点施加。 还提供了结合有柔性介质磁性印刷系统的喷墨打印头。

公开(公告)号：US20050161715A1

公开(公告)日：2005-07-28

申请号：US10814094

申请日：2004-03-30

Applicant: Frederick Perner ,  Manish Sharma

Inventor： Frederick Perner ,  Manish Sharma

IPC: G11C7/02 ,  G11C11/16 ,  H01L27/22 ,  H01L27/24

CPC classification number: H01L27/224 ,  G11C11/16 ,  H01L27/24

Abstract: A cross point resistive memory array has a first array of cells arranged generally in a plane. Each of the memory cells includes a memory storage element and is coupled to a diode. The diode junction extends transversely to the plane of the array of memory cells.

Abstract translation: 交叉点电阻存储器阵列具有通常布置在平面中的第一阵列阵列。 每个存储单元包括存储器存储元件并且耦合到二极管。 二极管结横向延伸到存储单元阵列的平面。

公开(公告)号：US20050117409A1

公开(公告)日：2005-06-02

申请号：US10725803

申请日：2003-12-02

Applicant: Frederick Perner

Inventor： Frederick Perner

IPC: G11C11/15 ,  G11C7/04 ,  G11C7/22 ,  G11C11/00 ,  G11C11/02 ,  G11C11/16 ,  G11C29/00 ,  H01L21/8246 ,  H01L27/105

CPC classification number: G11C11/16

Abstract: The invention includes an apparatus and method for selecting a desirable magnitude of a magnetic memory cell write current. The method includes determining a minimal magnitude of write current for writing to the magnetic memory cell, determining a maximal magnitude of write current for writing to the magnetic memory cell, and calculating the selected magnitude of magnetic memory cell write current based on the minimal magnitude of write current and the maximal magnitude of write current.

公开(公告)号：US20050104146A1

公开(公告)日：2005-05-19

申请号：US10713510

申请日：2003-11-14

Applicant: Janice Nickel ,  Manoj Bhattacharyya ,  Frederick Perner

Inventor： Janice Nickel ,  Manoj Bhattacharyya ,  Frederick Perner

IPC: H01L27/105 ,  G11C11/14 ,  G11C11/16 ,  H01L21/8229 ,  H01L21/8246 ,  H01L27/22 ,  H01L29/76 ,  H01L29/82 ,  H01L43/00 ,  H01L43/08

CPC classification number: H01L27/222 ,  G11C11/16 ,  G11C11/1675 ,  H01L43/08

Abstract: A thin film device and a method of providing thermal assistance therein is disclosed. Accordingly, a heater material is utilized to thermally assist in the operation of the thin film device. By utilizing a heater material to thermally assist in the operation of the thin film device, a substantial improvement in the accuracy and performance of the thin film device is achieved. A first aspect of the present invention is a thin film device. The thin film device includes at least one patterned thin film layer, a heater material coupled to the at least one patterned thin film layer for providing thermal assistance to the at least one of the patterned thin film layers and a conductor coupled to the heater material for supplying energy to the heater material.

Abstract translation: 公开了薄膜装置及其中提供热辅助的方法。 因此，使用加热器材料来热辅助薄膜器件的操作。 通过利用加热材料热辅助薄膜器件的操作，实现了薄膜器件的精度和性能的显着提高。 本发明的第一方面是一种薄膜器件。 所述薄膜器件包括至少一个图案化薄膜层，耦合到所述至少一个图案化薄膜层的加热器材料，用于向所述图案化薄膜层中的至少一个提供热辅助，以及耦合到所述加热器材料的导体， 向加热器材料供应能量。

公开(公告)号：US20050099855A1

公开(公告)日：2005-05-12

申请号：US10660831

申请日：2003-09-12

Applicant: Anthony Holden ,  Frederick Perner

Inventor： Anthony Holden ,  Frederick Perner

IPC: G11C11/15 ,  G11C29/56 ,  G11C29/00

CPC classification number: G11C11/15

Abstract: A system and method for determining the logic state of a memory cell in a magnetic tunnel junction (MTJ) memory device based on the ratio of the current through the cell at different bias points are disclosed. A memory cell in an MJT memory device is sequentially subjected to at least two different bias voltages. The current through the cell at each of the bias voltages is measured, and a ratio of the different currents is determined. The ratio is then compared with a predetermined value to determine the logic state of the cell. The predetermined value can be a known value. Alternatively, the predetermined value can be determined by application of the system and method to a reference cell having a known logic state.

Abstract translation: 公开了一种用于基于在不同偏置点处通过单元的电流的比率来确定磁性隧道结（MTJ）存储器件中的存储器单元的逻辑状态的系统和方法。 MJT存储器件中的存储器单元依次经受至少两个不同的偏置电压。 测量在每个偏置电压下通过电池的电流，并确定不同电流的比率。 然后将比率与预定值进行比较，以确定单元的逻辑状态。 预定值可以是已知值。 或者，可以通过将系统和方法应用于具有已知逻辑状态的参考小区来确定预定值。

公开(公告)号：US06781906B2

公开(公告)日：2004-08-24

申请号：US10299501

申请日：2002-11-19

Applicant: Frederick Perner ,  Lung Tran

Inventor： Frederick Perner ,  Lung Tran

IPC: G11C702

CPC classification number: G11C7/062 ,  G11C7/067 ,  G11C11/16 ,  G11C2207/063 ,  G11C2207/2254

Abstract: A memory cell sensor including an integrator for sensing a logical state of a memory cell. An integrator calibration circuit provides a corrective bias to the integrator, the corrective bias being based upon a difference between an initial integrator output value and a reference value. Another embodiment includes a method of sensing a logical state of a memory cell. The memory cell being sensed by an integrator. The method includes determining an initial integrator output value when a corrective bias of the integrator is zeroed, generating a correction value by comparing the initial integrator output value to a reference value, and applying the correction value to the corrective bias of the integrator.

Abstract translation: 一种存储单元传感器，包括用于感测存储单元的逻辑状态的积分器。 积分器校准电路为积分器提供校正偏置，校正偏置基于初始积分器输出值和参考值之间的差异。 另一个实施例包括一种感测存储器单元的逻辑状态的方法。 存储器单元被积分器感测。 该方法包括当积分器的校正偏置为零时确定初始积分器输出值，通过将初始积分器输出值与参考值进行比较产生校正值，并将校正值应用于积分器的校正偏置。