公开(公告)号：US20050104146A1

公开(公告)日：2005-05-19

申请号：US10713510

申请日：2003-11-14

Applicant: Janice Nickel ,  Manoj Bhattacharyya ,  Frederick Perner

Inventor： Janice Nickel ,  Manoj Bhattacharyya ,  Frederick Perner

IPC: H01L27/105 ,  G11C11/14 ,  G11C11/16 ,  H01L21/8229 ,  H01L21/8246 ,  H01L27/22 ,  H01L29/76 ,  H01L29/82 ,  H01L43/00 ,  H01L43/08

CPC classification number: H01L27/222 ,  G11C11/16 ,  G11C11/1675 ,  H01L43/08

Abstract: A thin film device and a method of providing thermal assistance therein is disclosed. Accordingly, a heater material is utilized to thermally assist in the operation of the thin film device. By utilizing a heater material to thermally assist in the operation of the thin film device, a substantial improvement in the accuracy and performance of the thin film device is achieved. A first aspect of the present invention is a thin film device. The thin film device includes at least one patterned thin film layer, a heater material coupled to the at least one patterned thin film layer for providing thermal assistance to the at least one of the patterned thin film layers and a conductor coupled to the heater material for supplying energy to the heater material.

Abstract translation: 公开了薄膜装置及其中提供热辅助的方法。 因此，使用加热器材料来热辅助薄膜器件的操作。 通过利用加热材料热辅助薄膜器件的操作，实现了薄膜器件的精度和性能的显着提高。 本发明的第一方面是一种薄膜器件。 所述薄膜器件包括至少一个图案化薄膜层，耦合到所述至少一个图案化薄膜层的加热器材料，用于向所述图案化薄膜层中的至少一个提供热辅助，以及耦合到所述加热器材料的导体， 向加热器材料供应能量。

公开(公告)号：US20050185456A1

公开(公告)日：2005-08-25

申请号：US11112691

申请日：2005-04-21

Applicant: Janice Nickel ,  Manoj Bhattacharyya ,  Frederick Perner

Inventor： Janice Nickel ,  Manoj Bhattacharyya ,  Frederick Perner

IPC: H01L27/105 ,  G11C11/14 ,  G11C11/16 ,  H01L21/8229 ,  H01L21/8246 ,  H01L27/22 ,  H01L29/76 ,  H01L29/82 ,  H01L43/00 ,  H01L43/08

CPC classification number: H01L27/222 ,  G11C11/16 ,  G11C11/1675 ,  H01L43/08

Abstract: A thin film device and a method of providing thermal assistance therein is disclosed. Accordingly, a heater material is utilized to thermally assist in the operation of the thin film device. By utilizing a heater material to thermally assist in the operation of the thin film device, a substantial improvement in the accuracy and performance of the thin film device is achieved. A first aspect of the present invention is a thin film device. The thin film device includes at least one patterned thin film layer, a heater material coupled to the at least one patterned thin film layer for providing thermal assistance to the at least one of the patterned thin film layers and a conductor coupled to the heater material for supplying energy to the heater material.

Abstract translation: 公开了薄膜装置及其中提供热辅助的方法。 因此，使用加热器材料来热辅助薄膜器件的操作。 通过利用加热材料热辅助薄膜器件的操作，实现了薄膜器件的精度和性能的显着提高。 本发明的第一方面是一种薄膜器件。 所述薄膜器件包括至少一个图案化薄膜层，耦合到所述至少一个图案化薄膜层的加热器材料，用于向所述图案化薄膜层中的至少一个提供热辅助，以及耦合到所述加热器材料的导体， 向加热器材料供应能量。

公开(公告)号：US20050180238A1

公开(公告)日：2005-08-18

申请号：US10779909

申请日：2004-02-17

Applicant: Frederick Perner ,  Manoj Bhattacharyya

Inventor： Frederick Perner ,  Manoj Bhattacharyya

IPC: G11C11/15 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08 ,  G11C11/14 ,  G11C7/04

CPC classification number: G11C11/15 ,  G11C11/1675

Abstract: This invention provides a controlled temperature, thermal-assisted magnetic memory device. In a particular embodiment, there is an array of SVM cells, each characterized by an alterable orientation of magnetization and including a material wherein the coercivity is decreased upon an increase in temperature. In addition, at least one reference SVM (RSVM) cell substantially similar to and in close proximity to the SVM cells of the array is provided. A provided feedback control temperature controller receives a feedback voltage from the reference SVM cell, corresponding to temperature, and adjusts power applied to the RSVM cell and SVM cell. An associated method of use is further provided.

Abstract translation: 本发明提供一种受控温度的热辅助磁存储器件。 在特定实施例中，存在SVM单元阵列，每个SVM单元的特征在于磁化方向的可变方向，并且包括其中矫顽力在温度升高时降低的材料。 此外，提供了与阵列的SVM单元基本相似并且非常接近的至少一个参考SVM（RSVM）单元。 提供的反馈控制温度控制器从参考SVM单元接收对应于温度的反馈电压，并调整施加到RSVM单元和SVM单元的功率。 还提供了相关联的使用方法。

公开(公告)号：US20060215444A1

公开(公告)日：2006-09-28

申请号：US11089688

申请日：2005-03-24

Applicant: Frederick Perner ,  Janice Nickel ,  Lung Tran

Inventor： Frederick Perner ,  Janice Nickel ,  Lung Tran

IPC: G11C11/00

CPC classification number: G11C11/16 ,  G11C11/1675

Abstract: An information storage device is provided. The information storage device may be a magnetic random access memory (MRAM) device including a resistive cross point array of spin dependent tunneling (SDT) junctions or magnetic memory elements, with word lines extending along rows of the SDT junctions and bit lines extending along the columns of the SDT junctions. The present design includes a plurality of heating elements connected in series with associated magnetic memory elements, each heating element comprising a diode. Voltage applied to a magnetic memory element and associated heating element causes reverse current to flow through the diode, thereby producing heat from the diode and heating the magnetic memory element, thereby facilitating the write function of the device.

Abstract translation: 提供信息存储装置。 信息存储装置可以是包括自旋相关隧道（SDT）结或磁存储元件的电阻交叉点阵列的磁性随机存取存储器（MRAM）装置，其中字线沿着沿着SDT结的行和沿着 SDT路口的列。 本设计包括与相关联的磁存储元件串联连接的多个加热元件，每个加热元件包括二极管。 施加到磁存储元件和相关联的加热元件的电压导致反向电流流过二极管，从而从二极管产生热量并加热磁存储元件，从而有助于器件的写入功能。

公开(公告)号：US20050169059A1

公开(公告)日：2005-08-04

申请号：US10767428

申请日：2004-01-29

Applicant: Frederick Perner ,  Manoj Bhattacharyya

Inventor： Frederick Perner ,  Manoj Bhattacharyya

IPC: G11C11/15 ,  G11C5/00 ,  G11C7/00 ,  G11C11/16 ,  G11C29/00 ,  H01L21/8246 ,  H01L27/105

CPC classification number: G11C11/1673 ,  G11C11/1675 ,  G11C29/021 ,  G11C29/028 ,  G11C29/24 ,  G11C29/50008 ,  G11C2029/5002 ,  G11C2029/5006

Abstract: A magnetic memory cell write current threshold detector. The magnetic memory cell write current threshold detector includes a first MRAM test cell receiving a write current and sensing when the write current exceeds a first threshold, and a second MRAM test cell receiving the write current and sensing when the write current exceeds a second threshold.

Abstract translation: 磁存储单元写入电流阈值检测器。 磁存储单元写入电流阈值检测器包括第一MRAM测试单元，其接收写入电流并检测写入电流是否超过第一阈值;以及第二MRAM测试单元接收写入电流并感测写入电流超过第二阈值时。

公开(公告)号：US09384824B2

公开(公告)日：2016-07-05

申请号：US14396331

申请日：2012-07-10

Applicant: Frederick Perner

Inventor： Frederick Perner

IPC: G11C11/41 ,  G11C11/419 ,  G11C15/04 ,  G11C19/28 ,  G11C11/412

CPC classification number: G11C11/419 ,  G11C11/412 ,  G11C15/04 ,  G11C19/28

Abstract: A list sort static random access memory (LSSRAM) unit cell includes a static random access memory (SRAM) cell having a pair of cross-coupled elements to store data and a dynamic/static (D/S) mode selector to selectably switch the LSSRAM unit cell between a dynamic storage mode and a static storage mode. The LSSRAM unit cell further includes a swap selector to swap the stored data with data stored in an adjacent memory cell during the dynamic storage mode when the swap selector is activated, and a data comparator to compare the stored data in the SRAM cell with the data stored in the adjacent memory cell and to activate the swap selector according to a result of the comparison.

Abstract translation: 列表排序静态随机存取存储器（LSSRAM）单元包括具有一对交叉耦合元件以存储数据的静态随机存取存储器（SRAM）单元和用于可选地切换LSSRAM的动态/静态（D / S）模式选择器 动态存储模式和静态存储模式之间的单元格。 所述LSSRAM单元还包括交换选择器，用于在所述交换选择器被激活时在所述动态存储模式期间与存储在相邻存储器单元中的数据交换所存储的数据;以及数据比较器，用于将所述SRAM单元中存储的数据与所述数据进行比较 存储在相邻存储单元中并且根据比较的结果激活交换选择器。

公开(公告)号：US08542515B2

公开(公告)日：2013-09-24

申请号：US13384872

申请日：2010-04-30

Applicant: Frederick Perner

Inventor： Frederick Perner

IPC: G11C5/06

CPC classification number: H01L27/101 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

Abstract: A multi-plane circuit structure has at least a first circuit plane and a second circuit plane, and each circuit plane has a plurality of row wire segments, a plurality of column wire segments, and a plurality of crosspoint devices formed at intersections of the row wire segments and the column wire segments. The row and column wire segments have a segment length for forming a preselected number of crosspoint devices thereon. Each row wire segment in the second circuit plane is connected to a row wire segment in the first circuit plane with no offset in a row direction and in a column direction, and each column wire segment in the second circuit plane is connected to a column wire segment in the first circuit plane with an offset length in both the row direction and the column direction. The offset length corresponds to half of the preselected number of crosspoint devices.

Abstract translation: 多平面电路结构至少具有第一电路平面和第二电路平面，并且每个电路平面具有多个行线段，多个列线段和在行的交叉处形成的多个交叉点设备 线段和列线段。 行和列线段具有用于在其上形成预选数量的交叉点设备的段长度。 第二电路平面中的每行线段在第一电路平面中与行方向和列方向上没有偏移连接到行线段，并且第二电路平面中的每列线段连接到列线 在行方向和列方向上具有偏移长度的第一电路平面中的段。 偏移长度对应于预选数量的交叉点设备的一半。

公开(公告)号：US20130207069A1

公开(公告)日：2013-08-15

申请号：US13880269

申请日：2010-10-21

Applicant: Matthew D. Pickett ,  Philip J. Kuekes ,  R. Stanley Williams ,  Frederick Perner ,  Wei Wu ,  Alexandre M. Bratkovski

Inventor： Matthew D. Pickett ,  Philip J. Kuekes ,  R. Stanley Williams ,  Frederick Perner ,  Wei Wu ,  Alexandre M. Bratkovski

IPC: H01L47/02 ,  H01L47/00

CPC classification number: H01L47/02 ,  H01L47/005 ,  H01L49/003

Abstract: A metal-insulator transition switching device includes a first electrode and a second electrode. A channel region which includes a bulk metal-insulator transition material separates the first electrode and the second electrode. A method for forming a metal-insulator transition switching device includes depositing a layer of bulk metal-insulator transition material in between a first electrode and a second electrode to form a channel region and forming a gate electrode operatively connected to the channel region.

Abstract translation: 金属 - 绝缘体转变开关器件包括第一电极和第二电极。 包括体金属 - 绝缘体转移材料的沟道区域分离第一电极和第二电极。 一种用于形成金属 - 绝缘体转变开关器件的方法包括在第一电极和第二电极之间沉积体金属 - 绝缘体转变材料层以形成沟道区并形成可操作地连接到沟道区的栅电极。

公开(公告)号：US20110292712A1

公开(公告)日：2011-12-01

申请号：US12787857

申请日：2010-05-26

Applicant: Frederick Perner

Inventor： Frederick Perner

IPC: G11C11/00 ,  G11C7/00

CPC classification number: G11C7/062 ,  G11C13/0002 ,  G11C13/004 ,  G11C2013/0057 ,  G11C2213/77

Abstract: A method for reading a memory element within a crossbar array, the method including selecting a column line connected to a target memory element of the crossbar array by applying a supply voltage to a source follower, a gate terminal of the source follower connected to the column line; applying bias voltages to row lines of the crossbar array; storing an output voltage of the source follower in a storage element; applying a sense voltage to a row line connected to the target memory element; and outputting a difference between the voltage stored in the storage element and an output voltage of the source follower while the sense voltage is applied to the row line.

Abstract translation: 一种用于读取交叉开关阵列内的存储元件的方法，所述方法包括通过向源极跟随器施加电源电压来选择连接到所述交叉开关阵列的目标存储器元件的列线，所述源极跟随器的栅极端子连接到所述列 线; 向所述交叉开关阵列的行线施加偏置电压; 将源极跟随器的输出电压存储在存储元件中; 对连接到目标存储元件的行线施加感测电压; 并且当所述感测电压被施加到所述行线时，输出存储在所述存储元件中的电压与所述源极跟随器的输出电压之间的差。

公开(公告)号：US20060050552A1

公开(公告)日：2006-03-09

申请号：US10934243

申请日：2004-09-03

Applicant: Frederick Perner

Inventor： Frederick Perner

IPC: G11C11/14

CPC classification number: H01L27/228 ,  G11C11/15 ,  G11C11/16

Abstract: A memory device includes a first layer of MRAM memory cells arranged in accordance with an MRAM architecture, a second layer of MRAM memory cells that is fabricated over the first layer of MRAM memory cells, and a common connection associated with the first layer of MRAM memory cells and the second layer of MRAM memory cells that facilitates operation of the memory device. The method of fabricating the memory device includes fabricating a first layer of MRAM memory cells arranged in accordance with an MRAM architecture, fabricating a second layer of MRAM memory cells over the first layer of MRAM memory cells, and fabricating a common connection associated with the first layer of MRAM memory cells and the second layer of MRAM memory cells that facilitates operation of the memory device.

Abstract translation: 存储器件包括根据MRAM架构布置的MRAM存储器单元的第一层，在MRAM存储器单元的第一层上制造的第二层MRAM存储器单元，以及与MRAM存储器的第一层相关联的公共连接 单元和有助于存储器件操作的第二层MRAM存储器单元。 制造存储器件的方法包括制造根据MRAM架构布置的MRAM存储器单元的第一层，在MRAM存储单元的第一层上制造第二层MRAM存储器单元，以及制造与第一层MRAM存储单元相关联的公共连接 MRAM存储器单元的层和有助于存储器件的操作的MRAM存储器单元的第二层。