公开(公告)号：US20080148561A1

公开(公告)日：2008-06-26

申请号：US11615932

申请日：2006-12-22

申请人： Jaroslaw A. Magera ,  Bruce C. Deemer ,  Gregory J. Dunn

发明人： Jaroslaw A. Magera ,  Bruce C. Deemer ,  Gregory J. Dunn

IPC分类号： H01R43/00

CPC分类号： H05K3/0035 ,  H05K3/0047 ,  H05K3/4652 ,  H05K2201/0187 ,  H05K2203/0554 ,  H05K2203/063 ,  H05K2203/1476 ,  Y10T29/49165

摘要： A method of making a multilayer, printed wiring board may include pre-drilling a prepreg sheet to form a hole free of glass fibers. The hole has a first diameter. The method includes laminating the pre-drilled prepreg sheet between a copper foil and a substrate and allowing the hole to fill with resin from the prepreg sheet, patterning the copper foil to create an opening in a location associated with the resin-filled hole, drilling a via hole in the resin-filled hole, and metallizing the copper foil and the via hole. The via hole has a second diameter smaller than the first diameter.

摘要翻译： 制造多层印刷电路板的方法可以包括预先浸渍预浸料片以形成没有玻璃纤维的孔。 孔具有第一直径。 该方法包括在铜箔和基材之间层压预先预浸的预浸料片，并允许该孔从预浸料片填充树脂，图案化铜箔以在与树脂填充孔相关的位置形成开口 树脂填充孔中的通孔，铜箔和通孔的金属化。 通孔具有小于第一直径的第二直径。

公开(公告)号：US06841080B2

公开(公告)日：2005-01-11

申请号：US10352483

申请日：2003-01-28

申请人： Angus Kingon ,  Gregory J. Dunn ,  Stephen Streiffer ,  Kevin Cheek ,  Min-Xian Zhang ,  Jon-Paul Maria ,  Jovica Savic

发明人： Angus Kingon ,  Gregory J. Dunn ,  Stephen Streiffer ,  Kevin Cheek ,  Min-Xian Zhang ,  Jon-Paul Maria ,  Jovica Savic

IPC分类号： C23C28/00 ,  H01G4/12 ,  H05K1/16 ,  H01G13/00 ,  H01G4/00 ,  H01G5/00 ,  H01G7/00 ,  H01G9/00

CPC分类号： H05K1/162 ,  H01G4/1218 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2203/121 ,  Y10T29/417

摘要： A dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil comprising a conductive metal layer, a barrier layer and a dielectric oxide layer. Such multi-layer foils are mechanically flexible, and useful for the manufacture of capacitors. Examples of barrier layers include Ni—P or Ni—Cr alloys. After a second layer of conductive metal is deposited on a dielectric oxide surface opposing the first conductive metal layer, the resulting capacitor foil is processed into a capacitor. The resulting capacitor is a surface mounted capacitor or is formed as a integrated or embedded capacitor within a circuit board.

摘要翻译： 在独立的导电金属层上形成电介质膜以形成包含导电金属层，阻挡层和电介质氧化物层的多层箔。 这种多层箔是机械灵活的，并且可用于制造电容器。 阻挡层的实例包括Ni-P或Ni-Cr合金。 在与第一导电金属层相对的电介质氧化物表面上沉积第二层导电金属之后，将所得电容器箔加工成电容器。 所得到的电容器是表面安装的电容器，或者形成为电路板内的集成或嵌入式电容器。

公开(公告)号：US06606793B1

公开(公告)日：2003-08-19

申请号：US09628486

申请日：2000-07-31

申请人： Gregory J. Dunn

发明人： Gregory J. Dunn

IPC分类号： H01K310

CPC分类号： H05K1/162 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09763 ,  Y10T29/49156 ,  Y10T29/49167

摘要： A method for forming an embedded low profile capacitor in a multilayer printed circuit board. The method entails providing a first metal plate on a dielectric substrate. A dielectric layer of a photopolymeric material is applied onto a first region of the first metal plate, surrounded by a second region that is exposed. A second metal plate is deposited onto the dielectric layer and the second region of the first metal plate. The second plate is then patterned to decline an upper electrode on the dielectric layer that is electrically isolated from the first metal plate. This may be accomplished by forming a trench in the second metal plate above the dielectric layer. In one aspect, the resulting capacitor thus comprises a lower electrode structure derived mainly from the first metal plate, a dielectric layer overlying the first region of the first metal plate and an upper electrode overlying the dielectric layer. The lower metal structure also includes an extension deposited onto the second region of the first metal layer about the dielectric layer and including a lip overlying a perimeter of the dielectric layer surface.

摘要翻译： 一种在多层印刷电路板中形成嵌入式薄型电容器的方法。 该方法需要在电介质基底上提供第一金属板。 将光聚合材料的电介质层施加到第一金属板的第一区域上，被暴露的第二区域包围。 第二金属板沉积在第一金属板的电介质层和第二区上。 然后对第二板进行图案化以使与第一金属板电隔离的电介质层上的上电极下降。 这可以通过在介电层上方的第二金属板中形成沟槽来实现。 一方面，所得到的电容器包括主要由第一金属板衍生的下电极结构，覆盖第一金属板的第一区域的电介质层和覆盖在电介质层上的上电极。 下部金属结构还包括在电介质层周围沉积到第一金属层的第二区域上的延伸部分，并且包括覆盖在电介质层表面的周边上的唇缘。

公开(公告)号：US06541137B1

公开(公告)日：2003-04-01

申请号：US09629504

申请日：2000-07-31

申请人： Angus Kingon ,  Gregory J. Dunn ,  Stephen Streiffer ,  Kevin Cheek ,  Min-Xian Zhang ,  Jon-Paul Maria ,  Jovica Savic

发明人： Angus Kingon ,  Gregory J. Dunn ,  Stephen Streiffer ,  Kevin Cheek ,  Min-Xian Zhang ,  Jon-Paul Maria ,  Jovica Savic

IPC分类号： B32B900

CPC分类号： H05K1/162 ,  H01G4/1218 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2203/121 ,  Y10T29/417

摘要： A dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil comprising a conductive metal layer, a barrier layer and a dielectric oxide layer. Such multi-layer foils are mechanically flexible, and useful for the manufacture of capacitors. Examples of barrier layers include Ni—P or Ni—Cr alloys. After a second layer of conductive metal is deposited on a dielectric oxide surface opposing the first conductive metal layer, the resulting capacitor foil is processed into a capacitor. The resulting capacitor is a surface mounted capacitor or is formed as a integrated or embedded capacitor within a circuit board.

摘要翻译： 在独立的导电金属层上形成电介质膜以形成包含导电金属层，阻挡层和电介质氧化物层的多层箔。 这种多层箔是机械灵活的，并且可用于制造电容器。 阻挡层的实例包括Ni-P或Ni-Cr合金。 在与第一导电金属层相对的电介质氧化物表面上沉积第二层导电金属之后，将所得电容器箔加工成电容器。 所得到的电容器是表面安装的电容器，或者形成为电路板内的集成或嵌入式电容器。

公开(公告)号：US06440318B1

公开(公告)日：2002-08-27

申请号：US09507579

申请日：2000-02-18

申请人： Tien Lee ,  Lawrence Lach ,  Gregory J. Dunn

发明人： Tien Lee ,  Lawrence Lach ,  Gregory J. Dunn

IPC分类号： H01B1300

CPC分类号： H05K1/167 ,  H05K3/0023 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/0317 ,  H05K2201/09509 ,  H05K2201/09672 ,  H05K2201/09845 ,  H05K2201/10045 ,  H05K2203/0361 ,  Y10T29/49082

摘要： A thin-film metal resistor (44) suitable for a multilayer printed circuit board (12), and a method for its fabrication. The resistor (44) generally has a multilayer construction, with the individual layers (34, 38) of the resistor (44) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (34, 38). As a result, the resistor (44) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (44) reduces the area of the circuit board (12) required to accommodate the resistor (44), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (12).

摘要翻译： 适用于多层印刷电路板（12）的薄膜金属电阻（44）及其制造方法。 电阻器（44）通常具有多层结构，其中电阻器（44）的各个层（34,38）彼此自对准，使得产生负的互感，其几乎抵消了自感 的每个电阻层（34,38）。 结果，电阻器（44）具有非常低的净寄生电感。 此外，电阻器（44）的多层结构减小了容纳电阻器（44）所需的电路板（12）的面积，结果减少了与其他层上的其它电路元件的寄生相互作用的问题 电路板（12）。

公开(公告)号：US6103134A

公开(公告)日：2000-08-15

申请号：US224011

申请日：1998-12-31

申请人： Gregory J. Dunn ,  Larry Lach ,  Jovica Savic ,  Allyson Beuhler ,  Everett Simons

发明人： Gregory J. Dunn ,  Larry Lach ,  Jovica Savic ,  Allyson Beuhler ,  Everett Simons

IPC分类号： H01F17/00 ,  H01F41/04 ,  H01L21/768 ,  H01L23/522 ,  H05K1/16 ,  H05K3/00 ,  H05K3/06 ,  H05K3/46

CPC分类号： H05K3/0082 ,  H01F41/041 ,  H01F41/046 ,  H05K1/165 ,  H05K3/0023 ,  H01F17/0013 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/086 ,  H05K2201/09236 ,  H05K2203/0551 ,  H05K3/4652

摘要： A method for fabricating circuit board conductors with desirable processing and reduced self and mutual capacitance. The method generally entails forming a metal layer on a positive-acting photodielectric layer formed on a substrate, and then etching the metal layer to form at least two conductor traces that cover two separate regions of the photodielectric layer while exposing a third region of the photodielectric layer between the two regions. The third region of the photodielectric layer is then irradiated and developed using the two traces as a photomask, so that the third region of the photodielectric layer is removed. The two remaining regions of the photodielectric layer masked by the traces remain on the substrate and are separated by an opening formed by the removal of the third dielectric region. As a result, the traces are not only separated by a void immediately therebetween formed when the metal layer was etched, but are also separated by the opening formed in the photodielectric layer by the removal of the third region of the photodielectric layer. Traces formed in accordance with the above may be formed as adjacent and parallel conductors or adjacent inductor windings of an integral inductor.

摘要翻译： 一种用于制造具有所需加工和减小的自相互电容的电路板导体的方法。 该方法通常需要在形成在衬底上的正性作用的光致电介质层上形成金属层，然后蚀刻金属层以形成覆盖光致介电层的两个分离区域的至少两个导体迹线，同时暴露光致介电层的第三区域 两个地区之间。 然后使用两条迹线作为光掩模来照射和显影光致电介质层的第三区域，从而去除光致电介质层的第三区域。 由迹线掩蔽的光电介质层的两个剩余区域保留在基板上，并由通过去除第三介电区域形成的开口分开。 结果，痕迹不仅仅在金属层被蚀刻时形成的空隙之间分开，而且还通过去除光致电介质层的第三区域而被形成在光致电介质层中的开口分开。 根据上述形成的迹线可以形成为整体电感器的相邻和平行的导体或相邻的电感器绕组。

公开(公告)号：US08947534B2

公开(公告)日：2015-02-03

申请号：US12483088

申请日：2009-06-11

申请人： Gregory J. Dunn ,  Robert T. Croswell ,  Zhiyuan Z. Li

发明人： Gregory J. Dunn ,  Robert T. Croswell ,  Zhiyuan Z. Li

IPC分类号： H04N7/18 ,  H04N5/272

CPC分类号： H04N5/272 ,  H04N5/2723

摘要： A device for use with an imaging system that is operable to provide an image signal based on an object disposed at a first distance from the imaging system. The imaging system includes a first camera, a second camera and a display. The first camera is operable to generate a first image signal based on the object and includes a first optics system and a first detector. The first optics system has a focal length, whereas the first detector has a resolution. The second camera is operable to generate a second image signal based on the object. The second camera includes a second optics system and a second detector. The second optics system has the same focal length of the first optics system and the second detector has the same resolution as the first detector. The second camera is separated from the first camera by a second distance. The display is operable to display an image based on a modified image. The device comprises an image processor that is operable to establish a virtual separation membrane and to output a modified image based on the first image signal, the second image signal, the virtual separation membrane, the second distance, the focal length and the resolution.

摘要翻译： 一种与成像系统一起使用的装置，其可操作以基于设置在离成像系统第一距离处的物体提供图像信号。 成像系统包括第一相机，第二相机和显示器。 第一相机可操作以基于对象生成第一图像信号，并且包括第一光学系统和第一检测器。 第一光学系统具有焦距，而第一检测器具有分辨率。 第二相机可操作以基于对象生成第二图像信号。 第二相机包括第二光学系统和第二检测器。 第二光学系统具有与第一光学系统相同的焦距，第二检测器具有与第一检测器相同的分辨率。 第二个相机与第一个相机分离第二个距离。 显示器可操作以基于修改的图像显示图像。 该装置包括图像处理器，其可操作以建立虚拟分离膜并且基于第一图像信号，第二图像信号，虚拟分离膜，第二距离，焦距和分辨率来输出修改的图像。

公开(公告)号：US08504640B2

公开(公告)日：2013-08-06

申请号：US12476754

申请日：2009-06-02

申请人： Edward Rios ,  Terance B. Blake ,  Gregory J. Dunn ,  Boaz J. Super

发明人： Edward Rios ,  Terance B. Blake ,  Gregory J. Dunn ,  Boaz J. Super

IPC分类号： G06F15/16

CPC分类号： G06T15/205 ,  G06T17/00

摘要： A method of providing three dimensional (3D) information is disclosed in which a master recruits a local slave to provide contemporaneous images. The images are collected and 3D information extracted therefrom. The 3D information or various images may be transmitted to a remote device and is employed to provide a substitute background that replaces the background of the original image. Either the new image is displayed on one or both devices. The images can be collected and the 3D information extracted at either of the master or slave or at a separate device. To recruit the slave, the master broadcasts a query to all local devices, determines the available devices and their characteristics, automatically or manually selects a particular device, requests authorization from the selected device, and pairs with the selected device when authorization is received. Devices of the same or different types may be paired.

摘要翻译： 公开了一种提供三维（3D）信息的方法，其中主人招聘本地从属装置以提供同时期的图像。 收集图像并从中提取3D信息。 3D信息或各种图像可以被发送到远程设备，并且被用于提供替代原始图像的背景的替代背景。 新图像显示在一个或两个设备上。 可以收集图像，并在主或从机或分离的设备中提取三维信息。 要招募从属设备，主机向所有本地设备广播查询，确定可用设备及其特性，自动或手动选择特定设备，从所选设备请求授权，并在接收到授权时与所选设备配对。 相同或不同类型的设备可能配对。

公开(公告)号：US08410536B2

公开(公告)日：2013-04-02

申请号：US13345227

申请日：2012-01-06

申请人： John D. Prymak ,  Chris Stolarski ,  Alethia Melody ,  Antony P. Chacko ,  Gregory J. Dunn

发明人： John D. Prymak ,  Chris Stolarski ,  Alethia Melody ,  Antony P. Chacko ,  Gregory J. Dunn

IPC分类号： H01L27/108 ,  H01G4/005

CPC分类号： H05K1/162 ,  H01G9/012 ,  H01G9/042 ,  H01G9/045 ,  H01G9/15 ,  H05K3/429 ,  H05K2201/0329 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2201/09909 ,  H05K2203/0315 ,  Y10T29/417 ,  Y10T29/435

摘要： A process for forming a laminate with capacitance and the laminate formed thereby. The process includes the steps of providing a substrate and laminating a conductive foil on the substrate wherein the foil has a dielectric. A conductive layer is formed on the dielectric. The conductive foil is treated to electrically isolate a region of conductive foil containing the conductive layer from additional conductive foil. A cathodic conductive couple is made between the conductive layer and a cathode trace and an anodic conductive couple is made between the conductive foil and an anode trace.

摘要翻译： 一种用于形成具有电容的叠层的方法和由此形成的层压体。 该方法包括以下步骤：提供衬底并将导电箔层压在衬底上，其中箔具有电介质。 在电介质上形成导电层。 处理导电箔以将包含导电层的导电箔的区域与另外的导电箔电隔离。 在导电层和阴极迹线之间形成阴极导电对，并且在导电箔和阳极迹线之间形成阳极导电耦合。

公开(公告)号：US07518465B2

公开(公告)日：2009-04-14

申请号：US11616061

申请日：2006-12-26

申请人： Jovica Savic ,  Gregory J. Dunn ,  John A. Svigelj

发明人： Jovica Savic ,  Gregory J. Dunn ,  John A. Svigelj

IPC分类号： H01P1/06 ,  H01P5/04 ,  H01Q1/38

CPC分类号： H05K1/162 ,  H01G5/18 ,  H01Q15/0066 ,  H01Q15/147 ,  H05K1/116 ,  H05K3/0023 ,  H05K3/4652 ,  H05K2201/0195 ,  H05K2201/09109 ,  H05K2201/09436 ,  H05K2201/096 ,  Y10T29/49117

摘要： A tunable high impedance surface device (100) includes a conductive ground plane (105) and a plurality of conductive elements (110-114) electrically connected to the conductive ground plane (105). The device (100) also includes a plurality of capacitive elements (120-124) operable to vary a predetermined electromagnetic characteristic of the apparatus and standoffs (130, 132) between the plurality of capacitive elements (120-124) and the plurality of conductive elements (110-114). In one form, laser-drilled and electrically conductive micro-vias (136, 138) extend through the standoffs (130, 132) thereby electrically connecting the plurality of capacitive elements (120-124) to a data bus (140). The capacitive elements (120-124) may be integral with a circuit board (144) that supports the plurality conductive elements (110-114). Either the capacitive elements (120-124) or the conductive elements (110-114) are mechanically flexible and selectively movable to controllably adjust the distance (142) between the capacitive and conductive elements.

摘要翻译： 可调谐高阻抗表面器件（100）包括导电接地平面（105）和电连接到导电接地平面（105）的多个导电元件（110-114）。 设备（100）还包括多个电容元件（120-124），可操作以改变设备的预定电磁特性和多个电容元件（120-124）与多个导电（120-124）之间的支座（130,132） 元素（110-114）。 在一种形式中，激光钻孔和导电微通孔（136,138）延伸穿过支座（130,132），从而将多个电容元件（120-124）电连接到数据总线（140）。 电容元件（120-124）可以与支撑多个导电元件（110-114）的电路板（144）成一体。 电容元件（120-124）或导电元件（110-114）中的任何一个都是机械地柔性的并且选择性地可移动以可控地调节电容元件和导电元件之间的距离（142）。