公开(公告)号：US08981384B2

公开(公告)日：2015-03-17

申请号：US13805279

申请日：2011-07-14

Applicant: Takeyoshi Masuda

Inventor： Takeyoshi Masuda

IPC: H01L29/15 ,  H01L29/861 ,  H01L21/3065 ,  H01L29/739 ,  H01L29/04 ,  H01L29/16 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L21/04 ,  H01L29/06

CPC classification number: H01L29/1608 ,  H01L21/0445 ,  H01L21/3065 ,  H01L29/045 ,  H01L29/0623 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/8613 ,  Y10S438/931

Abstract: There are provided a high-quality semiconductor device having stable characteristics and a method for manufacturing such a semiconductor device. The semiconductor device includes a substrate having a main surface, and a silicon carbide layer. The silicon carbide layer is formed on the main surface of the substrate. The silicon carbide layer includes a side surface as an end surface inclined relative to the main surface. The side surface substantially includes one of a {03-3-8} plane and a {01-1-4} plane in a case where the silicon carbide layer is of hexagonal crystal type, and substantially includes a {100} plane in a case where the silicon carbide layer is of cubic crystal type.

Abstract translation: 提供了具有稳定特性的高质量半导体器件和制造这种半导体器件的方法。 半导体器件包括具有主表面的基底和碳化硅层。 碳化硅层形成在基板的主表面上。 碳化硅层包括作为相对于主表面倾斜的端面的侧表面。 在碳化硅层为六方晶型的情况下，侧表面基本上包括{03-3-8}面和{01-1-4}面之一，并且基本上包括{100}面 碳化硅层为立方晶型的情况。

公开(公告)号：US08802552B2

公开(公告)日：2014-08-12

申请号：US13546828

申请日：2012-07-11

Applicant: Taku Horii ,  Takeyoshi Masuda

Inventor： Taku Horii ,  Takeyoshi Masuda

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/336

CPC classification number: H01L29/7802 ,  H01L21/0485 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/66068

Abstract: A method for manufacturing a MOSFET includes the steps of: forming a gate oxide film on an active layer, forming a gate electrode on the gate oxide film, forming a source contact electrode in ohmic contact with the active layer, and forming an interlayer insulating film made of silicon dioxide so as to cover the gate electrode after the source contact electrode is formed. The step of forming a source contact electrode includes the steps of forming a metal layer including aluminum so as to be in contact with the active layer, and alloying the metal layer.

Abstract translation: 一种制造MOSFET的方法包括以下步骤：在有源层上形成栅极氧化膜，在栅极氧化膜上形成栅电极，形成与有源层欧姆接触的源极接触电极，并形成层间绝缘膜 在形成源极接触电极之后，覆盖栅电极，由二氧化硅构成。 形成源极接触电极的步骤包括以下步骤：形成包含铝的金属层以与活性层接触，并使金属层合金化。

公开(公告)号：US08765617B2

公开(公告)日：2014-07-01

申请号：US13415319

申请日：2012-03-08

Applicant: Takeyoshi Masuda

Inventor： Takeyoshi Masuda

IPC: H01L21/469 ,  H01L21/31

CPC classification number: H01L21/3247 ,  H01L21/046 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7802

Abstract: A method of manufacturing a MOSFET includes the steps of preparing a substrate with an epitaxial growth layer made of silicon carbide, performing ion implantation into the substrate with the epitaxial growth layer, forming a protective film made of silicon nitride on the substrate with the epitaxial growth layer into which the ion implantation was performed, and heating the substrate with the epitaxial growth layer on which the protective film was formed to a temperature range of 1600° C. or more in an atmosphere containing gas including a nitrogen atom.

Abstract translation: 一种制造MOSFET的方法包括以下步骤：制备具有由碳化硅制成的外延生长层的衬底，用外延生长层对衬底进行离子注入，在衬底上形成具有外延生长的氮化硅保护膜 进行离子注入的层，并且在其中形成有保护膜的外延生长层在包含氮原子的气体的气氛中在1600℃以上的温度范围内加热基板。

公开(公告)号：US08524585B2

公开(公告)日：2013-09-03

申请号：US13415406

申请日：2012-03-08

Applicant: Takeyoshi Masuda

Inventor： Takeyoshi Masuda

IPC: H01L21/265

CPC classification number: H01L21/3247 ,  H01L21/046 ,  H01L21/324 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7802

Abstract: A method of manufacturing a MOSFET includes the steps of preparing a substrate with an epitaxial growth layer made of silicon carbide, performing ion implantation into the substrate with the epitaxial growth layer, forming a protective film made of silicon dioxide on the substrate with the epitaxial growth layer into which the ion implantation was performed, and heating the substrate with the epitaxial growth layer on which the protective film was formed to a temperature range of 1600° C. or more in an atmosphere containing gas including an oxygen atom.

Abstract translation: 一种制造MOSFET的方法包括以下步骤：制备具有由碳化硅制成的外延生长层的衬底，用外延生长层进行衬底的离子注入，在衬底上形成具有外延生长的二氧化硅保护膜 进行离子注入的层，并且在形成有保护膜的外延生长层的基板中，在含有氧原子的气体的气氛中，在1600℃以上的温度范围内进行加热。

公开(公告)号：US20130062629A1

公开(公告)日：2013-03-14

申请号：US13607388

申请日：2012-09-07

Applicant: Toru Hiyoshi ,  Takeyoshi Masuda ,  Keiji Wada

Inventor： Toru Hiyoshi ,  Takeyoshi Masuda ,  Keiji Wada

IPC: H01L29/12 ,  H01L21/20

CPC classification number: H01L21/3065 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02587 ,  H01L21/0262 ,  H01L21/0475 ,  H01L21/3081 ,  H01L29/045 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/0839 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66068 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/7813 ,  Y10S438/931

Abstract: A substrate is provided with a main surface having an off angle of 5° or smaller relative to a reference plane. The reference plane is a {000-1} plane in the case of hexagonal system and is a {111} plane in the case of cubic system. A silicon carbide layer is epitaxially formed on the main surface of the substrate. The silicon carbide layer is provided with a trench having first and second side walls opposite to each other. Each of the first and second side walls includes a channel region. Further, each of the first and second side walls substantially includes one of a {0-33-8} plane and a {01-1-4} plane in the case of the hexagonal system and substantially includes a {100} plane in the case of the cubic system.

Abstract translation: 衬底设置有相对于参考平面具有5°或更小偏离角的主表面。 在六边形系统的情况下，参考平面为{000-1}平面，在立方体系的情况下为{111}面。 在基板的主表面上外延形成碳化硅层。 碳化硅层设置有具有彼此相对的第一和第二侧壁的沟槽。 第一和第二侧壁中的每一个包括通道区域。 此外，在六边形系统的情况下，第一和第二侧壁中的每一个基本上包括{0-33-8}面和{01-1-4}面之一，并且在 立方体系的情况。

公开(公告)号：US20130023113A1

公开(公告)日：2013-01-24

申请号：US13550119

申请日：2012-07-16

Applicant: Takeyoshi Masuda ,  Tomoaki Hatayama

Inventor： Takeyoshi Masuda ,  Tomoaki Hatayama

IPC: H01L21/22

CPC classification number: H01L29/7813 ,  H01L21/046 ,  H01L21/324 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068

Abstract: A method for manufacturing a MOSFET includes the steps of: introducing an impurity into a silicon carbide layer; forming a carbon layer in a surface layer portion of the silicon carbide layer having the impurity introduced therein, by selectively removing silicon from the surface layer portion; and activating the impurity by heating the silicon carbide layer having the carbon layer formed therein.

Abstract translation: 一种制造MOSFET的方法包括以下步骤：将杂质引入到碳化硅层中; 通过从表层部选择性地除去硅，在其中引入了杂质的碳化硅层的表层部分形成碳层; 并通过加热其中形成有碳层的碳化硅层来活化杂质。

公开(公告)号：US20120168774A1

公开(公告)日：2012-07-05

申请号：US13395768

申请日：2011-05-19

Applicant: Takeyoshi Masuda ,  Satomi Itoh ,  Shin Harada ,  Makoto Sasaki

Inventor： Takeyoshi Masuda ,  Satomi Itoh ,  Shin Harada ,  Makoto Sasaki

IPC: H01L29/24 ,  H01L21/20

CPC classification number: H01L21/187 ,  C30B29/36 ,  C30B33/06 ,  H01L29/1608

Abstract: A silicon carbide substrate and a method for manufacturing the silicon carbide substrate are obtained, each of which achieves reduced manufacturing cost of semiconductor devices using the silicon carbide substrate. A method for manufacturing a SiC-combined substrate includes the steps of: preparing a plurality of single-crystal bodies each made of silicon carbide (SiC); forming a collected body; connecting the single-crystal bodies to each other; and slicing the collected body. In the step, the plurality of SiC single-crystal ingots are arranged with a silicon (Si) containing Si layer interposed therebetween, so as to form the collected body including the single-crystal bodies. In the step, adjacent SiC single-crystal ingots are connected to each other via at least a portion of the Si layer, the portion being formed into silicon carbide by heating the collected body. In step, the collected body in which the SiC single-crystal ingots are connected to each other is sliced.

Abstract translation: 获得碳化硅基板和制造碳化硅基板的方法，其中的每一个都降低了使用碳化硅基板的半导体器件的制造成本。 SiC复合衬底的制造方法包括以下步骤：制备由碳化硅（SiC）制成的多个单晶体; 形成收集体; 将单晶体体彼此连接; 并切片收集的身体。 在该步骤中，多个SiC单晶锭被布置成包含硅（Si）的Si层，以形成包括单晶体的收集体。 在该步骤中，相邻的SiC单晶锭通过Si层的至少一部分彼此连接，该部分通过加热收集体而形成为碳化硅。 在步骤中，将SiC单晶锭彼此连接的收集体切片。

公开(公告)号：US20120097980A1

公开(公告)日：2012-04-26

申请号：US13381605

申请日：2011-02-07

Applicant: Takeyoshi Masuda ,  Keiji Wada ,  Misako Honaga

Inventor： Takeyoshi Masuda ,  Keiji Wada ,  Misako Honaga

IPC: H01L29/24 ,  H01L21/265

CPC classification number: H01L29/7811 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/41741 ,  H01L29/42372 ,  H01L29/66068

Abstract: A termination configuration of a silicon carbide insulating gate type semiconductor device includes a semiconductor layer of a first conductivity type having a first main face, a gate electrode, and a source interconnection, as well as a circumferential resurf region. The semiconductor layer includes a body region of a second conductivity type, a source region of the first conductivity type, a contact region of the second conductivity type, and a circumferential resurf region of the second conductivity type. A width of a portion of the circumferential resurf region excluding the body region is greater than or equal to ½ the thickness of at least the semiconductor layer. A silicon carbide insulating gate type semiconductor device of high breakdown voltage and high performance can be provided.

Abstract translation: 碳化硅绝缘栅型半导体器件的端接构造包括具有第一主面，栅电极和源极互连的第一导电类型的半导体层以及周向复原区域。 半导体层包括第二导电类型的主体区域，第一导电类型的源极区域，第二导电类型的接触区域和第二导电类型的周边复原区域。 除了身体区域之外的圆周清理区域的一部分的宽度大于或等于至少半导体层的厚度的1/2。 可以提供具有高击穿电压和高性能的碳化硅绝缘栅型半导体器件。

公开(公告)号：US20120056202A1

公开(公告)日：2012-03-08

申请号：US13320247

申请日：2010-04-27

Applicant: Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

Inventor： Keiji Wada ,  Shin Harada ,  Takeyoshi Masuda ,  Misako Honaga ,  Makoto Sasaki ,  Taro Nishiguchi ,  Yasuo Namikawa ,  Shinsuke Fujiwara

IPC: H01L29/24

CPC classification number: H01L29/7802 ,  C30B23/00 ,  C30B29/36 ,  C30B33/06 ,  H01L21/02378 ,  H01L21/02529 ,  H01L21/2007 ,  H01L29/045 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7395

Abstract: A MOSFET, which is a semiconductor device allowing for reduced on-resistance while restraining stacking faults from being produced due to heat treatment in a device manufacturing process, includes: a silicon carbide substrate; an active layer made of single-crystal silicon carbide and disposed on one main surface of the silicon carbide substrate; a source contact electrode disposed on the active layer; and a drain electrode formed on the other main surface of the silicon carbide substrate. The silicon carbide substrate includes: a base layer made of silicon carbide; and a SiC layer made of single-crystal silicon carbide and disposed on the base layer. Further, the base layer has an impurity concentration greater than 2×1019 cm−3, and the SiC layer has an impurity concentration greater than 5×1018 cm−3 and smaller than 2×1019 cm−3.

Abstract translation: 一种MOSFET，其是在器件制造工艺中由于热处理而允许抑制堆垛层错而产生降低的导通电阻的半导体器件，包括：碳化硅衬底; 由单晶碳化硅构成的有源层，设置在碳化硅基板的一个主面上; 设置在有源层上的源极接触电极; 以及形成在碳化硅衬底的另一个主表面上的漏电极。 碳化硅基板包括：由碳化硅制成的基层; 以及由单晶碳化硅制成并设置在基底层上的SiC层。 此外，基底层的杂质浓度大于2×1019cm-3，并且SiC层的杂质浓度大于5×1018cm-3且小于2×1019cm-3。

公开(公告)号：US20120012862A1

公开(公告)日：2012-01-19

申请号：US13258801

申请日：2010-09-29

Applicant: Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Shinsuke Fujiwara ,  Yasuo Namikawa ,  Takeyoshi Masuda

Inventor： Taro Nishiguchi ,  Makoto Sasaki ,  Shin Harada ,  Shinsuke Fujiwara ,  Yasuo Namikawa ,  Takeyoshi Masuda

IPC: H01L29/24 ,  H01L21/04

CPC classification number: H01L29/7802 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/0475 ,  H01L21/187 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/66068

Abstract: A method for manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate made of silicon carbide and a SiC substrate made of single-crystal silicon carbide; and connecting the base substrate and SiC substrate to each other by forming an intermediate layer, which is made of carbon that is a conductor, between the base substrate and the SiC substrate.

Abstract translation: 制造碳化硅基板的方法包括以下步骤：制备由碳化硅制成的基底基板和由单晶碳化硅制成的SiC基板; 并且通过在基底基板和SiC基板之间形成由导电体的碳制成的中间层，将基底基板与SiC基板相互连接。