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    Multi-Gate Devices And Method Of Fabrication Thereof
    22.
    发明申请
    Multi-Gate Devices And Method Of Fabrication Thereof 有权

    公开(公告)号：US20210066477A1

    公开(公告)日：2021-03-04

    申请号：US16931930

    申请日：2020-07-17

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wei Ju Lee ,  Chun-Fu Cheng ,  Chung-Wei Wu ,  Zhiqiang Wu

    IPC: H01L29/66 ,  H01L29/78 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/08

    Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes forming a fin structure in which first semiconductor layers and second semiconductor layers are alternately stacked; forming a sacrificial gate structure over the fin structure; etching a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, thereby forming a source/drain trench; laterally etching the first semiconductor layers through the source/drain trench; forming an inner spacer layer, in the source/drain trench, at least on lateral ends of the etched first semiconductor layers; forming a seeding layer on the inner spacer layer; and growing a source/drain epitaxial layer in the source/drain trench, wherein the growing of the source/drain epitaxial layer includes growing the source/drain epitaxial layer from the seeding layer.

    Air-replaced spacer for self-aligned contact scheme
    26.
    发明授权
    Air-replaced spacer for self-aligned contact scheme 有权

    公开(公告)号：US11264270B2

    公开(公告)日：2022-03-01

    申请号：US16823943

    申请日：2020-03-19

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Meng-Yu Lin ,  Chun-Fu Cheng ,  Chung-Wei Wu ,  Zhiqiang Wu

    IPC: H01L21/768 ,  H01L21/02

    Abstract: The present disclosure describes a method of fabricating a semiconductor structure that includes forming a dummy gate structure over a substrate, forming a first spacer on a sidewall of the dummy gate structure and a second spacer on the first spacer, forming a source/drain structure on the substrate, removing the second spacer, forming a dielectric structure over the source/drain structure, replacing the dummy gate structure with a metal gate structure and a capping structure on the metal gate structure, and forming an opening in the dielectric structure. The opening exposes the source/drain structure. The method further includes forming a dummy spacer on a sidewall of the opening, forming a contact structure in the opening, and removing the dummy spacer to form an air gap between the contact structure and the metal gate structure. The contact structure is in contact with the source/drain structure in the opening.

    Gate All Around Transistor Device and Fabrication Methods Thereof
    27.
    发明申请
    Gate All Around Transistor Device and Fabrication Methods Thereof 有权

    公开(公告)号：US20210343858A1

    公开(公告)日：2021-11-04

    申请号：US17170263

    申请日：2021-02-08

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chih-Ching Wang ,  Chia-Ying Su ,  Wen-Hsing Hsieh ,  Kuan-Lun Cheng ,  Chung-Wei Wu ,  Zhiqiang Wu

    IPC: H01L29/66 ,  H01L27/092 ,  H01L29/78 ,  H01L29/06 ,  H01L21/8234

    Abstract: Embodiments of the present disclosure includes a method of forming a semiconductor device. The method includes providing a substrate having a plurality of first semiconductor layers and a plurality of second semiconductor layers disposed over the substrate. The method also includes patterning the first semiconductor layers and the second semiconductor layers to form a first fin and a second fin, removing the first semiconductor layers from the first and second fins such that a first portion of the patterned second semiconductor layers becomes first suspended nanostructures in the first fin and that a second portion of the patterned second semiconductor layers becomes second suspended nanostructures in the second fin, and doping a threshold modifying impurity into the first suspended nanostructures in the first fin. The impurity causes transistors formed with the first fin and second fin have different threshold voltages.

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