公开(公告)号：US09875964B2

公开(公告)日：2018-01-23

申请号：US14166686

申请日：2014-01-28

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Bi-Ling Lin ,  Jian-Hong Lin ,  Ming-Hong Hsieh ,  Lee-Der Chen ,  Jiaw-Ren Shih ,  Chwei-Ching Chiu

IPC: H01L23/48 ,  H01L23/525 ,  H01L21/66 ,  H01L23/522 ,  G01R31/28

CPC classification number: H01L23/5256 ,  G01R31/2853 ,  G01R31/2858 ,  G01R31/2884 ,  H01L22/34 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor device components and methods are disclosed. In one embodiment, a semiconductor device component includes a conductive segment having a first surface, a second surface opposite the first surface, a first end, and a second end opposite the first end. A first via is coupled to the second surface of the conductive segment at the first end. A second via is coupled to the first surface of the conductive segment at the second end, and a third via is coupled to the second surface of the conductive segment at the second end.

公开(公告)号：US08729705B2

公开(公告)日：2014-05-20

申请号：US14132373

申请日：2013-12-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Jung Wang ,  Jian-Hong Lin

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor chip includes a seal ring adjacent to edges of the semiconductor chip; an opening extending from a top surface to a bottom surface of the seal ring, wherein the opening has a first end on an outer side of the seal ring and a second end on an inner side of the seal ring; and a moisture barrier having a sidewall parallel to a nearest side of the seal ring, wherein the moisture barrier is adjacent the seal ring and has a portion facing the opening.

Abstract translation: 半导体芯片包括与半导体芯片的边缘相邻的密封环; 从所述密封环的顶表面延伸到底表面的开口，其中所述开口具有在所述密封环的外侧上的第一端和所述密封环的内侧上的第二端; 以及具有平行于所述密封环的最近侧的侧壁的防潮屏障，其中所述防潮层邻近所述密封环并具有面向所述开口的部分。

公开(公告)号：US20140103496A1

公开(公告)日：2014-04-17

申请号：US14132373

申请日：2013-12-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chien-Jung Wang ,  Jian-Hong Lin

IPC: H01L23/58

CPC classification number: H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor chip includes a seal ring adjacent to edges of the semiconductor chip; an opening extending from a top surface to a bottom surface of the seal ring, wherein the opening has a first end on an outer side of the seal ring and a second end on an inner side of the seal ring; and a moisture barrier having a sidewall parallel to a nearest side of the seal ring, wherein the moisture barrier is adjacent the seal ring and has a portion facing the opening.

Abstract translation: 半导体芯片包括与半导体芯片的边缘相邻的密封环; 从所述密封环的顶表面延伸到底表面的开口，其中所述开口具有在所述密封环的外侧上的第一端和所述密封环的内侧上的第二端; 以及具有平行于所述密封环的最近侧的侧壁的防潮屏障，其中所述防潮层邻近所述密封环并且具有面向所述开口的部分。

公开(公告)号：US09734271B2

公开(公告)日：2017-08-15

申请号：US14965661

申请日：2015-12-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Yu Ching Lee ,  Jian-Hong Lin ,  Te-Liang Lee ,  Jyh-Weei Hsia

IPC: H01L27/10 ,  H01L29/73 ,  G06F17/50 ,  H01L27/06 ,  H01L23/535 ,  H01L29/861 ,  H01L29/423

CPC classification number: G06F17/5045 ,  G06F17/5081 ,  G06F2217/76 ,  H01L23/535 ,  H01L27/0255 ,  H01L27/0629 ,  H01L29/0649 ,  H01L29/42364 ,  H01L29/861 ,  H01L29/8613

Abstract: In some embodiments, in a method for a semiconductor device having an interconnect structure, a design layout is received. A metal line in the design layout is identified, which has at least one via thereon and does not couple downward with an oxide diffusion region. The area of a gate oxide coupled with the metal line is obtained from the design layout. The method comprises determining whether the area of the gate oxide is greater than a first predetermined value. When the area of the gate oxide is greater than the first predetermined value, a charge release path is coupled with the metal line.

公开(公告)号：US09449919B2

公开(公告)日：2016-09-20

申请号：US14621067

申请日：2015-02-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Jian-Hong Lin ,  Hsin-Chun Chang ,  Shiou-Fan Chen ,  Chwei-Ching Chiu ,  Yung-Huei Lee

IPC: H01L23/528 ,  H01L23/522 ,  G06F17/50 ,  H01L21/768

CPC classification number: H01L21/76879 ,  G06F17/5072 ,  G06F17/5077 ,  H01L21/76802 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/0207

Abstract: A semiconductor device includes a first interconnect structure. The first interconnect structure includes a first interconnect portion, a second interconnect portion and a third interconnect portion. The first interconnect portion has a width and a length. The second interconnect portion has a width less than the length of the first interconnect portion. The second interconnect portion is connected to the first interconnect portion. The third interconnect portion has a width less than the width of the second interconnect portion. The third interconnect portion is connected to the second interconnect portion.

Abstract translation: 半导体器件包括第一互连结构。 第一互连结构包括第一互连部分，第二互连部分和第三互连部分。 第一互连部分具有宽度和长度。 第二互连部分的宽度小于第一互连部分的长度。 第二互连部分连接到第一互连部分。 第三互连部分的宽度小于第二互连部分的宽度。 第三互连部分连接到第二互连部分。