Abstract:
A method of operating a non-volatile memory includes; during power-on, reading control information from an information block and lock information from an additional information block, then upon determining that a secure block should be locked, generating a lock enable signal that inhibits access to data stored in the secure block, and a read-only enable signal that prevents change in the data stored in the additional information block.
Abstract:
Provided is a light emitting element, a light emitting device including the same, and fabrication methods of the light emitting element and light emitting device. The light emitting device comprises a substrate, a light emitting structure including a first conductive layer of a first conductivity type, a light emitting layer, and a second conductive layer of a second conductivity type which are sequentially stacked, a first electrode which is electrically connected with the first conductive layer; and a second electrode which is electrically connected with the second conductive layer and separated apart from the first electrode, wherein at least a part of the second electrode is connected from a top of the light emitting structure, through a sidewall of the light emitting structure, and to a sidewall of the substrate.
Abstract:
A memory device includes multiple word lines. A method of operating the memory device includes: performing a first dummy read operation, with respect to first memory cells connected to a first word line among the word lines, by applying a dummy read voltage, having an offset level of a first level, to the first word line; determining, based on a result of the performing of the first dummy read operation, degradation of a threshold voltage distribution of the first memory cells; adjusting an offset level of the dummy read voltage as a second level, based on a result of the determining of the threshold voltage distribution; and performing a second dummy read operation with respect to second memory cells connected to a second word line among the word lines, by applying a dummy read voltage, having the offset level adjusted as the second level, to the second word line among the word lines.
Abstract:
Various embodiments of the present invention relate to an electronic device and an operation control method of the electronic device, and the electronic device comprises an organic light-emitting diode (OLED) display panel including a plurality of sub pixels, a memory, and a processor, wherein the processor can be configured so as to confirm accumulated image data for each sub pixel of the display panel while a plurality of frames are displayed on the panel, generate a compensation image for compensating for a residual image generated on the display panel on the basis of the accumulated image data of each sub pixel when an event for residual image compensation occurs, and display the generated compensation image on the display panel.
Abstract:
A nonvolatile memory system includes a nonvolatile memory device having a physical storage area, and a memory controller managing the physical storage area on the basis of first and second logical areas. The memory controller is configured to receive a logical block address range corresponding to a part of the first logical area and a command from a host and is configured to receive data, a logical block address and a write command from the host to perform an update with respect to the second logical area. When, in the update operation, the received logical block address is included in the logical block address range, the memory controller, in response to the write command, redirects the received logical block address to a logical page number of the second logical area so that the data is written in the second logical area.
Abstract:
Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k layer in the first and second recesses. The methods may further include providing a first metal on the high-k layer in the first and second substrate regions, the first metal being provided within the second recess. The methods may additionally include removing at least portions of the first metal from the second recess while protecting materials within the first recess from removal. The methods may also include, after removing at least portions of the first metal from the second recess, providing a second metal within the second recess.
Abstract:
A display module and a display apparatus having the same are provided. The display module including a circuit board, a plurality of light emitting device packages disposed on the circuit board and electrically coupled to the circuit board, and a coating unit coated with coating solution containing a light diffusion agent covers the plurality of light emitting device packages and fills in a gap between the plurality of light emitting device packages, wherein the coating unit further includes at least one first light diffusion part that is curvedly formed on a surface of the coating unit onto which light emitted from the light emitting device packages is incident.
Abstract:
A storage device includes a nonvolatile memory device, and a controller that manages a data encryption key (DEK). The DEK is used to encrypt data to be written in a storage space of the nonvolatile memory device by a first user and to decrypt data read from the storage space. The controller grants a second user authority to access the storage space by encrypting the DEK based on a Diffie-Hellman (DH) algorithm, grants a second user authority to access the encrypted DEK, and decrypts the encrypted DEK based on the DH algorithm.
Abstract:
A method for fabricating a semiconductor device may comprise forming a first transistor having a first threshold voltage in a first region of a substrate, forming a second transistor having a second threshold voltage less than the first threshold voltage in a second region of the substrate, forming a third interlayer insulating film in the third region, and planarizing the first transistor, the second transistor and the third interlayer insulating film. The first transistor may include a first gate electrode having a first height and a first interlayer insulating film having the first height, and the second transistor may include a second gate electrode having a second height shorter than the first height and a second interlayer insulating film having the second height. The third interlayer insulating film may have the first height.