公开(公告)号：US10777449B2

公开(公告)日：2020-09-15

申请号：US16242483

申请日：2019-01-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Shin Jang ,  Woo-Kyung You ,  Kyu-Hee Han ,  Jong-Min Baek ,  Viet Ha Nguyen ,  Byung-Hee Kim

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.

公开(公告)号：US10700164B2

公开(公告)日：2020-06-30

申请号：US16274350

申请日：2019-02-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Nam Kim ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC: H01L29/08 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/088 ,  H01L27/12

Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

公开(公告)号：US20170294337A1

公开(公告)日：2017-10-12

申请号：US15632884

申请日：2017-06-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Nam KIM ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L29/0847 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76852 ,  H01L21/76862 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L27/0886 ,  H01L27/1211

Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

公开(公告)号：US20160300792A1

公开(公告)日：2016-10-13

申请号：US15059438

申请日：2016-03-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Nam KIM ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC: H01L23/528 ,  H01L29/78 ,  H01L29/08 ,  H01L29/51 ,  H01L29/16 ,  H01L29/161 ,  H01L23/532 ,  H01L29/06

CPC classification number: H01L29/0847 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76852 ,  H01L21/76862 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L27/0886 ,  H01L27/1211

Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

Abstract translation: 半导体器件可以包括扩散防止绝缘图案，多个导电图案，阻挡层和绝缘中间层。 扩散防止绝缘图案可以形成在基板上，并且可以包括从其向上突出的多个突起。 每个导电图案可以形成在防扩散绝缘图案的每个突起上，并且可以具有相对于基板的顶表面倾斜约80度至约135度范围内的角度的侧壁。 如果导电图案，阻挡层可以覆盖每个的顶表面和侧壁。 绝缘中间层可以形成在防扩散绝缘图案和阻挡层上，并且可以在相邻的导电图案之间具有气隙。

公开(公告)号：US09390966B2

公开(公告)日：2016-07-12

申请号：US14516774

申请日：2014-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo-Kyung You ,  Sang-Ho Rha ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee

IPC: H01L21/768 ,  H01L21/3065 ,  H01L21/764

CPC classification number: H01L21/7682 ,  H01L21/3065 ,  H01L21/764 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76877

Abstract: Methods of forming a wiring structure are provided including forming an insulating interlayer on a substrate and forming a sacrificial layer on the insulating interlayer. The sacrificial layer is partially removed to define a plurality of openings. Wiring patterns are formed in the openings. The sacrificial layer is transformed into a modified sacrificial layer by a plasma treatment. The modified sacrificial layer is removed by a wet etching process. An insulation layer covering the wiring patterns is formed on the insulating interlayer. The insulation layer defines an air gap therein between neighboring wiring patterns.

Abstract translation: 提供形成布线结构的方法包括在基板上形成绝缘中间层并在绝缘中间层上形成牺牲层。 牺牲层被部分地去除以限定多个开口。 在开口中形成接线图案。 通过等离子体处理将牺牲层转变成改性的牺牲层。 通过湿蚀刻工艺去除改性牺牲层。 在绝缘中间层上形成覆盖布线图案的绝缘层。 绝缘层在相邻布线图案之间限定了气隙。

公开(公告)号：US11037872B2

公开(公告)日：2021-06-15

申请号：US16374901

申请日：2019-04-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyu-Hee Han ,  Jong-Min Baek ,  Hoon-Seok Seo ,  Sang-Hoon Ahn ,  Woo-Jin Lee

IPC: H01L23/522 ,  H01L21/768 ,  H01L21/02

Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a substrate; a first insulating interlayer on the substrate; a first wiring in the first insulating interlayer on the substrate; an insulation pattern on a portion of the first insulating interlayer adjacent to the first wiring, the insulation pattern having a vertical sidewall and including a low dielectric material; an etch stop structure on the first wiring and the insulation pattern; a second insulating interlayer on the etch stop structure; and a via extending through the second insulating interlayer and the etch stop structure to contact an upper surface of the first wiring.

公开(公告)号：US20190189744A1

公开(公告)日：2019-06-20

申请号：US16274350

申请日：2019-02-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Nam Kim ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC: H01L29/08 ,  H01L23/532 ,  H01L27/12 ,  H01L27/088 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L29/0847 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76852 ,  H01L21/76862 ,  H01L21/76885 ,  H01L23/5222 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L27/0886 ,  H01L27/1211

Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

公开(公告)号：US10217820B2

公开(公告)日：2019-02-26

申请号：US15632884

申请日：2017-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Nam Kim ,  Rak-Hwan Kim ,  Byung-Hee Kim ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Jong-Jin Lee ,  Ho-Yun Jeon ,  Eun-Ji Jung

IPC: H01L29/08 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/088 ,  H01L27/12

Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.

公开(公告)号：US09653400B2

公开(公告)日：2017-05-16

申请号：US14984085

申请日：2015-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Jin Yim ,  Woo-Kyung You ,  Jong-Min Baek ,  Sang-Hoon Ahn ,  Thomas Oszinda ,  Kee-Young Jun

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/53295 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device is provided. The semiconductor device includes a first porous interlayer insulating film having a low dielectric constant and including a first region and a second region, a second interlayer insulating film formed on the first interlayer insulating film in the first region, a plurality of first conductive patterns formed in the second interlayer insulating film such that the plurality of first conductive patterns are spaced apart from each other, at least one second conductive pattern formed in the first interlayer insulating film in the second region and air gaps disposed at lateral sides of the plurality of first conductive patterns.

公开(公告)号：US09281277B2

公开(公告)日：2016-03-08

申请号：US14527842

申请日：2014-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Min Baek ,  Sang-Ho Rha ,  Woo-Kyung You ,  Sang-Hoon Ahn ,  Nae-In Lee ,  Ki-Chul Kim ,  Jeon-Il Lee

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/53238 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76879 ,  H01L21/76883 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1063 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A wiring structure includes a first insulation layer, a plurality of wiring patterns, a protection layer pattern and a second insulation layer. The first insulation layer may be formed on a substrate. A plurality of wiring patterns may be formed on the first insulation layer, and each of the wiring patterns may include a metal layer pattern and a barrier layer pattern covering a sidewall and a bottom surface of the metal layer pattern. The protection layer pattern may cover a top surface of each of the wiring patterns and including a material having a high reactivity with respect to oxygen. The protection layer pattern may cover a top surface of each of the wiring patterns and including a material having a high reactivity with respect to oxygen.

Abstract translation: 布线结构包括第一绝缘层，多个布线图案，保护层图案和第二绝缘层。 第一绝缘层可以形成在基板上。 可以在第一绝缘层上形成多个布线图案，并且每个布线图案可以包括覆盖金属层图案的侧壁和底表面的金属层图案和阻挡层图案。 保护层图案可以覆盖每个布线图案的顶表面，并且包括相对于氧具有高反应性的材料。 保护层图案可以覆盖每个布线图案的顶表面，并且包括相对于氧具有高反应性的材料。