Method for manufacturing thin film transistor array panel
    12.
    发明授权
    Method for manufacturing thin film transistor array panel 有权
    制造薄膜晶体管阵列面板的方法

    公开(公告)号:US09490275B2

    公开(公告)日:2016-11-08

    申请号:US14740484

    申请日:2015-06-16

    CPC classification number: H01L29/42356 H01L29/42384 H01L29/4908 H01L29/7869

    Abstract: A thin film transistor array panel includes: a gate line on a substrate and including a gate electrode; a first gate insulating layer on the substrate and the gate line, the first gate insulting layer including a first portion adjacent to the gate line and a second portion overlapping the gate line and having a smaller thickness than that of the first portion; a second gate insulating layer on the first gate insulating layer; a semiconductor layer on the second gate insulating layer; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a passivation layer on the second gate insulating layer, the source electrode and the drain electrode; and a pixel electrode on the passivation layer and connected with the drain electrode. The first gate insulating layer and the second gate insulating layer have stress in opposite directions from each other.

    Abstract translation: 薄膜晶体管阵列面板包括:基板上的栅极线,并包括栅电极; 所述第一栅极绝缘层在所述基板和所述栅极线上,所述第一栅极绝缘层包括与所述栅极线相邻的第一部分和与所述栅极线重叠并且具有比所述第一部分的厚度小的第二部分; 第一栅极绝缘层上的第二栅极绝缘层; 在所述第二栅极绝缘层上的半导体层; 在半导体层上彼此隔开的源电极和漏电极; 第二栅极绝缘层上的钝化层,源电极和漏电极; 以及钝化层上的像素电极并与漏电极连接。 第一栅极绝缘层和第二栅极绝缘层在彼此相反的方向上具有应力。

    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME
    13.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 审中-公开
    薄膜晶体管基板及其制造方法

    公开(公告)号:US20160093743A1

    公开(公告)日:2016-03-31

    申请号:US14816767

    申请日:2015-08-03

    Abstract: A thin film transistor substrate includes a gate electrode disposed on a substrate; a semiconductor layer partially overlapping the gate electrode, the semiconductor layer including an oxide semiconductor material; a source electrode and a drain electrode disposed on the semiconductor layer, the source electrode and the drain electrode including a barrier layer, a main wiring layer disposed on the barrier layer, and a first capping layer disposed on the main wiring layer and being spaced apart from each other; and second capping layers covering lateral surfaces of the main wiring layers of the source and drain electrodes.

    Abstract translation: 薄膜晶体管基板包括设置在基板上的栅电极; 与所述栅电极部分重叠的半导体层,所述半导体层包括氧化物半导体材料; 设置在所述半导体层上的源电极和漏电极,所述源电极和所述漏极包括阻挡层,设置在所述阻挡层上的主布线层以及设置在所述主布线层上并且间隔开的第一覆盖层 从彼此; 以及覆盖源电极和漏电极的主配线层的侧表面的第二覆盖层。

    MANUFACTURING METHOD OF DISPLAY DEVICE

    公开(公告)号:US20210327927A1

    公开(公告)日:2021-10-21

    申请号:US17074947

    申请日:2020-10-20

    Abstract: A method of manufacturing a display device in a chamber in which a material including yttrium is coated on an inner surface includes: forming a first layer pattern by dry etching on a substrate; depositing a second layer material on the first layer pattern; forming a photoresist pattern on the second layer material; completing a second layer pattern by using the photoresist pattern as an etch mask; and performing an additional acid etching process by using an etching solution including at least one of hydrochloric acid, sulfuric acid, or nitric acid before the forming of the photoresist pattern on the second layer material after the dry etching to form the first layer pattern.

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