公开(公告)号：US09502445B2

公开(公告)日：2016-11-22

申请号：US14809372

申请日：2015-07-27

Applicant: Samsung Display Co., Ltd.

Inventor： Je-Hun Lee ,  Ki-Won Kim ,  Do-Hyun Kim ,  Woo-Geun Lee ,  Kap-Soo Yoon

IPC: H01L29/10 ,  H01L27/12 ,  H01L29/51 ,  H01L29/786 ,  H01L29/45 ,  H01L23/532 ,  H01L29/49 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L27/1225 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L23/53238 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

公开(公告)号：US09406700B2

公开(公告)日：2016-08-02

申请号：US14174989

申请日：2014-02-07

Applicant: Samsung Display Co., LTD.

Inventor： Hiroshi Okumura ,  Je-Hun Lee ,  Jin-Hyun Park

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/127 ,  H01L21/385 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3244 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869

Abstract: A thin film transistor includes a gate electrode on a substrate, a gate insulation layer which covers the gate electrode on the substrate, an oxide semiconductor pattern which is disposed on the gate insulation layer and includes a channel portion superimposed over the gate electrode, and low resistance patterns provided at edges of the channel portion, respectively, and including oxygen vacancies, a channel passivation layer on the oxide semiconductor pattern, a reaction layer which covers the oxide semiconductor pattern and the channel passivation layer, and includes a metal oxide, and a source electrode and a drain electrode which contact the oxide semiconductor pattern.

Abstract translation: 薄膜晶体管包括在基板上的栅电极，覆盖基板上的栅电极的栅极绝缘层，设置在栅极绝缘层上并且包括叠加在栅电极上的沟道部分的氧化物半导体图案，以及低 分别设置在沟道部分的边缘并且包括氧空位的电阻图案，氧化物半导体图案上的沟道钝化层，覆盖氧化物半导体图案和沟道钝化层的反应层，并且包括金属氧化物，以及 源电极和接触氧化物半导体图案的漏电极。

公开(公告)号：US09091894B2

公开(公告)日：2015-07-28

申请号：US13734300

申请日：2013-01-04

Applicant: Samsung Display Co., Ltd.

Inventor： Ji-Hun Lim ,  Byung-Du Ahn ,  Je-Hun Lee

IPC: G02F1/133 ,  G02F1/1362 ,  G02F1/1333 ,  G09G3/36

CPC classification number: G02F1/136209 ,  G02F1/1333 ,  G02F2201/58 ,  G09G3/3648 ,  G09G2360/144

Abstract: A display substrate includes a substrate, a switching element, a pixel electrode, and a light sensing part. The switching element is disposed on the substrate and is electrically connected to a gate line and a data line. The pixel electrode is electrically connected to the switching element. The light sensing part is electrically connected to the switching element and the pixel electrode, and is configured to control a grayscale of a pixel according to a brightness of an external light. The pixel includes the pixel electrode.

Abstract translation: 显示基板包括基板，开关元件，像素电极和感光部。 开关元件设置在基板上并且电连接到栅极线和数据线。 像素电极电连接到开关元件。 光检测部电连接到开关元件和像素电极，并且被配置为根据外部光的亮度来控制像素的灰度。 像素包括像素电极。

公开(公告)号：US08932917B2

公开(公告)日：2015-01-13

申请号：US13940761

申请日：2013-07-12

Applicant: Samsung Display Co., Ltd.

Inventor： Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

IPC: H01L27/12 ,  H01L29/66

CPC classification number: H01L27/1255 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66765

Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.

Abstract translation: 薄膜晶体管（TFT）的制造方法包括形成包括可以与硅组合的金属的栅电极，以在衬底上形成硅化物，并通过在栅极电极中向栅电极提供包括硅的气体形成栅极绝缘层 该方法还包括在栅极绝缘层上形成半导体，在半导体上形成数据线和漏极并形成连接到漏电极的像素电极。

公开(公告)号：US20130295731A1

公开(公告)日：2013-11-07

申请号：US13940761

申请日：2013-07-12

Applicant: Samsung Display Co., Ltd.

Inventor： BYOUNG-JUNE KIM ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

IPC: H01L29/66

CPC classification number: H01L27/1255 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66765

Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.

Abstract translation: 薄膜晶体管（TFT）的制造方法包括形成包括可以与硅组合的金属的栅电极，以在衬底上形成硅化物，并通过在栅极电极中向栅电极提供包括硅的气体形成栅极绝缘层 该方法还包括在栅极绝缘层上形成半导体，在半导体上形成数据线和漏极并形成连接到漏电极的像素电极。

公开(公告)号：US10090337B2

公开(公告)日：2018-10-02

申请号：US15204433

申请日：2016-07-07

Applicant: Samsung Display Co., Ltd.

Inventor： Hiroshi Okumura ,  Je-Hun Lee ,  Jin-Hyun Park

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/66 ,  H01L29/786 ,  H01L21/385

Abstract: A thin film transistor includes a gate electrode on a substrate, a gate insulation layer which covers the gate electrode on the substrate, an oxide semiconductor pattern which is disposed on the gate insulation layer and includes a channel portion superimposed over the gate electrode, and low resistance patterns provided at edges of the channel portion, respectively, and including oxygen vacancies, a channel passivation layer on the oxide semiconductor pattern, a reaction layer which covers the oxide semiconductor pattern and the channel passivation layer, and includes a metal oxide, and a source electrode and a drain electrode which contact the oxide semiconductor pattern.

公开(公告)号：US09954006B2

公开(公告)日：2018-04-24

申请号：US15332079

申请日：2016-10-24

Applicant: Samsung Display Co., Ltd.

Inventor： Je-Hun Lee ,  Ki-Won Kim ,  Do-Hyun Kim ,  Woo-Geun Lee ,  Kap-Soo Yoon

IPC: H01L29/10 ,  H01L27/12 ,  H01L29/51 ,  H01L29/786 ,  H01L29/45 ,  H01L23/532 ,  H01L29/49 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L27/1225 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L23/53238 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

公开(公告)号：US09831451B2

公开(公告)日：2017-11-28

申请号：US14956058

申请日：2015-12-01

Applicant: SAMSUNG DISPLAY CO., LTD

Inventor： Je-Hun Lee

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L51/05 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/49 ,  H01L29/423 ,  H01L29/417 ,  H01L51/10

CPC classification number: H01L51/0512 ,  H01L27/1248 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/786 ,  H01L51/107

Abstract: Provided is a thin film transistor array substrate, including a gate electrode, a gate insulating layer covering the gate electrode, a semiconductor pattern formed on the gate insulating layer and including a channel region overlapping the gate electrode, a source electrode and a drain electrode formed on the semiconductor pattern and facing each other with a first opening exposing the channel region therebetween, a first protective layer formed on the gate insulating layer to cover the source electrode, the drain electrode and the semiconductor pattern and a metal oxide layer formed along a surface of the first protective layer.

公开(公告)号：US09520412B2

公开(公告)日：2016-12-13

申请号：US14798123

申请日：2015-07-13

Applicant: Samsung Display Co., Ltd.

Inventor： Pil-Sang Yun ,  Ki-Won Kim ,  Hye-Young Ryu ,  Woo-Geun Lee ,  Seung-Ha Choi ,  Jae-Hyoung Youn ,  Kyoung-Jae Chung ,  Young-Wook Lee ,  Je-Hun Lee ,  Kap-Soo Yoon ,  Do-Hyun Kim ,  Dong-Ju Yang ,  Young-Joo Choi

IPC: H01L21/00 ,  H01L21/84 ,  H01L27/12 ,  H01L21/4757 ,  H01L21/441 ,  H01L21/475 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

公开(公告)号：US08558984B2

公开(公告)日：2013-10-15

申请号：US13709774

申请日：2012-12-10

Applicant: Samsung Display Co., Ltd.

Inventor： Je-Hun Lee ,  Do-Hyun Kim ,  Tae-Sang Kim ,  Kyung-Seok Son ,  Chang-Oh Jeong

IPC: G02F1/13

CPC classification number: H01L33/0095 ,  G02F1/133512 ,  G02F1/133516 ,  G02F1/136209 ,  G02F1/1368 ,  G02F2001/133397 ,  G02F2001/136222 ,  G02F2001/136231 ,  G02F2001/13685 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458

Abstract: A liquid crystal display (LCD) includes thin film transistors (TFTs) each having spaced apart source/drain electrodes and an oxide-type semiconductive film disposed over and between the source/drain electrodes to define an active layer. Each of the source/drain electrodes includes a portion of a subdivided transparent conductive layer where one subdivision of the transparent conductive layer continues from within its one of the source/drain electrodes to define an optically exposed pixel-electrode that is reliably connected integrally to the one source/drain electrode. Mass production costs can be reduced and production reliability increased because a fewer number of photolithographic masks can be used to form the TFTs.

Abstract translation: 液晶显示器（LCD）包括薄膜晶体管（TFT），每个薄膜晶体管具有间隔开的源/漏电极和设置在源/漏电极之间和之间的氧化物型半导体膜，以限定有源层。 源/漏电极中的每一个包括细分透明导电层的一部分，其中透明导电层的一个细分从其源极/漏极之一内延伸，以限定光学曝光的像素电极，其可靠地与 一个源/漏电极。 由于可以使用较少数量的光刻掩模来形成TFT，所以可以降低批量生产成本并提高生产可靠性。