公开(公告)号：US20190312147A1

公开(公告)日：2019-10-10

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US09263467B2

公开(公告)日：2016-02-16

申请号：US14466665

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sang Ho Park ,  Yoon Ho Khang ,  Se Hwan Yu ,  Yong Su Lee ,  Chong Sup Chang ,  Myoung Geun Cha ,  Hyun Jae Na

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L29/41758 ,  H01L29/458 ,  H01L29/78642 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract translation: 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。

公开(公告)号：US20140183522A1

公开(公告)日：2014-07-03

申请号：US14063774

申请日：2013-10-25

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Yong Su Lee ,  Yoon Ho Khang ,  Hyun Jae Na ,  Se Hwan Yu ,  Jong Chan Lee ,  Dong Hwan Shim

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/7869

Abstract: A thin film transistor array panel including a substrate; a channel region disposed on the substrate and including oxide semiconductor disposed on the substrate; a source electrode and a drain electrode connected to the oxide semiconductor and facing each other at both sides, centered on the oxide semiconductor; an insulating layer disposed on the oxide semiconductor; and a gate electrode disposed on the insulating layer. The drain electrode includes a first drain region and a second drain region; the charge mobility of the first drain region is greater than that of the second drain region, the source electrode includes a first source region and a second source region, and the charge mobility of the first source region is greater than that of the second source region.

Abstract translation: 一种薄膜晶体管阵列面板，包括基板; 设置在所述基板上并且包括设置在所述基板上的氧化物半导体的沟道区; 连接到所述氧化物半导体并且以所述氧化物半导体为中心的两侧面对的源电极和漏电极; 设置在所述氧化物半导体上的绝缘层; 以及设置在所述绝缘层上的栅电极。 漏极包括第一漏区和第二漏区; 第一漏极区域的电荷迁移率大于第二漏极区域的电荷迁移率，源电极包括第一源极区域和第二源极区域，并且第一源极区域的电荷迁移率大于第二源极区域的电荷迁移率 。

公开(公告)号：US11910664B2

公开(公告)日：2024-02-20

申请号：US17252670

申请日：2018-12-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Myoung Geun Cha ,  Sang Gun Choi ,  Ji Yeong Shin ,  Yong Su Lee

IPC: H10K59/131 ,  G09G3/32 ,  H10K59/123 ,  H10K77/10 ,  H10K102/00

CPC classification number: H10K59/131 ,  G09G3/32 ,  H10K59/123 ,  H10K77/111 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2320/02 ,  H10K2102/311

Abstract: A display device includes a substrate including a display area including a plurality of pixels, a peripheral area around the display area, and a bending area disposed in the peripheral area. A plurality of transistors is disposed in each pixel; a driving voltage line is disposed in the display area and transmits a driving voltage; a driving voltage transmission line is disposed in the peripheral area and is connected to the driving voltage line; and a conductive overlap layer overlaps at least one of the plurality of transistors.

公开(公告)号：US11594639B2

公开(公告)日：2023-02-28

申请号：US17115470

申请日：2020-12-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gap Kim ,  Yu-Gwang Jeong

IPC: H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/417 ,  H01L27/32

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US11502282B2

公开(公告)日：2022-11-15

申请号：US17075872

申请日：2020-10-21

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Sang Gun Choi ,  Joon Woo Bae ,  Ji Yeong Shin ,  Yong Su Lee

IPC: H01L51/56 ,  H01L27/32 ,  H01L21/308 ,  H01L51/52

Abstract: A display device includes a first transistor including a first active layer, a first gate electrode overlapping the first active layer, a gate insulating layer between the first active layer and the first gate electrode, a first source electrode, and a first drain electrode; a second transistor including a second active layer, a second gate electrode overlapping the second active layer, a second source electrode and a second drain electrode; a capacitor including a first capacitor electrode connected to the second transistor; a lower electrode disposed under the first active layer; a connecting member connecting the first active layer to the lower electrode; and a first metal pattern contacting the connecting member and disposed on a same layer with the first gate electrode.

公开(公告)号：US11450722B2

公开(公告)日：2022-09-20

申请号：US16871523

申请日：2020-05-11

Applicant: Samsung Display Co., Ltd.

Inventor： Doo Na Kim ,  Keun Woo Kim ,  Tae Wook Kang ,  Do Kyeong Lee ,  Yong Su Lee ,  Jae Hwan Chu ,  Kwang Hyun Kim ,  Yeoung Keol Woo ,  Yung Bin Chung

IPC: H01L27/14 ,  H01L27/32 ,  H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51

Abstract: A display device includes: a first semiconductor layer on a first buffer layer, and including a first active layer; a first gate insulating layer on the first semiconductor layer, and covering the first active layer; a first conductive layer on the first gate insulating layer, and including a first gate electrode; a second conductive layer on the first conductive layer, and including a first source/drain electrode; a first interlayer insulating layer on the first conductive layer; a second semiconductor layer on the first interlayer insulating layer, and including a second active layer; a second gate insulating layer on the second semiconductor layer, and covering the second active layer; and a third conductive layer on the second gate insulating layer, and including a second gate electrode and a second source/drain electrode. The first gate insulating layer and the second gate insulating layer include different insulating materials from each other.

公开(公告)号：US11309373B2

公开(公告)日：2022-04-19

申请号：US16838931

申请日：2020-04-02

Applicant: Samsung Display Co., Ltd.

Inventor： Keun Woo Kim ,  Yong Su Lee ,  Myoung Geun Cha ,  Doo Na Kim ,  Sang Sub Kim ,  Jae Hwan Chu ,  Sang Gun Choi

IPC: H01L27/32 ,  H01L27/12

Abstract: A display device includes: a pixel at a display region. The pixel includes: a light-emitting element connected between a first power source and a second power source; and a first transistor connected between the first power source and the light-emitting element, the first transistor to control a driving current of the light-emitting element in response to a voltage of a first node. The first transistor includes a first driving transistor and a second driving transistor that are connected in series with each other between the first power source and the light-emitting element, and the first driving transistor and the second driving transistor have structures that are asymmetric with each other in a cross-sectional view.

公开(公告)号：US11195444B2

公开(公告)日：2021-12-07

申请号：US17038256

申请日：2020-09-30

Applicant: Samsung Display Co., Ltd.

Inventor： Keun Woo Kim ,  Tae Wook Kang ,  Hye Na Kwak ,  Doo Na Kim ,  Han Bit Kim ,  Bum Mo Sung ,  Do Kyeong Lee ,  Yong Su Lee ,  Jae Hwan Chu

IPC: G09G3/20

Abstract: A display device includes: a pixel unit including a plurality of pixels; a scan driver having a plurality of stages and configured to supply a scan signal to the pixel unit; and a light emission control driver having a plurality of stages and configured to supply a light emission control signal to the pixel unit, wherein a first transistor of a plurality of transistors included in at least one of the stages of the scan driver or the stages of the light emission control driver comprises: an active layer pattern on a base layer, and including a channel region forming a channel, and first and second regions on opposite sides of the channel region; and a gate electrode spaced apart from the active layer pattern with a first insulating film therebetween, and overlapping the channel region.

公开(公告)号：US11164526B2

公开(公告)日：2021-11-02

申请号：US16811514

申请日：2020-03-06

Applicant: Samsung Display Co., LTD.

Inventor： Keun Woo Kim ,  Mee Jae Kang ,  Han Bit Kim ,  Thanh Tien Nguyen ,  Yong Su Lee ,  Jae Seob Lee

IPC: G09G3/3266 ,  G09G3/3291

Abstract: A display device including pixels is provided. Each of the pixels includes a first transistor having a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node, a second transistor having a gate electrode connected to a first scan line, a first electrode connected to a data line, and a second electrode connected to the second node, and a third transistor having a first gate electrode connected to the first scan line, a second gate electrode, a first electrode connected to the first node, and a second electrode connected to the third node. The second gate electrode may be in a floating state, and the third transistor may be aged to alleviate a leakage current in order to improve image generation.