公开(公告)号：US20230047588A1

公开(公告)日：2023-02-16

申请号：US17971297

申请日：2022-10-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byunghoon Lee ,  Changyoung Jeong ,  Byunggook Kim ,  Maenghyo Cho ,  Muyoung Kim ,  Junghwan Moon ,  Sungwoo Park ,  Hyungwoo Lee ,  Joonmyung Choi

IPC: G03F7/20 ,  H01L21/027 ,  G05B19/4097

Abstract: There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.

公开(公告)号：US11493850B2

公开(公告)日：2022-11-08

申请号：US16593149

申请日：2019-10-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byunghoon Lee ,  Changyoung Jeong ,  Byunggook Kim ,  Maenghyo Cho ,  Muyoung Kim ,  Junghwan Moon ,  Sungwoo Park ,  Hyungwoo Lee ,  Joonmyung Choi

IPC: G03F7/20 ,  H01L21/027 ,  G05B19/4097

Abstract: There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.

公开(公告)号：US11328469B2

公开(公告)日：2022-05-10

申请号：US17267015

申请日：2019-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungwoo Park ,  Yoonchan Choi ,  Hyungjoo Jin ,  Sungjun Kim

IPC: G06T13/80 ,  G06F3/0488 ,  G06T11/00 ,  G06T11/20 ,  G06F3/04883

Abstract: An electronic device according to various embodiments of the present invention includes: a touch screen display; a processor operatively connected to the display; and a memory operatively connected to the processor. The memory may include instructions which, when executed, cause the processor to: display, on the display, a user interface including a first section configured to receive a drawing input and a second section including a plurality of colors and one or more line widths, which are to be selected for the drawing input; execute an animation image file to be displayed on the first section, the animation image file including a procedure of drawing an object with at least one color among the plurality of colors and at least one line width among the one or more line widths; receive, from the display, an input for stopping the execution of the image file; and display a drawing output on the display according to the drawing input, the drawing output including at least one among the color and the line width used when the drawing input is received. Various other embodiments are also possible.

公开(公告)号：US11728255B2

公开(公告)日：2023-08-15

申请号：US17154067

申请日：2021-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ungcheon Kim ,  Sungwoo Park ,  Yukyung Park ,  Seungkwan Ryu

IPC: H01L23/498 ,  H01L21/48 ,  H01L25/18

CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49838 ,  H01L25/18

Abstract: An interposer including a base layer, a redistribution structure on a first surface of the base layer and including a conductive redistribution pattern, a first lower protection layer on a second surface of the base layer, a lower conductive pad on the first lower protection layer, a through electrode connecting the conductive redistribution pattern and the lower conductive pad, a second lower protection layer on the first lower protection layer, including a different material than the first lower protection layer, and contacting at least a portion of the lower conductive pad, and an indentation formed in an outer edge region of the interposer to provide a continuous angled sidewall extending entirely through the second lower protection layer and through at least a portion of the first protection layer.

公开(公告)号：US11662665B2

公开(公告)日：2023-05-30

申请号：US17672937

申请日：2022-02-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byunghoon Lee ,  Maenghyo Cho ,  Changyoung Jeong ,  Muyoung Kim ,  Junghwan Moon ,  Sungwoo Park ,  Hyungwoo Lee

IPC: G03F7/20 ,  H01L21/027 ,  G03F7/40 ,  G05B19/4099 ,  G06F30/25

CPC classification number: G03F7/705 ,  G03F7/40 ,  G03F7/70033 ,  G03F7/70608 ,  G05B19/4099 ,  G06F30/25 ,  H01L21/0274 ,  G05B2219/45031

Abstract: A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.

公开(公告)号：US11482483B2

公开(公告)日：2022-10-25

申请号：US17038306

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yukyung Park ,  Ungcheon Kim ,  Sungwoo Park ,  Seungkwan Ryu

IPC: H01L23/498 ,  H01L23/538 ,  H01L25/18 ,  H01L21/48 ,  H01L23/544

Abstract: Provided is an interposer for a semiconductor package, the interposer including an interposer substrate comprising a first main surface and a second main surface opposite to the first main surface, a first through-electrode structure and a second through-electrode structure each passing through the interposer substrate and protruding from the first main surface, a connection terminal structure contacting both the first through-electrode structure and the second through-electrode structure, and a photosensitive polymer layer arranged between the connection terminal structure and the interposer substrate, and between the first through-electrode structure and the second through-electrode structure.

公开(公告)号：US11125734B2

公开(公告)日：2021-09-21

申请号：US16109758

申请日：2018-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inho Choi ,  Minjin Kim ,  Sungwoo Park ,  Youngdoo Jung ,  Eunhee Jung ,  Sungeun Jo

IPC: G01N33/00 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498 ,  H01L23/10 ,  H01L23/552

Abstract: Disclosed is a gas sensor package. The gas sensor package comprises a package substrate, a controller on the package substrate, a plurality of gas sensors on the controller, and a lid on the package substrate and the lid comprising a hole extending between a first surface and a second surface of the lid, the first surface of the lid facing away the package substrate and the second surface of the lid facing toward the package substrate. The gas sensors sense different types of gases.

公开(公告)号：US20130148528A1

公开(公告)日：2013-06-13

申请号：US13709978

申请日：2012-12-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeyun Ko ,  Heewon Kang ,  Kwanhee Roh ,  Sungwoo Park ,  Sungho Lee ,  Inseok Hwang

IPC: H04W24/02

CPC classification number: H04W24/02 ,  H04L1/0003 ,  H04L1/0009

Abstract: A method and apparatus are provided for selecting a Modulation and Coding Scheme (MCS). Interference strength information is received from one or more neighbor base stations. An interference level is estimated using the received interference strength information. The MCS is selected based the estimated interference level.

Abstract translation: 提供了一种用于选择调制和编码方案（MCS）的方法和装置。 从一个或多个相邻基站接收干扰强度信息。 使用接收的干扰强度信息估计干扰电平。 基于估计的干扰电平来选择MCS。