SEMICONDUCTOR DEVICE
    11.
    发明申请

    公开(公告)号:US20210036020A1

    公开(公告)日:2021-02-04

    申请号:US16942093

    申请日:2020-07-29

    Abstract: A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.

    SEMICONDUCTOR DEVICE
    12.
    发明申请

    公开(公告)号:US20200381619A1

    公开(公告)日:2020-12-03

    申请号:US16998542

    申请日:2020-08-20

    Abstract: A semiconductor device includes interlayer insulating layers and horizontal structures alternately and repeatedly disposed on a semiconductor substrate, separation structures extending in a direction perpendicular to an upper surface of the semiconductor substrate on the semiconductor substrate, to extend in a first horizontal direction parallel to the upper surface of the semiconductor substrate, and vertical structures disposed between the separation structures. Each of the horizontal structures includes a plurality of semiconductor regions, and the plurality of semiconductor regions of each of the plurality of semiconductor regions include a first semiconductor region and a second semiconductor region sequentially arranged in a direction away from a side surface of a corresponding one of the vertical structures and having different conductivity types.

    SEMICONDUCTOR DEVICE
    13.
    发明申请

    公开(公告)号:US20190326511A1

    公开(公告)日:2019-10-24

    申请号:US16172830

    申请日:2018-10-28

    Abstract: A semiconductor device includes interlayer insulating layers and horizontal structures alternately and repeatedly disposed on a semiconductor substrate, separation structures extending in a direction perpendicular to an upper surface of the semiconductor substrate on the semiconductor substrate, to extend in a first horizontal direction parallel to the upper surface of the semiconductor substrate, and vertical structures disposed between the separation structures. Each of the horizontal structures includes a plurality of semiconductor regions, and the plurality of semiconductor regions of each of the plurality of semiconductor regions include a first semiconductor region and a second semiconductor region sequentially arranged in a direction away from a side surface of a corresponding one of the vertical structures and having different conductivity types.

    PASSIVATION SURFACE TREATMENT OF STAINLESS STEEL

    公开(公告)号:US20190203371A1

    公开(公告)日:2019-07-04

    申请号:US15984853

    申请日:2018-05-21

    CPC classification number: C25D5/36 C25D5/50 C25D11/38 C25F1/06

    Abstract: A passivation surface treatment method of stainless steel that improves corrosion resistance including in a brine environment without changing the appearance of the surface of stainless steel. A passivation surface treatment method for stainless steel includes: performing degreasing of stainless steel, performing electrolytic pickling where the stainless steel that underwent the degreasing is immersed in a pickling solution having phosphoric acid (H3PO4) and is connected to the anode and a voltage of about 0.5 to 5.0 V for about 10 seconds or more is applied, performing electrolytic degreasing of the stainless steel, and performing electrolytic passivation where the stainless steel that underwent the electrolytic degreasing is immersed in a passivation solution including dichromic acid and chromium sulfate and a voltage of about 0.5 to 5.0 V is applied for 5 seconds or more.

    IMAGE SENSOR, IMAGE SENSING SYSTEM, AND IMAGE SENSING METHOD

    公开(公告)号:US20230269501A1

    公开(公告)日:2023-08-24

    申请号:US18086449

    申请日:2022-12-21

    CPC classification number: H04N25/77 H04N25/709

    Abstract: An image sensor includes a photoelectric converter configured to convert received light into charges in response to the received light and provide the charges to a first node, a transfer transistor configured to provide a voltage of the first node to a floating diffusion node, a reset transistor configured to reset a voltage of the floating diffusion node to a driving voltage based on a reset signal, a source follower transistor configured to provide a unit pixel output based on the voltage of the floating diffusion node, a select transistor connected to the source follower transistor and gated with a selection signal to output the unit pixel output to the outside, and a ferroelectric capacitor connected to the floating diffusion node, wherein the ferroelectric capacitor is configured to adjust a conversion gain of the floating diffusion node based on a conversion gain mode of the ferroelectric capacitor, the conversion gain mode being a first conversion gain mode, a second conversion gain mode, or a third conversion gain mode.

    NEUROMORPHIC DEVICE AND OPERATING METHOD OF THE SAME

    公开(公告)号:US20210319293A1

    公开(公告)日:2021-10-14

    申请号:US17224575

    申请日:2021-04-07

    Abstract: A neuromorphic device includes a synaptic array, including input lines extending in a first direction and receiving input signals independently from axon circuits connected thereto, bit lines extending in a second direction crossing the first direction and outputting output signals, cell strings that each include at least two resistive memristor elements and a string select transistor in series between an input line and a bit line, electrode pads stacked and spaced apart from each other between the input and bit lines and connected to the string select transistor and at least two resistive memristor elements, a decoder to apply a string selection signal or a word line selection signal to the electrode pads, and neuron circuits, each connected to one of the bit lines connected to one of the cell strings, summing the output signals, converting and outputting the summed signal when it is more than a predetermined threshold.

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