知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

31 records (took 0.024 seconds)

    SEMICONDUCTOR PACKAGE, AND PACKAGE ON PACKAGE HAVING THE SAME
    11.
    发明申请
    SEMICONDUCTOR PACKAGE, AND PACKAGE ON PACKAGE HAVING THE SAME 有权

    公开(公告)号：US20210257305A1

    公开(公告)日：2021-08-19

    申请号：US17024852

    申请日：2020-09-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Choongbin Yim ,  Jungwoo Kim ,  Jihwang Kim ,  Jungsoo Byun ,  Jongbo SHIM ,  Doohwan Lee ,  Kyoungsei Choi ,  Junggon Choi ,  Sungeun Pyo

    IPC: H01L23/538 ,  H01L25/10

    Abstract: A semiconductor package includes: a redistribution layer including a plurality of redistribution insulating layers, a plurality of redistribution line patterns that constitute lower wiring layers, and a plurality of redistribution vias that are connected to some of the plurality of redistribution line patterns while penetrating at least one of the plurality of redistribution insulating layers; at least one semiconductor chip arranged on the redistribution layer; an expanded layer surrounding the at least one semiconductor chip on the redistribution layer; and a cover wiring layer including at least one base insulating layer, a plurality of wiring patterns that constitute upper wiring layers, and a plurality of conductive vias that are connected to some of the plurality of wiring patterns while penetrating the at least one base insulating layer.

    Semiconductor packages
    13.
    发明授权
    Semiconductor packages 有权

    公开(公告)号：US11355445B2

    公开(公告)日：2022-06-07

    申请号：US17007945

    申请日：2020-08-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Joonsung Kim ,  Doohwan Lee ,  Taeho Ko ,  Bongsoo Kim ,  Seokbong Park

    IPC: H01L23/538 ,  H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01P3/08 ,  H01P11/00 ,  H01L23/29

    Abstract: A semiconductor package includes a lower connection structure, a semiconductor chip on the lower connection structure, an upper connection structure including a first conductive pattern layer on the semiconductor chip, a first insulating layer on the first conductive pattern layer, a second conductive pattern layer on the first insulating layer, a first via penetrating the first insulating layer to extend between the first conductive pattern layer and the second conductive pattern layer, and a second insulating layer extending between a side surface of the first via and the first insulating layer, and an intermediate connection structure between the lower connection structure and the upper connection structure. A chemical composition of the first insulating layer may differ from a chemical composition of the second insulating layer.

    Semiconductor package and method of manufacturing the same
    14.
    发明授权
    Semiconductor package and method of manufacturing the same 有权

    公开(公告)号：US11302572B2

    公开(公告)日：2022-04-12

    申请号：US16983298

    申请日：2020-08-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dowan Kim ,  Doohwan Lee ,  Seunghwan Baek

    IPC: H01L21/768 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31

    Abstract: A method of manufacturing a semiconductor package may include forming a first substrate including a redistribution layer, providing a second substrate including a semiconductor chip and an interconnection layer on the first substrate to connect the semiconductor chip to the redistribution layer, forming a first encapsulation layer covering the second substrate, and forming a via structure penetrating the first encapsulation layer. The forming the via structure may include forming a first via hole in the first encapsulation layer, forming a photosensitive material layer in the first via hole, exposing and developing the photosensitive material layer in the first via hole to form a second encapsulation layer having a second via hole, and filling the second via hole with a conductive material. A surface roughness of a sidewall of the first encapsulation layer may be greater than a surface roughness of a sidewall of the second encapsulation layer.

    Semiconductor package, and package on package having the same
    18.
    发明授权
    Semiconductor package, and package on package having the same 有权

    公开(公告)号：US11581263B2

    公开(公告)日：2023-02-14

    申请号：US17024852

    申请日：2020-09-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Choongbin Yim ,  Jungwoo Kim ,  Jihwang Kim ,  Jungsoo Byun ,  Jongbo Shim ,  Doohwan Lee ,  Kyoungsei Choi ,  Junggon Choi ,  Sungeun Pyo

    IPC: H01L23/495 ,  H01L23/538 ,  H01L25/10

    Abstract: A semiconductor package includes: a redistribution layer including a plurality of redistribution insulating layers, a plurality of redistribution line patterns that constitute lower wiring layers, and a plurality of redistribution vias that are connected to some of the plurality of redistribution line patterns while penetrating at least one of the plurality of redistribution insulating layers; at least one semiconductor chip arranged on the redistribution layer; an expanded layer surrounding the at least one semiconductor chip on the redistribution layer; and a cover wiring layer including at least one base insulating layer, a plurality of wiring patterns that constitute upper wiring layers, and a plurality of conductive vias that are connected to some of the plurality of wiring patterns while penetrating the at least one base insulating layer.

    Semiconductor package
    19.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11342239B2

    公开(公告)日：2022-05-24

    申请号：US16672652

    申请日：2019-11-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sunghawn Bae ,  Doohwan Lee ,  Jooyoung Choi

    IPC: H01L23/367 ,  H01L23/31 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01L23/373

    Abstract: The invention provides a semiconductor package, which may include a connection structure including one or more redistribution layers. A semiconductor chip is disposed on the connection structure and has an active surface on which a connection pad electrically connected to the redistribution layer is disposed and an inactive surface opposite to the active surface. An encapsulant is disposed on the connection structure and covers at least a portion of the inactive surface of the semiconductor chip. A conductor pattern layer is embedded in the encapsulant such that one exposed surface of the conductor pattern layer is exposed from the encapsulant. A metal layer is disposed on the encapsulant and covers the one exposed surface of the conductor pattern layer.

    Semiconductor package having semiconductor chip between first and second redistribution layers
    20.
    发明授权
    Semiconductor package having semiconductor chip between first and second redistribution layers 有权

    公开(公告)号：US11158581B2

    公开(公告)日：2021-10-26

    申请号：US16679484

    申请日：2019-11-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Joonsung Kim ,  Doohwan Lee

    IPC: H01L23/538 ,  H01L23/498 ,  H01L23/31 ,  H01L23/13

    Abstract: A semiconductor package may include: a frame having a cavity and including a wiring structure connecting first and second surfaces of the frame to each other; a first connection structure d on the second surface of the frame and including a first redistribution layer connected to the wiring structure; a semiconductor chip on the first connection structure within the cavity and having connection pads connected to the first redistribution layer; an encapsulant encapsulating the semiconductor chip, covering the first surface of the frame, and having an upper surface substantially coplanar with an upper surface of the wiring structure; and a second connection structure including an insulating layer disposed on the upper surfaces of the encapsulant and the wiring structure, a second redistribution layer on the insulating layer, and vias penetrating through the insulating layer and connecting the wiring structure and the second redistribution layer.

Patent Agency Ranking