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公开(公告)号：US11676915B2
公开(公告)日：2023-06-13
申请号：US17241875
申请日：2021-04-27
发明人： Taesung Jeong , Doohwan Lee , Hongwon Kim , Junggon Choi
IPC分类号： H01L23/00 , H01L23/31 , H01L23/538 , H01L25/10 , H01L21/683 , H01L21/48 , H01L21/56 , H01L25/065
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/4857 , H01L21/563 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/3135 , H01L23/5383 , H01L23/5386 , H01L23/5389 , H01L24/16 , H01L25/0655 , H01L25/105 , H01L2221/6835 , H01L2224/16227 , H01L2225/1035 , H01L2225/1058 , H01L2924/18161 , H01L2924/3512
摘要： A semiconductor package including a redistribution substrate with a first insulating layer, one or more second insulating layers on the first insulating layer, and a plurality of redistribution layers. The first insulating layer includes a first photosensitive resin having an elongation of 60% or more and toughness of 70 mJ/mm3 or more. The one or more second insulating layers include a second photosensitive resin having an elongation in a range of 10% to 40% and toughness of 40 mJ/mm3.
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公开(公告)号：US11444706B2
公开(公告)日：2022-09-13
申请号：US17285943
申请日：2019-10-22
发明人： Dongil Yang , Seonjun Kim , Jonghyun Park , Doohwan Lee , Jongin Lee
IPC分类号： H04B17/17 , H04B17/318
摘要： Disclosed is an antenna module, which include a first antenna element, a second antenna element, and a communication module that includes a first transmit path and a first receive path connected with the first antenna element, a second transmit path and a second receive path connected with the second antenna element, and a detection circuit connected with at least a part of the second receive path. The communication module may output a specified signal by using the first transmit path and the first antenna element based at least on obtaining a request for identifying a state of the antenna module from an external device, may obtain the output specified signal by using the second receive path and the second antenna element, may identify an intensity of the obtained specified signal by using the detection circuit, and may determine whether the antenna module is abnormal, based at least on the intensity of the obtained specified signal. Moreover, various embodiment found through the present disclosure are possible.
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公开(公告)号：US11289456B2
公开(公告)日：2022-03-29
申请号：US16940045
申请日：2020-07-27
发明人： Doohwan Lee , Jungsoo Byun
IPC分类号： H01L25/065 , H01L23/04 , H01L23/00 , H01L23/538 , H01L23/31
摘要： A semiconductor package includes a frame having a through-opening, a first semiconductor chip disposed in the through-opening and having a first active surface on which a first connection pad is disposed and a first inactive surface opposing the first active surface, a second semiconductor chip disposed on the first semiconductor chip and having a second active surface on which a second connection pad is disposed and a second inactive surface opposing the second active surface, first and second bumps electrically connected to the first and second connection pads, respectively, first and second dummy bumps disposed on a same level as levels of the first and second bumps, respectively, first and second posts electrically connected to the first and second bumps, respectively, a connection member including a redistribution layer electrically connected to each of the first and second posts, and a dummy post disposed between the frame and the connection member.
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公开(公告)号：US20210384095A1
公开(公告)日：2021-12-09
申请号：US17409281
申请日：2021-08-23
发明人： Joonsung KIM , Doohwan Lee , Jinseon Park
IPC分类号： H01L23/31 , H01L23/13 , H01L23/498 , H01L23/00
摘要： A method of manufacturing a fan-out semiconductor package includes forming a frame having a through-hole and including one or more wiring layers; forming a semiconductor chip in the through-hole of the frame; forming an encapsulant covering an upper surface of each of the frame and the semiconductor chip, and filling a space between a wall surface of the through-hole of the frame and a side surface of the semiconductor chip; forming a connection structure below each of the frame and the semiconductor chip; forming a first metal pattern layer on an upper surface of the encapsulant; forming an insulating material on the upper surface of the encapsulant and covering the first metal pattern layer; and forming a second metal pattern layer on the insulating material, a first metal via passing through the insulating material, and a second metal via passing through the insulating material and the encapsulant.
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公开(公告)号：US20200161203A1
公开(公告)日：2020-05-21
申请号：US16679484
申请日：2019-11-11
发明人： Joonsung Kim , Doohwan Lee
IPC分类号： H01L23/31 , H01L23/13 , H01L23/498 , H01L23/538
摘要： A semiconductor package may include: a frame having a cavity and including a wiring structure connecting first and second surfaces of the frame to each other; a first connection structure d on the second surface of the frame and including a first redistribution layer connected to the wiring structure; a semiconductor chip on the first connection structure within the cavity and having connection pads connected to the first redistribution layer; an encapsulant encapsulating the semiconductor chip, covering the first surface of the frame, and having an upper surface substantially coplanar with an upper surface of the wiring structure; and a second connection structure including an insulating layer disposed on the upper surfaces of the encapsulant and the wiring structure, a second redistribution layer on the insulating layer, and vias penetrating through the insulating layer and connecting the wiring structure and the second redistribution layer.
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公开(公告)号：US20240137052A1
公开(公告)日：2024-04-25
申请号：US18403443
申请日：2024-01-03
发明人： John Moon , Hyoseok Na , Dongil Yang , Doohwan Lee
CPC分类号： H04B1/0458 , H03F3/245 , H04B1/0475 , H04B1/44 , H03F2200/294 , H04B2001/0416
摘要： Provided is an electronic device including a transceiver configured to output a first transmission signal, a first radio frequency (RF) module configured to amplify the first transmission signal obtained from the transceiver to generate an amplified first transmission signal, a first antenna configured to transmit the amplified first transmission signal, and a main coupler provided outside the first RF module along a transmission path between the first RF module and the first antenna, and configured to output a first coupling signal corresponding to the first transmission signal. The first RF module includes at least one power amplifier configured to amplify the first transmission signal, and a switch configured to connect one of a plurality of input ports, including at least one input port connected to the main coupler and configured to receive the first coupling signal output by the main coupler, with an output port connected to the transceiver.
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公开(公告)号：US11721577B2
公开(公告)日：2023-08-08
申请号：US17714546
申请日：2022-04-06
发明人： Dowan Kim , Doohwan Lee , Seunghwan Baek
IPC分类号： H01L21/768 , H01L23/538 , H01L23/00 , H01L23/31
CPC分类号： H01L21/76802 , H01L21/76877 , H01L23/31 , H01L23/5384 , H01L23/5385 , H01L23/5386 , H01L24/94
摘要： A method of manufacturing a semiconductor package may include forming a first substrate including a redistribution layer, providing a second substrate including a semiconductor chip and an interconnection layer on the first substrate to connect the semiconductor chip to the redistribution layer, forming a first encapsulation layer covering the second substrate, and forming a via structure penetrating the first encapsulation layer. The forming the via structure may include forming a first via hole in the first encapsulation layer, forming a photosensitive material layer in the first via hole, exposing and developing the photosensitive material layer in the first via hole to form a second encapsulation layer having a second via hole, and filling the second via hole with a conductive material. A surface roughness of a sidewall of the first encapsulation layer may be greater than a surface roughness of a sidewall of the second encapsulation layer.
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公开(公告)号：US20220077078A1
公开(公告)日：2022-03-10
申请号：US17241875
申请日：2021-04-27
发明人： Taesung Jeong , Doohwan Lee , Hongwon Kim , Junggon Choi
IPC分类号： H01L23/00 , H01L25/065 , H01L25/10 , H01L23/31 , H01L23/538 , H01L21/683 , H01L21/48 , H01L21/56
摘要： A semiconductor package including a redistribution substrate with a first insulating layer, one or more second insulating layers on the first insulating layer, and a plurality of redistribution layers. The first insulating layer includes a first photosensitive resin having an elongation of 60% or more and toughness of 70 mJ/mm3 or more. The one or more second insulating layers include a second photosensitive resin having an elongation in a range of 10% to 40% and toughness of 40 mJ/mm3.
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公开(公告)号：US11121069B2
公开(公告)日：2021-09-14
申请号：US16580480
申请日：2019-09-24
发明人： Jaehoon Choi , Doohwan Lee , Byungho Kim , Jooyoung Choi
IPC分类号： H01L23/498 , H01L23/00 , H01L23/31 , H01L23/13 , H01L21/48
摘要： A semiconductor package includes a semiconductor chip including a connection pad disposed on an active surface of the semiconductor chip, a passivation layer disposed on the connection pad and the active surface and having an opening exposing at least a portion of the connection pad, and a capping pad covering the connection pad exposed to the opening; an encapsulant covering at least a portion of the semiconductor chip; and a connection structure disposed on the active surface of the semiconductor chip and including a connection via connected to the capping pad and a redistribution layer connected to the connection via, wherein the capping pad includes: a central portion disposed in the opening, and a peripheral portion extending from the central portion onto the passivation layer, and having a crystal grain having a size different from that of the crystal grain of the central portion.
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公开(公告)号：US20210257305A1
公开(公告)日：2021-08-19
申请号：US17024852
申请日：2020-09-18
发明人： Choongbin Yim , Jungwoo Kim , Jihwang Kim , Jungsoo Byun , Jongbo SHIM , Doohwan Lee , Kyoungsei Choi , Junggon Choi , Sungeun Pyo
IPC分类号： H01L23/538 , H01L25/10
摘要： A semiconductor package includes: a redistribution layer including a plurality of redistribution insulating layers, a plurality of redistribution line patterns that constitute lower wiring layers, and a plurality of redistribution vias that are connected to some of the plurality of redistribution line patterns while penetrating at least one of the plurality of redistribution insulating layers; at least one semiconductor chip arranged on the redistribution layer; an expanded layer surrounding the at least one semiconductor chip on the redistribution layer; and a cover wiring layer including at least one base insulating layer, a plurality of wiring patterns that constitute upper wiring layers, and a plurality of conductive vias that are connected to some of the plurality of wiring patterns while penetrating the at least one base insulating layer.
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